-
SOFTWARE
SOFTWARE SOLUTIONS FOR A PROGRAMMABLE WORLD
3 2016
Zynq MPSoC Doom
AMP SoC
:
japan.xilinx.com/xcell
-
SOFTWARE
Letter from the Publisher
japan.xilinx.com/xcell/
2016 Xilinx, Inc. All Right Reserved.
XILINX Xcell Xilinx
Xilinx, Inc.
Xilinx, Inc.
30 FPGA Verilog VHDL C/C++ OpenCL SDSoCSDAccelSDNet SDx
MathWorks (MATLAB Simulink)National Instruments (LabVIEW LabVIEW
FPGA)Topic Embedded Products (Dyplo)
Embedded World Topic Zynq-7000 SoC Dyplo Dyplo (Dynamic Process
Loader ) Zynq-7000 SoC Zynq-7000 SoC Xcell Daily blog (Zynq-7000
SoC / Topic Embedded Dyplo )
SDSoC SDx MathWorks National Instruments Topic Embedded
Mike Santarini Xcell Journal 8 Mike Santarini Santarini
Santarini
Mike Santarini
Steve Leibson [email protected] +1-408-879-2716
Diana Scheben
Scott Blair
/ Teie, Gelwicks & Assoc.
[email protected]
[email protected]
Xcell Software Journal 3
2016 6 14
Xilinx, Inc 2100 Logic Drive San Jose, CA 95124-3400
141-0032 1-2-2 4F
-
!!
FPGA
FPGA/SoC
FPGA/SoC
FPGA FPGA FPGA
FPGA
FPGA FPGA
30! FPGA
Artix-7 FPGA ARTY
AMBA AXI4
FPGA PlanAhead 1 2 3
All Programmable
All Programmable
Zynq SoC
Zynq All Programmable SoCAnybus IP
15! FPGA
http://japan.xilinx.com/webseminar/
All Programmable FPGA SoC 3D IC
Zynq-7000 SoC
UltraScale
28nm 7 FPGA
FPGA/SoC
-
VIEWPOINTLetter from the Publisher 2
COVER STORYZynq MPSoC Doom
6
20
CONTENTS
32016
-
XCELLENCE IN SDR20
XCELLENCE WITH LINUXAMP SoC 28
XCELLENCE IN EMBEDDED DEVELOPMENT34
XCELLENCE IN CLOUD COMPUTING : 40
28
4034
38
-
Running Doom on the Zynq MPSoC
Zynq MPSoC Doom Zynq UltraScale+ MPSoC Xen
Zach PfefferDirector of Embedded Software Development
Xilinx,[email protected]
Edgar Iglesias Sr. Staff Software Engineer Xilinx, Inc.
[email protected]
Alistair FrancisSoftware Engineer Xilinx,
[email protected]
Nathalie Chan King ChoyStaff Software Engineer Xilinx,
[email protected]
Rob Armstrong Jr.Embedded Specialist Field Application Engineer
Xilinx,[email protected]
XCELL SOFTWARE JOURNAL: COVER STORY
6
-
DornerWorks Zynq Ultrascale+
MPSoC Xen Project
1993
Doom
Xen
QEMU ( Quick
Emulator) Zynq UltraScale+ MPSoC
Doom
()
Doom
Zynq UltraScale+ MPSoC QEMU
Xen Doom
Zynq UltraScale+ MPSoC
7
-
RegisterARegisterBRegisterC
UserProgramCounterRegister-SuperSuperProgramCounter
ADD Register3 Register1 Register2 Register1
Register2 Register3
(Register3 = Register1 + Register2)
MOVTO Register2 Register1 Register1
Register2
MOVFROM Register2 Register1 Register1
Register2
ENTERSUPER SUPER
EXITSUPER SUPER USER
USER USER
RegisterSuper
SuperProgramCounter ()
EXITSUPER
USER (
0x0000_0100 0x0FFF_FFFF)
USER
SUPER RegisterSuper
SuperProgramCounter
EXITSUPER
ENTERHYPER ()
SUPER
(0x0000_0000 0x7FFF_ FFFF)
SUPER
ENTERSUPER SUPER
EXITSUPER
USER
USER
(OS)
SUPER USER
OS OS USER
1
EXITSUPER USER
SUPER
USER
ENTERSUPER USER
SUPER
1
USER OS
USER
SUPER USER SUPER
USER
USER
SUPER
1
HYPER
HYPER (RegisterA
RegisterBRegisterCUserProgramCounterRegisterSuper
SuperProgramCounter) 2 (RegisterHyper
HyperProgramCounter) HYPER
XCELL SOFTWARE JOURNAL: COVER STORY
8
-
ADD Register3 Register1 Register2 Register1
Register2 Register3
(Register3 = Register1 + Register2)
MOVTO Register2 Register1 Register1
Register2
MOVFROM Register2 Register1 Register1
Register2
MOVTOPHYS Register2 Register1 Register1
Register2
MOVFROMPHYS Register2 Register1 Register1
Register2
ENTERSUPER SUPER
EXITSUPER SUPER USER
ENTERHYPER HYPER
EXITHYPER HYPER
SWITCHSUPER RegisterHyper RegisterHyper
SUPER
SUPER USER
HYPER
SUPER
HYPER 1
SUPER
HYPER
SWITCHSUPER RegisterHyper
HYPER
EXITHYPER SUPER
SUPER
SUPER
SUPER
1 SWITCHSUPER
RegisterHyper
HYPER SUPER
SUPER
OS OS USER
OS (Windows Linux )
1 20 Linux
OS
OS 1 OS
HYPER
OS HYPER
OS OS
USER SUPER
SUPER HYPER
USER 4 (RegisterA
RegisterBRegisterCUserProgramCounter) 4
(ADDMOVTOMOVFROMENTERSUPER)
USER 0x0000_0100
0x0FFF_ FFFF
SUPER RegisterSuper
SuperProgramCounter EXITSUPER
ENTERHYPER SUPER
0x0000_0000 0x7FFF_FFFF
HYPER
RegisterHyper HyperProgramCounter
SWITCHSUPER EXITHYPER
HYPER
(0x0000_0000 0xFFFF_FFFF)
( 2) HYPER
ARM ARM
ARM ARM
9
-
1 ARM
Zynq UltraScale+ MPSoC 4 ARMv8-A
( 3) 1 ARM Cortex-A53
ARM
ARM
(ARMv8-A)
(Cortex-A53)
ARMv8 4 (
: ARM (D1-1404))
1. 0 (EL0) :
2. 1 (EL1) : OS
3. 2 (EL2) :
XCELL SOFTWARE JOURNAL: COVER STORY
Physical Memory
0x0001
0x0203
0x0607
0x0809
0x0A0B
0x0C0D
0x0E0F
0x0000
....
....
Memory SUPERmode sees
0x0001
0x0203
0x0607
0x0809
....
Address0x0000_00000x0000_0004
Processor
Mode
0x7FFF_FFF80x7FFF_FFFC
Hyper
Before
Physical Memory
0x0001
0x0203
0x0607
0x0809
0x0A0B
0x0C0D
0x0E0F
0x0000
....
....
Memory SUPERmode sees
0x0A0B
0x0C0D
0x0E0F
0x0000
....
Address0x0000_00000x0000_0004
Processor
Mode
0x7FFF_FFF80x7FFF_FFFC
Hyper
After
1 HYPER SWITCHSUPER RegisterHyper
10
-
4. 3 (EL3) :
ARM (D1-1404)
EL0 : EL1 : OS
() EL2 :
EL3 :
ARMv8 EL0 EL2
USER EL0SUPER EL1HYPER
EL2 ARM 4 (EL3)
EL3
EL0 EL1
EL3
EL3 EL0
EL2
ARMv8 EL3 (
)
ARM ARMv8-A
EL1
SVC (Supervisor Call)EL2
HVC (Hypervisor Call)EL3
SMC (Secure Monitor Call)
3 0 65,555
216
SVC SWITCHSUPER
HVC SWITCHHYPER
0x0000_0000
0x0000_00FF
0x0000_0100
0x0FFF_0FFF
ADDMOVTO
MOVFROMENTERSUPER
RegisterA
RegisterB
RegisterC
UserProgramCounter
0x1000_0000
0x7FFF_FFFF
0x8000_0000
0xFFFF_FFFF
....
....
....
....
USER
USER
SUPER
HYPER
EXITSUPERENTERHYPER
RegisterSuper
SuperProgramCounter
SUPER
MOVTROPHYSMOVFROMPHYS
EXITHYPERSWITHCHSUPER
RegisterSuper
SuperProgramCounter
HYPER
2
11
-
USER (EL0)
SUPER (EL1)
USER
1 EL0
EL1 OS
C
malloc() mmap()
sbrk() OS
ARMv8-A Linux
SVC
EL1 OS
OS (
)
Zynq UltraScale+ QEMU
Doom
Zynq UltraScale+ MPSoC Xen
XCELL SOFTWARE JOURNAL: COVER STORY
ARMv8-A
ARM Cortex-R5
Programmable Logic
Processing System
NEON
Floating Point Unit
32 KBI-Cachew/Parity
32 KBD-Cachew/ECC
MemoryManagement
Unit
EmbeddedTrace
Macrocell 1 2
GIC-400 SCU CCI/MMU 1 MB L2 w/ECC
3 4
ARMv7R
GIC
Vendor FloatingPoint Unit
Memory ProtectionUnit
1 2
1 2128 KB
TCM w/ECC32 KB I-Cache
w/ECC32 KB D-Cache
w/ECC
DDR4/3/3LLPDDR4/3
32/64 bit w/ECC
256 KB OCMwith ECC
Memory
SystemManagement
Power Management
FunctionalSafety
Platform Management Unit
Configuration andSecurity Unit
Config AESDecryption,
AuthenticationSecure Boot
Voltage TempMonitor
TrustZone
Graphics Processing UnitARM Mali-400 MP2
GeometryProcessor
PixelProcessor
Memory Management Unit
64 KB L2 Cache
SystemFunctions
Multichannel DMA
TimersWDT, Resets
Clocking & Debug
DisplayPort v1.2a
USB 3.0
SATA 3.1
PCIe 1.0/2.0
PS-GTR
General ConnectivityGbE
USB 2.0CAN
UARTSPI
Quad SPI NORNAND
SD/eMMC
High-speedConnectivity
Storage & Signal Processing
Block RAM
UltraRAM
DSP
High-speed Connectivity
GTH
GTY
100G EMAC
[email protected]
General-purpose I/O
High-performance HDIO
High-density HDIO Interlaken
Video CodecH.265/H.264
System Monitor
3 Zynq UltraScale+ MPSoC
12
-
Zynq UltraScale+
MPSoC
http://www.wiki.xilinx.com/
Doom+on+Xen+Demo
(rootFS)
PetaLinux
rootFS Linux
(
) rootFS
Buildroot PetaLinux 2
Buildroot rootFS
Doom PetaLinux rootFS
Buildroot
Buildroot Linux rootFS
make menuconfig
(Linux
) Buildroot
PrBoom (PrBoom
Doom GNU General Public License [GPL]
PrBoom Doom
)Buildroot Xen
Xen
XenXen
Xen
PetaLinux
PetaLinux FPGA
SoC Linux
petalinux-build petalinux-
boot petalinux-build
petalinux-boot
(+ ) QEMU
PetaLinux
PetaLinux Tools
Documentation Reference Guide (v2015.4)(UG1144)
Linux
UG1144 (v2015.4)
PetaLinux
PetaLinux v2015.4
1 : rootFS rootFS
doom_demo.tar.gz
http://www.wiki.xilinx.com/Doom+on+Xen+Demo
$ cd
$ tar -xzf doom_demo.tar.gz && cd doom_demo
1
(1 Dom0 1 DomU )
PrBoom rootFS
rootFS Linux
v4.3
$ git clone -b v4.3 https://github.com/torvalds/linux.git
Buildroot Buildroot
$ git clone https://git.buildroot.net/buildroot && cd
buildroot
Buildroot
13
-
$ make menuconfig
[Target options] [Target Architecture] [AArch64
(little endian)]
[Target packages] [Games] [prboom] [*]
[Target packages] [Games] [shareware Doom WAD
file] [*]
$ make # ()
PrBoom targetfs
buildroot ./output/
target/
$ for i in $(find ./ -name *oom*); do cp ${i}
/doom_demo/targetfs/${i}; done
Buildroot 1
doom_demo
$ make # Build the host and guest rootFS. ()
:
(Enter )
2: ARM Trusted Firmware (ATF)Linux
rootFS
PetaLinux
ZCU102
PetaLinux QEMU MPSoC
PetaLinux UG1144
(2015.4) AR#66249 japan.xilinx.com
ZCU102 BSP ( )
$ cd $ petalinux-create --type project -s /
Xilinx-ZCU102-v2015.4-final.bsp --name doom_demo_zynqMP
/doom_demo_zynqMP PetaLinux
PetaLinux PetaLinux
$ cd /doom_demo_zynqMP
$ petalinux-build
xen-overlay.dtsi (subsystems/linux/configs/device-
tree/xen-overlay.dtsi)
dom0
reg = ;
reg = ;
chosen
xen,xen-bootargs = console=dtuart dtuart=serial0 dom0_
mem=512M bootscrub=0 maxcpus=1 time r_slop=0 ;
xen,xen-bootargs = console=dtuart dtuart=serial0 dom0_
mem=512M bootscrub=0 maxcpus=4 timer_slop=0 ;
chosen
xen,dom0-bootargs = console=hvc0 earlycon=xen
earlyprintk=xen maxcpus=1 ;
xen,dom0-bootargs = rdinit=/bin/sh console=hvc0
earlycon=xen earlyprintk=xen maxcpus=4 ;
zynqmp.dtsi (subsystems/linux/configs/device-
tree/zynqmp.dtsi)
XCELL SOFTWARE JOURNAL: COVER STORY
14
-
uart0
compatible = cdns,uart-r1p12 ;
compatible = cdns,uart-r1p8 , cdns,uart-r1p12 ;
Xen
$ dtc -I dts -O dtb -i ./subsystems/linux/configs/device-tree/
-o ./images/linux/xen.dtb
./subsystems/linux/configs/device-tree/xen.dts
PetaLinux rootFS
rootFS
PetaLinux PrBoom
rootFS Xen Xen
xen.ub
$ rm /doom_demo_zynqMP/images/linux/Image && rm
/doom_demo_zynqMP/images/linux/xen.ub
$ cp /doom_demo/Image /doom_demo_zynqMP/images/linux/Image
&& cp /doom_demo/xen.ub
/doom_demo_zynqMP/images/linux/xen.ub
u-boot
$ petalinux-boot --qemu --u-boot --qemuargs=-net nic -net nic
-net nic -net nic -net user,net=192.1
68.129.0,dhcpstart=192.168.129.50,host=192.168.129
.1,hostfwd=tcp:127.0.0.1:5900-192.168.129.50:5900
> setenv serverip 192.168.129.1
> tftpb 4000000 xen.dtb; tftpb 0x80000 Image; tftpb
6000000 xen.ub; bootm 6000000 - 4000000
# /boot.sh
# /xen-doom.sh 1
3 : Virtual Network Computing (VNC)
QEMU localhost:5900
Doom ( :
5900 Doom
QEMU hostfwd
[
5901 5902]
)
Doom
Doom
Xen Zynq MPSoC Xen (Xcell
Journal 93 ) 1
2 OS
Xen 1 ( 4)
()
Xen
Dom0
DomU
Dom0 Xen
Xen CPU
1 CPU
Dom0
(
)Dom0 (PV)
Xen
DomU
OS Dom0 PV
DomU 1
(
15
-
) 1 PV
PV OS (Linux)
PV (
QEMU )
Dom0 (
)
Xen Xen (xen-tools
)
xen-tools xl
xl create
VNC
(VFB)
xl Dom0
( 1 1 )
Doom VM
# Guest name
name = guest1
# Kernel image to boot
kernel = /boot/Image
# Kernel command line options
XCELL SOFTWARE JOURNAL: COVER STORY
Dom0 DomU
Xen
Hardware
PV front endsPV back ends
HW drivers
DomU
PV front ends
DomU
PV front ends
4 Xen 1 Xen ( : Xen ARM with Virtualization Extensions)
16
-
extra = console=hvc0 rdinit=/doom.sh
# Initial memory allocation (MB)
memory = 56
# Number of VCPUS
vcpus = 1
vfb = [ type=vnc, vnclisten=0.0.0.0 ]
Xen
3 ( 5)
()
Linux
Linux
(Dom0)
(DomU)
Xen Bus VirtIO 2
1
Speed Device Sharing Security
Emulated Slow Yes Yes
Paravirtualized Medium Yes Yes
Pass-through Fast No Yes (but only if you have an SMMU*)*System
Memory Management Unit
5
17
-
XCELL SOFTWARE JOURNAL: COVER STORY
Dom0
Model of ARM Cortex-A53
DomU0 DomU1
Virtualizationcode
Virtualizationcode
PrBoom(Doom)
VNCServer
VNCServer
net
Linux Kernel Linux Kernel
GIC SMMU GenericTimers
Buffer
Buffer
UART Xen (EL2)
EL1
EL0
Zynq MPSoC Hardware
SDL
libSDL(1.2)
/dev/fb0xen-fbfront
PrBoom(Doom)
Linux Kernel
SDL
libSDL(1.2)
/dev/fb0xen-fbfront
VNC ViewerVNC Viewer
6 : QEMU x86 PetaLinux
18
-
Zynq UltraScale+ MPSoC Doom
( 6)
Cortex-A53 4 ARMv8
EL2 (Dom0
DomU) EL0/EL1 DomU
Linux Doom (PrBoom)
Doom Simple Direct Media Layer (SDL)
SDL () SVC
Dom0
() HVC
Xen Bus VirtIO Dom0
Dom0
VNC
VNC
QEMU
PetaLinux Zynq
UltraScale+ MPSoC
Xilinx GO
URLhttp://japan.xilinx.com/about/app-download.html
19
-
Software-Defined Radio from Concept to Deployment
Avnet PicoZed SDR
XCELL SOFTWARE JOURNAL: XCELLENCE IN SDR
20
-
Robin GetzDirector of Engineering, Global Alliances GroupAnalog
Devices, [email protected]
Luc LangloisDirector, Global Solutions TeamAvnet Electronics
[email protected]
(SDR) Avnet PicoZed SDR RF (SOM) SDR 70MHz 6.0GHz 2x2
PicoZed SDR Analog Devices AD9361 RF Agile Transceiver Z-7035
Zynq-7000 All Programmable SoC [1] () ARM Cortex-A9 / PicoZed
SDR
PicoZed SDR Radio-In-The-Loop
PicoZed SDR RF MathWorks Avnet Analog Devices MathWorks PicoZed
SDR [2]
21
-
MathWorks System object MATLAB Zynq PicoZed SDR RF SDR System
object Radio-In-The-Loop (RITL) PicoZed SDR MATLAB/Simulink (
1)
System object MATLAB ( Simulink ) System object System object
MathWorks Zynq Communications System Toolbox PicoZed SDR
RF AD9361 2 AD9361 2.5GHz 1 / (Msps) PicoZed SDR System
object
Libiio Analog Devices PicoZed SDR SOM
AD9361 Linux I/O (IIO) Libiio [3, 4] (GNU Lesser General Public
License V2.1)
3
XCELL SOFTWARE JOURNAL: XCELLENCE IN SDR
1 System object PicoZed SDR
22
-
Linux sysfs Linux CC++Python PicoZED SDR
IIO (iiod) (LinuxOS XWindows) MATLAB/Simulink [5]GNURadio [6]
IIO Oscilloscope [7] GUI
(QPSKQAMOFDM ) (MAC) MATLABSimulink GNURadio
Libiio PicoZED SDR Libiio ( 8Msps) () (61.44Msps) ( 1 ) PHY
HDL/C
PicoZED SDR /
PicoZed SDR Radio-In-The-Loop HDL/C IP () MATLAB Simulink
PicoZed
2 PicoZed SDR MATLAB System object
23
-
SDR Avnet 2
MathWorks HDL Coder /Zynq SoC ( 4) ARM AMBA AXI4 AXI4-Lite AXI4
AXI4-Lite AXI4-Stream IP MathWorks HDL Workflow Advisor IP
Vivado (IDE) IP [8] HDL Workflow Advisor IP Vivado IDE SoC
MathWorks Embedded Coder C/C++ Zynq SoC ARM Linux HDL IP AXI
(AXI )
XCELL SOFTWARE JOURNAL: XCELLENCE IN SDR
Client Applicationon Linux
Client Applicationon Windows
IIOD Daemon Server
Libiio/Linux
High-level API
Localback end
Networkback end
Network Link
Libiio/Windows
High-level API
Network back end
Linux Kernel
IIO devices
3 Libiio API
24
-
ARM
IIO OscilloscopeADI IIO Oscilloscope (osc) Linux
Linux IIO 4 ( ) IIO
osc LinuxWindowsOS X osc HDMI PC PicoZed SDR FMC Linux osc
Windows
5 PicoZED SDR 2 (I/Q) FFT
PicoZED SDR osc (1)
> git clone
https://github.com/analogdevicesinc/iio-oscilloscope.git
> cd iio-oscilloscope
> git checkout origin/master
(2)
[email protected]:~/iio-oscilloscope$ make
[email protected]:~/iio-oscilloscope$ sudo make install
( 1GHz ARM Cortex-A9 1 DDR3 SDRAM) Zynq SDR SOM
PicoZed SDR
MATLAB and SimulinkAlgorithm and System Design
HDL IP CoreGeneration
Embedded SystemTool Integration
SW Interface Model Generation
FPGA Bitstream SW Build
SoC Platform
4 MathWorks /
5 ADI IIO Oscilloscope
25
-
Zynq SoC SDSoC
Avnet ON PYTHON-1300 SXGA (1,280 x 1,024 ) 1 210 ON
Semiconductor PYTHON-1300 [9] Avnet () PicoZed SDR Zynq SoC
Video4Linux2 API (V4L2) Avnet Linux ( 6)V4L2
DMA Avnet Vivado IP HDL IP () Linux V4L2 Linux
Avnet PicoZed SDR SDR
1. PicoZed SDR 2. MATLAB 3. libiio 4. analogdevicesinc/libiio
GitHub5. IIO System Object6. GNU Radio7. IIO Oscilloscope8. ADI HDL
9. Avnet ON PYTHON-1300-C
XCELL SOFTWARE JOURNAL: XCELLENCE IN SDR
6 Avnet ON PYTHON-1300 V4L2
26
-
ASIC
() TEL (03) 5792-8210 [email protected]() TEL (045)
477-2001 [email protected] 2016 Xilinx, Inc. All
rights reserved.
-
AMP up Your Next SoC Project
AMP SoC Scott McNuttSenior Software EngineerDesignLinx Hardware
Solutions, [email protected]
XCELL SOFTWARE JOURNAL: XCELLENCE WITH LINUX
28
-
OS Linux
go to (RTOS) Linux
(AMP) RTOS Linux
(SoC) CPU I/O Zynq-7000 All Programmable SoC ARM Cortex-A9 (
MACUSBDMASD/MMCSPICAN ) Linux/RTOS AMP SoC
AMP PCI Linux RTOS 2 1 PCI AMP () ( ) Linux/RTOS AMP
29
-
AMP Linux AMP Linux
Linux Linux
(UP) (SMP) 2 UP AMP 2
SMP 1 ( 1) SMP
AMP UP SMP
(remoteproc)
( ) AMP Linux remoteproc 1 SMP 2 AMP SMP
RTOS
XCELL SOFTWARE JOURNAL: XCELLENCE WITH LINUX
Core 0 Core 1
Logic
Linux (SMP)
Standard I/O
Internal Interconnect
1 SMP
Core 0 Core 1Remote Processor
Logic
Linux (SMP) RTOS
Standard I/O
Internal Interconnect
2 Linux SMP AMP
30
-
( RTOS ) ELF (Executable and Linkable Format) RTOS PCI RTOS
Linux
Linux
1
I/O
(VDEV) VDEV Linux VDEV
Linux I/O VDEV VDEV
(rpmsg)
Linux I/O
Linux rpmsg
rpmsg
rpmsg service dlinx-h323-v1.0
Linux SMP AMP SMP 1
31
-
Linux remoteproc rpmsg
DesignLinx Hardware
Solutions Linux FreeRTOS rpmsg AMP
PCB SoC Linux
() () PCB SoC
XCELL SOFTWARE JOURNAL: XCELLENCE WITH LINUX
P(RTOS)
Control CPU(RTOS)
P(RTOS)
P(RTOS)
P(RTOS)
PCB
SoC
P
Core 0
P P P
Core 1
3 PCB SoC
32
-
SoC ( 3) PCB SoC
3 PCB Zynq-7000 AP SoCARM 1 CPU
( MicroBlaze ) 1 ARM Linux SMP ( 4)
Linux ARM ( ) Linux (Wi-FiBluetooth) ( FTPSSHSNMP) (DOSNFScramfs
) (PCIeSPIUSBMMC)
SoC
AMP SoC
UltraScale+ MPSoC 64 ARM Cortex-A5332 ARM Cortex-R5 (GPU) ()
Linux
Linux/RTOS AMP DesignLinx Hardware Solutions DesignLinx /
FPGA
Core 0(Linux SMP)
Logic Core 1(RTOS)Standard
I/O
Internal Interconnect
Internal Interconnect
Soft CoreP
Soft CoreP
Soft CoreP
Soft CoreP
CustomLogic
CustomLogic
CustomLogic
CustomLogic
4 SoC
33
-
A Recipe for Embedded Systems
XCELL SOFTWARE JOURNAL: XCELLENCE IN EMBEDDED DEVELOPMENT
34
-
Adam Taylor Chief Engineer [email protected]
3 / (EMI EMC)
35
-
( 1)
1.
2.
3.
4.
5.
6. 1
SHALL ()
SHOULD ()
XCELL SOFTWARE JOURNAL: XCELLENCE IN EMBEDDED DEVELOPMENT
Customer System Subsystem(Equipment)Device(FPGA)
Requirements Flow Down & Reviews SRR, SDR, PDR
Verification and Compliance & Reviews CDR, MRR, TRR, TRB,
DRB
SRR = System Requirement ReviewSDR = System Design ReviewPDR =
Preliminary Design ReviewCDR = Critical Design Review
MRR = Manufacturing Review TRR = Test Readiness ReviewTRB = Test
Review Board DRB = Delivery Review Board
1
36
-
() 1
1 (TRL) (TRL 1) (TRL 9) 9 TRL
TRL TRL TRL TRL /
IsolatingDC/DC
IntermediateVoltage
IP Voltage SwitchingRegulator
SwitchingRegulator
SwitchingRegulator
LinearRegulator
Reset Reset
I/O Voltage
Core Voltage
2
37
-
I/O
() FPGA/SoC
1
FPGA/SoC ARM AMBA Advanced Extensible Interface (AXI)
(COTS) COTS
1 AC/DC DC/DC 2
FPGA
1 (1 )
1
SRAM FPGA
XCELL SOFTWARE JOURNAL: XCELLENCE IN EMBEDDED DEVELOPMENT
38
-
() (ICD)
1
( )
1
3 1 2 (GND)
EMC ICD
1. FPGA Xcell Journal 8182 34 40
2. Xcell Journal 85 38 41
3. Design Reliability: MTBF Is Just the BeginningXcell Journal
88 38 43
Signal 1
Signal 2
Signal 1
Signal 2
GND GND
3 1
39
-
Next Disruptive Digital Business Model Innovation: Neuroplastic
Clouds
:
FPGA IaaS
Francesc FonsDr.-Ing, MBAESADE Business School, Barcelona,
[email protected]
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IaaS (Infrastructure as a Service) IaaS (QoS) DNA FPGA
10
41
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IT IT
FPGA
SoC IaaS (FPGA) / ( 1)
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Client
Client
Client Client
Internet/Ethernet
Client
Data Center Server
Neuroplastic Cloud
SW application
HW accelerators
HW crypto
HW firewall
CPUDOMAIN
FPGADOMAIN
1
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/
FPGA FPGA Microsoft IBM Intel Qualcomm Baidu FPGA FPGA
FPGA ( QoS )
() () ( ) 3
HPC (HPC)
HPC HPC HPC
HPC HPC ()
QoS
43
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(SME) HPC ( ) HPC
FPGA FPGA FPGA
IT IaaS ( ) QoS
FPGA /
FGPA 1 FPGA CPU
FPGA
FPGA ()
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QoS
ID
IaaS FPGA FPGA
FPGA IC (PUF) FPGA (TRNG)
AES (Advanced Encryption Standard) (ECC) (XOR ) CPU FPGA AES
() () ()
45
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(RoT)
Google Project Vault ( microSD )FPGA Microsoft Azure SmartNIC (
CPU )Catapult Project (Microsoft FPGA Bing )Bitfusion Cloud Adaptor
( FPGA ) FPGA Kintex UltraScale FPGA Zynq Ultrascale+ MPSOC
FPGA
FPGA CPU GPU
FPGA
FPGA
FPGA
IT IT
FPGA
CPU
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FPGA E-Learning I/O Architecture Wizard Foorplan Editor
VHDL
VHDL
Verilog System Verilog
Verilog
Vivado
VivadoFPGA
System Verilog
VivadoFPGA
7
Chip Scope Pro
FPGA
AMS
IO
SimlinkMathWorks
C : Vivado HLS
SystemGenerator DSP
DSP
Zynq
Zynq
Zynq
Vivado FPGA
Linux
/ Web
www.avnet.co.jp/training.aspx
www.shinko-sj.co.jp/xilinx/traning/index.html
www.paltek.co.jp/seminar/index.htm
www.hdlab.co.jp/web/x500x/
Japan.xilinx.com/training/
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Xcell Journal Daily Blog Xcell Journal
Daily Blog
Recent
: www.forums.xilinx.com/t5/Xcell-Daily/bg-p/Xcell
Xcell Journal
Xcell Daily Blog
All Programmable Smarter System
AMDARMHuaweiIBMMellanoxQualcomm CCIX (Cache Coherent
Interconnect for Accelerators)
UltraScale+ All Programmable 3D-on-3D HBM 10 Nutaq LTE : Matlab
LTE System Toolbox 16 MIMO FPGA PicoSDR 8x8 Amiga 2000 2016
Spartan-6 FPGA MicroBlaze SWAP-C ()
