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1
EE462L, Fall 2012PI Voltage Controller for DC-DC
Converters
2
Vpwm (0-3.5V)
PWM mod. and MOSFET
driver
DC-DC conv.
Vout (0-120V)
Vset Vout
(scaled down to about 1.3V)
PI controller
PWM mod. and MOSFET
driver
DC-DC conv.
error
+ –
Open Loop, DC-DC Converter Process
DC-DC Converter Process with Closed-Loop PI Controller
PI Controller for DC-DC Boost Converter Output Voltage
Hold to 90VVpwm
!
3
Vset Vout
(scaled down to about 1.3V)
PI controller
PWM mod. and MOSFET
driver
DC-DC conv.
error
+ –
The Underlying Theory
Hold to 90VVpwm
)()()()( sGsGsGsG DCDCPWMPI
iPPI sT
KsG1
)(
Proportional Integral
)(1
)(
)(
)(
sG
sG
sV
sV
set
out
sTsGGsG DCDCPWMconv
1
1)()(
Our existing boost process
4
Vset Vout
PI controller
PWM mod. and MOSFET
driver
DC-DC conv.
error e(t)
+ –
Vpwm
1( ) ( ) ( )PWM P
i
V t K e t e t dtT
Theory, cont.
• Proportional term: Immediate correction but steady state error (Vpwm equals zero when there is no error (that is when Vset = Vout)).
• Integral term: Gradual correction
Consider the integral as a continuous sum (Riemman’s sum)
Thank you to the sum action, Vpwm is not zero when the e = 0
Has some “memory”
!
5
E.g. Buck converter
• Vin = 24 V
• Vout = 16 V (goal)
• L = 200 uH, C = 500 uF, R = 2 Ohm
6
E.g. Buck converter
• Vin = 24 V
• Vout = 16 V (goal)
• L = 200 uH, C = 500 uF, R = 2 Ohm
• Ki = 40, Kp = 0
!
iL
vC
d
e
1( ) ( )PWM
i
V t e t dtT
7
E.g. Buck converter
• Vin = 24 V
• Vout = 16 V (goal)
• L = 200 uH, C = 500 uF, R = 2 Ohm
• Ki = 10, Kp = 0
!
iL
vC
d
e
1( ) ( )PWM
i
V t e t dtT
8
E.g. Buck converter
• Vin = 24 V
• Vout = 16 V (goal)
• L = 200 uH, C = 500 uF, R = 2 Ohm
• Ki = 0, Kp = 1
!
iL
vC
d
e
( ) ( )PWM PV t K e t
9
E.g. Buck converter
• Vin = 24 V
• Vout = 16 V (goal)
• L = 200 uH, C = 500 uF, R = 2 Ohm
• Ki = 0, Kp = 0.1
!
iL
vC
d
e
( ) ( )PWM PV t K e t
10
E.g. Buck converter
• Vin = 24 V
• Vout = 16 V (goal)
• L = 200 uH, C = 500 uF, R = 2 Ohm
• Ki = 10, Kp = 1
!
iL
vC
d
e
1( ) ( ) ( )PWM P
i
V t K e t e t dtT
11
iii CRT
sTsTKsG
iP
1
11)(
i
p
Pi
P
set
out
TTT
Kss
KTs
T
K
sV
sV
11
1
)(
)(
2
22 2 nnss
Response of Second Order System(zeta = 0.99, 0.8, 0.6, 0.4, 0.2, 0.1)
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
0 2 4 6 8 10
0.99
0.1
0.4
0.2
in TT
12
T
K pn
12
121
212
iinp T
T
TT
TTK
TTi 8.0
65.0 45.0pK
Recommended in PI literature
From above curve – gives some overshoot
Theory, cont.
)(1
)(
)(
)(
sG
sG
sV
sV
set
out
work!
12
Improperly Tuned PI Controller
Figure 12. Closed Loop Response with Mostly Proportional Control (sluggish)
Mostly Proportional Control – Sluggish, Steady-State Error
Figure 11. Closed Loop Response with Mostly Integral Control (ringing)
Mostly Integral Control - Oscillation
90V 90V
13
Op Amps
Assumptions for ideal op amp
Vout = K(V+ − V− ), K large (hundreds of thousands, or one million)
I+ = I− = 0
Voltages are with respect to power supply ground (not shown)
Output current is not limited
– + V+
Vout
V− I−
I+
!
14
Example 1. Buffer Amplifier(converts high impedance signal to low impedance signal)
– + Vin
Vout
) = K(Vin – Vout)( −+out VVKV
inoutout KVKVV
inout KVKV )1(
KVV inout
1
K
K is large
inout VV
!
15
Example 2. Inverting Amplifier(used for proportional control signal)
– +
Rf
Rin Vin
Vout
KVVKVout )0( , so K
VV out .
KCL at the – node is 0
f
out
in
in
R
VV
R
VV.
Eliminating V yields
0
f
outout
in
inout
R
VK
V
R
VK
V
, so
in
in
ffinout R
V
RKRKRV
111. For large K, then
in
in
f
out
R
V
R
V
, so
in
finout R
RVV .
!
16
Example 3. Inverting Difference(used for error signal)
– +
Vout
Va
Vb R
R R
R
VV
KVVKV bout 2
)( , so
K
VVV outb
2.
KCL at the – node is 0
R
VV
R
VV outa , so
0 outa VVVV , yielding 2outa VV
V
.
Eliminating V yields
22outab
outVVV
KV , so
22about
outVV
KV
KV , or
221 ab
outVV
KK
V .
For large K , then baout VVV
!
17
Example 4. Inverting Sum(used to sum proportional and integral control signals)
– +
Vout Va
Vb
R
R
R
KVVKVout )0( , so K
VV out
.
KCL at the – node is
0
R
VV
R
VV
R
VV outba , so
outba VVVV 3 .
Substituting for V yields outbaout VVVK
V
3 , so baout VVK
V
13
.
Thus, for large K , baout VVV
!
18
Example 5. Inverting Integrator(used for integral control signal)
– +
Ci
Ri
Vin
Vout
Using phasor analysis, )~
0(~
VKVout , so
K
VV out
~~ . KCL at the − node is
01
~~~~
Cj
VV
R
VV out
i
in
.
Eliminating V~
yields 0~
~~~
outout
i
inout
VK
VCj
R
VK
V
. Gathering terms yields
i
in
iout R
V
KCj
KRV
~1
11~
, or iniout VK
CRjK
V~
111~
For large K , the
expression reduces to iniout VCRjV~~ , so
CRj
VV
i
inout
~~
(thus, negative integrator action).
For a given frequency and fixed C , increasing iR reduces the magnitude of outV~
.
!
19
(Note – net gain Kp is unity when, in the open loop condition and with the integrator disabled,
Vpwm is at the desired value)
Ri is a 500kΩ pot, Rp is a 100kΩ pot, and all other resistors shown are 100kΩ, except for the 15kΩ resistor. The 500kΩ pot is marked “504” meaning 50 • 104 . The 100kΩ pot is marked “104” meaning 10 • 104 .
– +
– +
– +
– +
– +
– +
error
Summer (Gain = −11)
Proportional (Gain = −Kp)
Inverting Integrator (Time Constant = Ti)
Buffers (Gain = 1)
Vset
αVout
Vpwm
Rp
Ci Ri
15kΩ
Difference (Gain = −1)
Op Amp Implementation of PI ControllerSignal flow