1st Sem M.tech Question Bank Odd 11

P.E.S.I.T DEPT. OF TE 1st SEM M.Tech 1/22

SL. NO.

SUBJECTS CODE STAFF PAGE NO

1. ANTENNA THEORY AND DESIGN

10EC011 Ms.Kavitha Y.C.

2-5

2. ADVANCED DIGITAL COMMUNICATIONS

10EC006 Mr.Raghavendra M.J.

6-7

3. PROBABILITY AND RANDOM PROCESS

10EC124 Ms. Rekha S.S.

8

4. DIGITAL CIRCUITS AND LOGIC DESIGN

10EC029 Ms. Ravikant G Biradar

9-19

5. CMOS VLSI DESIGN 10EC021 Mr.Prabhakar Mishra

20-22

Class Incharge : Ms. Kavitha Y.C.

M.Tech 1st SEM QUESTION BANK

INDEX


QUESTION BANK

ANTENNA FUNDAMENTALS AND DEFINITIONS

Subject code: 10EC011 Faculty: Y.C.K 1. A) Explain the radiation mechanism for an antenna. 10 marks

B) Explain the terms with respect to antenna: i)Directivity ii)gain iii) antenna impedance iv)radiation

efficiency v) polarization. 10 marks

2. A) Explain the procedure for finding the solution of Maxwell‟s equation for radiation problems B) Give the procedure to find solution of Maxwell‟s equation for radiation problems for an ideal dipole.

A) Explain Farfield conditions and field regions

B) Give the steps for evaluation of radiation fields 20 marks

3. A) With a neat diagram explain radiation pattern and define its parameters. 12 marks B) An Antenna radiates a total power of 100 watts in the direction of maximum radiation, field strength at

a distance of 10km was found to be 12mv/m, what is the gain of an antenna, assume free space

Propagation. If the efficiency is 90%, find the directivity 8 marks

4. A) An antenna has a far-field pattern which is independent of Φ but varies with as follows:

F=1 for o0 ≤ ≤ 300

F=0.5 for 600≤ ≤ 1200

F= 0.707 for 1500 ≤ 1800

F=0 for 300 ≤ ≤ 600 and 1200 < <1500

Find directivity. Also find directivity in the direction =900. 7 marks

B) Compute the gain of an antenna which has a radiation efficiency of 95% and the following radiation

pattern F() = 1 00≤ < 200

.707 200≤ <1200

0 1200≤ <1800 5 marks

C) A power pattern is given by cos for 0<= <=/2 and is zero for /2<=<= 8 marks

i) calculate the directivity for n=1,2,and 3 ii) explain the directivity value for the case of n=0.

5. A) Two space crafts are separated by a distance of 100mm, each has an antenna with D=1000 operating at 2.5 GHz. If craft A's receiver requires 20 db over 1pw,what transmitter power is required on craft B to achieve this signal level 10 marks B) What is the maximum power received at a distance of 0.5km over a free space 1GHz circuit

consisting of a transmitting antenna with a 25db gain and a receiving antenna with 20 db gain, the gain

is w.r.t isotropic source, the transmitting antenna input is 150 watts 10 marks


6. A) Calculate the Directivity for the following unidirectional sources having the following power patterns

U= Um sin sin2 Φ

U= Um sin sin3 Φ

U= Um sin2 sin3Φ

U has a value only for 0<< and 0<Φ and 0 else where. 7 marks

B) Calculate the Directivity of the unidirectional cosine power pattern U= Um cos 7 marks

C) An Isotropic radiator has a field strength given by E=10I/r volts/m, where I is the terminal current

and „r‟ is the distance in meters. Find the radiation resistance. 6 marks

Resonant antennas:

8. A) Design an optimum directivity vee dipole to have directivity of 6dB 10 marks

B) Calucalte input impedance of a folded dipole of length L=.4 wire size2a=.001 and

Wire spacing d=12.5a using the transmission line model. 10 marks

9. Explain yagi-uda antennas 20 marks 10. Explain microstrip antennas 20 marks 11. A) Derive the expression for the electric field of a short dipole 10 marks

B) Derive the expression for the radiation resistance of a short electric dipole 10 marks

Antenna arrays:

12. Derive an equation for the total field produced at a large distance in the direction of Φ due to two isotropic point sources having

a) Same amplitude and phase

b) Same amplitude and opposite phase

c) same amplitude and phase quadrature

d) same amplitude and any phase

e) unequal amplitude and any phase 20 marks

13. For the a) to c) find the maximum, minimum and half Power Points and plot the field pattern 8 marks

14. 'N' identical antennas are uniformly spaced along a straight line and energized by currents of equal amplitude but differing by phase successively. Derive an expression for field intensity at a distant point in the direction of Φ 10 marks

15. Show that the magnitude of the array factor of a linear array of 'n' isotropic point sources of equal amplitude and spacing is given by E=(sin nψ /2) /(n sin ψ /2) 8 marks

16. What is a broadside array obtain an expression for the direction of Pattern Maxima, minima and the width of the Principle lobes (Beam width) 5 marks

17. What is a end fire array obtain an expression for the direction of Pattern Maxima, minima and the width of the Principle lobes (Beam width) 5 marks

18. Distinguish between broadside array and end fire array. What specific properties make them useful at H.F 10 marks

19. Explain the principle of pattern multiplication with an example 10marks


20. What is an extended end fire system obtain an expression for pattern maxima and beam width compare with this an ordinary end fire system. 8 marks

21. a) δ=0 and Eo= sin Φ for each array

b) δ=0 and Eo= cos Φ for each array

c) δ=Π and Eo= cos Φ for each array

d) δ=Π and Eo= sins Φ for each array

e) δ=Π/2 and Eo= cos Φ for each array 16 marks

Where δ is the phase difference between the sources

22. Two space crafts are separated by a distance of 100mm, each has an antenna with D=1000 operating at 2.5 GHz. If craft A's receiver requires 20 db over 1pw,what transmitter power is required on craft B to achieve this signal level 8 marks

23. What is the maximum power received at a distance of 0.5km over a free space 1GHz circuit consisting of a transmitting antenna with a 25db gain and a receiving antenna with 20 db gain, the gain is w.r.t isotropic source, the transmitting antenna input is 150 watts. 8 marks

24. What is the maximum Effective aperture of a microwave antenna with a directivity of 900? 8 marks 25. A 200 kw medium wave transmitter employs an antenna with a directivity of 1.5 in the horizontal

plane, determine the electric field strength at a distance of 1.5 km. 6 marks 26. A Linear array consists of 4 isotropic point sources, the distance between the adjacent element is λ/2,

the power applied with equal magnitude and a phase difference of -dr. Obtain the field pattern and find BWFN and HPBW 10 marks

27. What are the advantages of using a folded dipole over a half wave dipole? 28. Explain the term linear array and bring out the properties of broadside and end- fire arrays. Sketch

the directional pattern for these arrays. 6 marks 29. Using the principle of pattern multiplication show that a linear array with binomial amplitude

distribution has a pattern for these arrays. 6 marks 30. Show that the HPBW of a long uniform broad side array is given by 50.8 degrees /L/ λ

6 marks

Broad band antennas

31. Explain helical geometry. 20 marks 32. Explain Normal & Axial mode radiation of a helical antenna 20 marks 33. Derive the expression for axial ratio for a helix radiating in the axial mode 20 marks 34. Explain radiation pattern for traveling wave antenna 20 marks 35. With neat diagram explain radiation pattern for i) finite biconical antennas ii)infinite biconical antenna

iii)discone antenna 20 marks 36. Explain i)sleeve monopoles ii) sleeve dipole 20 marks 37. Write a note on spiral antennas 20 marks 38. Explain log- periodic antenna 20 marks


Aperture antennas

39. Explain why and how a paraboloidal reflector may be used as directive antenna. 20 marks 40. Write a short note on parabolic reflector 20 marks 41. Give the construction of a parabolic reflector, what it tends to be a highly directional antenna

20 marks

42. Give gain and efficiency expression for reflector antennas 20 marks 43. Explain different reflector antennas 20 marks 44. Explain feed antennas used in practice 20 marks 45. Explain general feed model 20 marks 46. Derive expression for directivity using aperture field integration method 20 marks 47. Give design principles used in feed antennas 20 marks

Antenna synthesis:

48. Explain i) woodward –lawson sampling synthesis procedure and ii) fourier transform method for line source shaped beam 20 marks

49. For linear array shaped beam explain : i) fourier series synthesis method ii) wood ward-lawson sampling method. 20 marks

50. Explain i) dolph-chebyshev linear array method and ii) Taylor line source methods for low side lobe narrow main beam. 20 marks

51. Synthesize a sector pattern with c=0.5 using the fourier series method for an array of 20 elements that are spaced 0.6λ apart i) determine the element locations and current values ii) plot the radiation pattern in linear, rectangular form as a function of w 20 marks

52. Design a dolph-chebyshev broadside array of five,half wave lengthed spaced elements for 30db side lobes i)verify the current distribution ii) compute the directivity 20 marks

53. Design a broad side dolph-chebyshev array with six, 0.6 λ spaced elements for -25db side lobes i) obtain the element currents ii) plot the pattern in logarithmic rectangular form 20marks

Method of moments , CEM for antennas:

54. Explain pocklington‟s integral equations 20 marks 55. Explain weighted residual method for method of moments. 20 marks 56. Derive moment of method procedure. 20 marks 57. Explain wedge diffraction theory to determine the field in the forward scattering direction 20 marks

58. Explain ray fixed coordinate system 20 marks 59. Explain e-plane analysis of horn antennas 20 marks 60. Illustrate the :i)radiation by a slot on a finite ground plane ii) radiation by a monopole on a finite

ground plane 20 marks 61. Explain the UTD method for cylindrical parabolic antenna 20 marks 62. Explain the concept of equivalent currents 20 marks 63. Explain the diffraction concept for curved surfaces 20 marks 64. Explain method of stationary phase 20 marks 65. Explain physical theory of diffraction 20 marks

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QUESTION BANK

ADVANCED DIGITAL COMMUNICATION

Sub.code:10EC006 Faculty: MJR

1) Obtain an expression for the maximum SNR of a Matched filter demodulator using Time domain

approach.

2) State and prove different properties of Matched filter

3) Explain M-ary PSK modulation scheme with its basis functions and obtain an expression for the

union bounded probability of error.

4) Describe a typical square M-QAM modulation scheme(say 16-QAM).Obtain an expression for the

probability of error for a square M-QAM .

5) State the time domain expressions for a DPSK modulated signal. With the help of a block diagram

explain how a DPSK signal is demodulated and state the probability of error. How does this Pe

compare with coherent BPSK.

6) Explain Maximum – Likelihood Sequence Detection algorithm

7) Obtain an expression for the probability of error for Binary Modulation.

8) Obtain an expression for the probability of error for M-ary PAM

9) Obtain an expression for the probability of error M-ary PSK.

10) Obtain an expression for the probability of error of QAM

11) Relevant problems of chapter 5 of T1.

12) Briefly explain with a figure how a convolutional code with a rate Rc= k/n and constant length K is

generated. When a code is termed catastrophic?

13) A convolutional code is described by its generators g1=[11 0],g2=[1 0 1],g3=[1 1 1]. Draw the

encoder corresponding to this code and obtain the state transition and trellis diagrams. Derive its

transfer function and compute the free distance of this code. Is this code catastrophic?


15) Briefly explain the Nyquist criterion for an inter symbol interference free transmission through a

channel

16) Explain viterbi algorithm for the Discrete-Time White Noise Model.

17) Briefly explain linear transversal filter.


18) Briefly explain zero forcing filter.

19) Explain Mean Square Error Criterion of an equalizer.

20) Write a note on performance characteristics of the MSE Equalizer.

21) Explain the concept of Coefficiant optimization with respect decision feed back equalizer.

22) Explain Predictive decision feed back equalizer.

23) Explain Turbo equalization.

24) Relevant problems of chapter 10 of T1

25) With the aid of block diagram obtain a frequency response expression for the receiver filter that has

infinite tap equalizers for an optimum receiver and includes ISI and AWGN.

26) Describe the error metric for linear adaptive prediction and obtain expressions for an LMS algorithm

implementation. Discuss the convergence for the LMS algorithm with reference to the Mean square

error.

27) Explain with a neat block diagram the method to train an adaptive equalizer and sustain it in decision

mode.

28) Briefly explain the meaning of the terms processing gain and jamming margins with reference to

direct sequence spread spectrum signal.

29) Thirty equal power users each transmitting at a rate of 10 Kbps employ DS spread spectrum BPSK

over a shared communication channel. Ignore effect of AWGN at the receiver determine the chip rate

to obtain a Probability of error equal to 10-5.(Assume that to meet this Pe, required Eb/N0=10.0)

30) Explain slow and fast frequency hopped spread spectrum transmitters with the help of diagrams.

31) Explain the advantages of FH spread spectrum over DS spread spectrum.


33) Explain DS-QPSK modulator

34) Explain Digital cellular CDMA system based on DS spectrum.

35) With a neat block diagram explain FH spread spectrum system

36) With a neat block diagram explain independent tone FH Spread spectrum system.

37) Obtain an expression for the received output of a tapped delay line channel model for digial signaling

over a frequency selective slowly fading channel. Assuming no AWGN derive the decision variables

for binary orthogonal signaling that are detected in a RAKE demodulator

************


QUESTION BANK

PROBABILITY AND RANDOM PROCESS

Subject Code: 10EC124 Faculty: Ms.SSR

Chapter 2: Problems 2.1, 2.2, 2.3, 2.4, 2.5, 2.6, 2.7, 2.8, 2.10, 2.11, 2.12, 2.13, 2.14, 2.15, 2.16, 2.17, 2.18,

2.19, 2.20, 2.21, 2.22, 2.26, 2.27, 2.28, 2.29, 2.31-2.32.

1. Chapter 3: Problems 3.1, 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 3.10, 3.11, 3.12, 3.13, 3.14, 3.15, 3.16, 3.17, 3.18.

2. Chapter 4: Problems 4.1, 4.2, 4.3, 4.4, 4.5, 4.8, 4.9, 4.10, 4.12, 4.13, 4.14, 4.16-4.45.

3. Chapter 5: Problems 5.1, 5.2, 5.3, 5.4, 5.5-5.18, 5.30-5.36.

4. Chapter 6: Problems 6.1, 6.2, 6.3, 6.4, 6.5, 6.6, 6.8, 6.10, 6.11.

5. Chapter 8: Problems 8.1, 8.2, 8.3, 8.4, 8.7, 8.9, 8.11, 8.14, 8.16.

The above problems are cited from the following text book:

1. Probability and random processes: application to Signal processing and communication - S L Miller and D C Childers: Academic Press / Elsivier 2004.

************


QUESTION BANK

DIGITAL CIRCUITS AND LOGIC DESIGN

Subject Code: 10EC029 Faculty: Mr. RGB CHAPTER1: Threshold Logic

1.Q Find the function f (x1, x2,x3,x4) realized by each of the threshold networks shown in

Fig. Show the map of each function.

2.Q Find the function f (x1, x2,x3,x4) realized by each of the threshold networks shown in

Fig. Show the map of each function.

3.Q Find the inequalities for the function f (x1, x2, x3) = ∑(0,1,3) and check whether it is a

threshold function

4.Q Determine whether the function f(x1,x2,x3,x4) = ∑(0,1,3,4,5,6,7,12,13) is a threshold

function, and, if it is, find a weight-threshold vector.

5.Q By examining the linear inequalities, determine which of the following functions is a

threshold function, and for each one that is, find the corresponding weight-threshold

vector.

a) f1(x1, x2, x3) = ∑(1,2,3,7)

b) f1(x1, x2, x3) = ∑(0,2,4,5,6)

c) f1(x1, x2, x3) = ∑(0,3,5,6)


6.Q a) Determine the function f(x1,x2,x3,x4) realized by the network shown in Fig

b) Show that f(x1, x2, x3, x4) can be realized by a single threshold element. Find such

an element.

7.Q Consider the type of threshold functions for which all the weights are equal that is,

w1 = w2 = …… = wn. In particular, those f(x1, x2,,,,,,, xn) for which

n f(x1, x2,,,,,,, xn) = 1 if and only if ∑xi ≥ T/w

i=1 n

f(x1, x2,,,,,,, xn) = 0 if and only if ∑xi < T/w i=1 (a) Determine the value of f when (1) T/w = 0, (2) T/w > n, (3) 0 < T/w ≤ n.

(b) Show that for some positive integer k, f can be expressed as a symmetric function, i.e.,

f(x1, x2,,,,,,, xn) = Sk,k+1,….,n(x1,x2,….,xn)

and determine k interms of T and w.

8.Q. Prove that if f(x1, x2,….., xn) is a threshold function with weight-threshold vector

V1 = {w1, w2… wn; T}, then its dual, f(x1, x2,,,,,,, xn) ,is also a threshold function.

a) Determine its weight-threshold vector.

b) Prove that if f is a threshold function, then so is

g = xi‟f + xifd

where xi may or may not be a member of the set {x1,x2,….,xn}.

Find the weight-threshold vector of g.

9.Q. (a) Prove that a necessary and sufficient condition for a function to be unate is that all

its prime implicants intersect in a common implicant

(b) Prove that the minimal sum-of-products form of a unate function is unique and

consists of all prime implicants.

10.Q For each of the following functions find a two-element cascade realization of the type

a) f1(x1, x2, x3, x4) = ∑(2,3,6,7,8,9,13,15)

b) f2(x1, x2, x3, x4) = ∑(0,3,4,5,6,7,8,11,12,15)


CHAPTER2: Reliable Design and Fault Diagnosis

11.Q Analyze each of the circuits in Fig. for static hazards. Redesign each circuit so that it

becomes hazard-free.

12.Q. Two different contact realizations, G1 and G2, of a function F are connected in

parallel, as shown in Fig. Discuss the hazards of the overall network in terms of the

hazards in the individual networks. In particular, consider the cases:

a) Both networks are hazard-free.

b) One network is hazard-free.

c) Neither network is hazard free.

13.Q. Consider a network F which has both cut- and tie-set hazards and cannot be

resynthesized. It is required to eliminate these hazards by adding terminal networks

G1, G2, and G3 as shown in Fig. Derive an algorithm for determining G1, G2, and G3,

so that the overall network realizes F and has no static hazards.


14.Q. In the gate network if Fig, only wires m, n, p, and q may become either s-a-0 or s-a-1,

while the remaining wires are considered “safe”

a) Construct a fault table.

b) Find a minimal cover of the table and use it to determine a minimal fault-detection

experiment.

15.Q. In the gate network if Fig, only wires m, n, p, and q may become either s-a-0 or s-a-1,

while the remaining wires are considered “safe”

a) Construct a fault table.

b) Find a minimal cover of the table and use it to determine a minimal fault-detection

experiment.

c) Find a preset fault-location experiment and show its fault dictionary.

16.Q. For the circuit of Fig:

a) Find tests to detect the faults h s-a-0 and h s-a-1.

b) Find tests to distinguish between the above faults


17.Q. Consider the circuit of Fig:

a) Find tests to detect the faults h s-a-0 and h s-a-1.



a) Find tests to detect the faults h s-a-0 and h s-a-1, k s-a-0 and k s-a-1.


19.Q. Given the fault table shown in Table, where z denotes the fault-free output for the

corresponding test.

a) Find a minimal set of tests to detect all single faults

b) Find a preset set of tests to locate all single faults and show the corresponding fault

dictionary.

c) Find a minimal adaptive fault-location experiment.


20.Q. For the circuit shown in Fig

a) Find all the tests which detect each of the faults, B s-a-1 and h s-a-0

b) Find the tests which detect the multiple fault B s-a-1 and h s-a-0

c) Find all the tests that distinguish between the above two faults.


a) Find all the tests to detect input A‟s-a-0 by using the sensitized-path approach and by using

Boolean differences

b) Show all the single faults that can be detected by the test (ABCD) = (1111).

22 Q. Show a quadded-logic realization of the circuit of Fig: Indicate the correction of the

longest propagated error.


CHAPTER 3: Capabilities, Minimization, and Transformation of sequential Machines

23Q. a) Find the equivalence partition for the machine shown in Table.

b) Show a standard form of the corresponding reduced machine

24Q. a) Find the equivalence partition for the machine shown in Table.

b) Show a standard form of the corresponding reduced machine

c) Find a minimum-length sequence that distinguishes state A from state B.

25Q. For each of the machines in Table, find the equivalence partition and a corresponding

reduced machine in standard form

26Q. Two columns of the state table of an eight-state, p-inputs finite-state machine are shown in

Table. Prove that this machine has either no equivalent states or else no distinguishable states.

27Q. A transfer sequence T(Si, Sj) is defined as the shortest input sequence that takes a


machine from state Si to state Sj.

a) Find a general procedure to determine the transfer sequence for a given machine and two specified states.

b) Find a transfer sequence T(A,G) for the machine shown in Table.

28Q. For each of the incompletely specified machines shown in Table, find a minimum-

state reduced machine containing the original one.

CHAPTER 4: Structure of Sequential Machines

29Q. Consider machine M2 given in Table. Show its closed partitions and draw its

schematic diagram

30Q. a) Given the machine shown in Table and the two assignments α and β, derive in each

case the logical equations for the state variables and the output function and

compare the results.

b) Express explicitly in each case the dependency of the output and the state

variables.


31Q. a) Let π be a closed partition on the set of states of a machine M. Prove that if π is

also an output-consistent partition, i.e., π ≤ λ0, then M can be reduced to

an equivalent machine which has only #, (π) states. Conversely, if there are no

closed partitions on M which are also output-consistent then M is in reduced form.

b) Demonstrate the above reduction procedure by first finding a closed partition which

is also output-consistent for the machine shown in Table and then reducing it.

32Q. In each of the following sets of partitions, π1 and π2 designate closed partitions,

while λ0 and λi designate output-consistent and input-consistent partitions,

respectively.

a) Construct for each case the corresponding π-lattice by obtaining all the necessary

sums and products.

b) Show schematic diagrams demonstrating in each case the possible machine

decompositions that yield minimal independencies of the state variables, as well as

the outputs.

33Q. a) For the machine shown in Table find λi and λ0 and construct the π-lattice.

b) Choose as a basis for your state assignment three partitions, τ1, τ2,and τ3, such

that the following functional dependencies will result:

Y1 = f1 (y1)

Y2 = f2 (x, y2, y3)

Y3 = f3 (x, y2, y3)

z = f0 (y1, y2)

Specify the desired relationship between the chosen τ‟s, and λ0 and λi, and show a schematic

diagram of the resulting structure.

c) Based on the chosen τ‟s, make a state assignment and derive the corresponding

logical equations.


34Q. The machine shown in Table has the closed partition

Π = { A,C,D,F; B,E,G}

a) Can you find another closed partition so that a parallel decomposition is possible, without

increasing the number of state variables?

b) Construct an implication graph, starting with vertex (A, B), and show that there exists a

machine M‟ equivalent to M which can be decomposition into the form shown in Fig.

c) Show the state tables of the component machines.

d) Select an assignment that will lead to the structure of Fig. Derive the corresponding

logical equations.

35Q. a) Prove that if τ is a partition on m, then M {m[M(τ)]} = M(τ) and m{M[m(τ)]} = m(τ)

b) Use the above to show that, for all τ of m, {M(τ),m[M(τ)]]} and {M[m(τ)],m(τ)} are M m pairs.

CHAPTER 5: State-Identifications and Fault-Detection Experiments

36Q. For each of the machines shown in Table:

a) Find the shortest homing sequences.

b) Determine whether or not synchronizing sequences exists, and if any do exist, find

the shortest ones.


37Q. It is necessary to synchronize the machine shown in Table to state A with a minimum

number of input symbols. Devise such a procedure, which may be adaptive.

38Q. For each of the machines shown in Table determine whether or not preset distinguishing

sequences exist, and if any do exist, find the shortest ones.

39Q. You are presented with a machine that is known to be described by one of the two state

tables shown in Table. No information is available regarding the initial state of the machine. Devise a

procedure for identifying the machine, and find all minimal preset experiments which can perform this

task.

Hint: Construct a machine which is the direct sum of the two machines.

40Q. The following experiment has been proposed as a fault-detection experiment for the machine

shown in Table, when started in state A and under the assumption that the number of states will not

increase as a result of a malfunction. Either prove that it is a proper fault-detection experiment, i.e., it

identifies uniquely the machine, or show by means of a counter example that it is not such an

experiment.

Input: 0 0 1 0 0 1 0 1 0 1 1 0 0 0 1 0 0 Output: 2 2 2 0 1 0 2 2 0 0 2 1 2 1 1 2 2


CMOS VLSI DESIGN

QUESTION BANK

Subject Code: 08EC021 Faculty: Mr.PM

1. Derive the conditions cutoff, unsaturation and saturation region of operation a. NMOS Transistor b. PMOS Transistor

2. What do you mean by second order effects in MOS transistors Explain briefly a. Body effect b. Sub threshold region c. Channel length modulation d. Mobility variation e. Impact ionization

3. Draw and explain the DC characteristics of CMOS inverter 4. Explain the five different regions of operation 5. Explain the effect of variation of transistor dimension on DC characteristics on CMOS inverter. 6. Explain why the structures shown below cannot operate as current sources even though the

transistors are in saturation.

7. Consider the following circuit driving a capacitive load of 1pF

a. Assuming that In swings from rail-to-rail (0 to 2.5V), what is the swing on the node out? b. At the switching threshold VM = 1.75V, what is the mode of operation for M1 and M2 c. Assuming (W/L)2 = 25µm/0.25µm, determine(w/L)1 such that VM=1.75V


8. Explain why a. PMOS is a good conductor of logic 1 but a bad conductor of logic 0 b. NMOS is a good conductor of logic 0 but a bad conductor of logic 1

9. Explain the circuit diagrams and DC characteristics of a. Saturated load inverters b. Unsaturated load inverters

10. Draw and explain the working of CMOS Differential logic inverter. 11. Draw the

a. Schematic for static CMOS logic y =

b. Layout for static CMOS LOGIC Y = 12. Explain with the help of timing diagram the difference between flip flop and latch. 13. Draw the CMOS level diagram for a D latch and a D flip flop and explain how a D flop can be

obtained from two latches. 14. Explain the concept setup, hold time and meta stability. 15. Derive the expression for maximum combinational delay of a pipelined sequential circuit. 16. Draw the circuit of BICMOS logic and explain its working. 17. Consider the following cross-coupled complementary pass-gate logic

a. What is the logic function y implemented by the above gate? What is the voltage swing on nodes y and y‟?

b. Assume that A, A‟, B, B‟ are from ideal voltage sources and have a rail –to-rail swing (0 to VDD). Also assume (just for this part) that there is no body effect and ignore sub-threshold conduction. Is this a radioed circuit?

18. Consider the following circuit implemented using NMOS and PMOS pass transistors. Assume that the inputs and their complements (A, A‟, B, B‟) swing rail-to-rail (0 to VDD). What is the function implemented by the two circuits?


19. Assuming that the primary inputs (A, B, C, D) and their complements are having rail-to-rail swing (0 to VDD), what is the voltage swing on outputs Y and Z?

20. Draw the CMOS level schematic for expression y =AB+CD. Using Euler‟s path draw the layout for the logic.

21. Draw the schematic and explain the working of a. DCVSL b. C2MOS

22. Explain latch up in case of a CMOS inverter. Give various latch up prevention techniques. 23. Discuss the issues related to a dynamic CMOS design and there solutions. 24. Discuss the conduction of logic 1 and logic0 through a transmission gate. 25. Explain the working of NP Domino CMOS logic. 26. Derive the expression for small signal gain of NMOS transistor with passive load. 27. Implement y= AB+CD by using Domino CMOS structure 28. What is the Latch up effect in CMOS structure? 29. Brief about the dynamic circuit technique for overcoming the threshold voltage drops in digital

circuits. 30. Explain the static behavior of two-inverter basic bistable element. 31. Implement the CMOS negative edge triggered master slave D flip-flop 32. Explain the clocking and clock generation in digital logic 33. What is CPL logic? Write down the circuit diagram of a CPL based XOR gate. 34. Implement the CMOS TG realization of F = AB+A‟C‟+AB‟C 35. Explain basic principles of pass transistor circuits in detail 36. Explain the three stages of deleption load nMOS dynamic shift register circuit driven with two phase

clocking 37. Derive the Vth(logic threshold) of CMOS NOR2 gate. 38. What are the goals of high performance dynamic CMOS circuits? And explain about the Domino

CMOS logic and NORA CMOS logic

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1st Sem M.tech Question Bank Odd 11