Advanced Computer Architecture SRS

Code No: M0503 Set No. 1

IV B.Tech I Semester Regular Examinations, November 2009ADVANCED COMPUTER ARCHITECTURE

(Computer Science & Engineering)Time: 3 hours Max Marks: 80

Answer any FIVE QuestionsAll Questions carry equal marks

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1. Write short notes on:

(a) Desktop Benchmark.

(b) Transaction processing benchmark. [8+8]

2. Explain various addressing modes in computer architecture. [16]

3. What are the differences between register renaming and reorder buffers? [16]

4. Explain static branch prediction. [16]

5. (a) Explain how to improve cache performance?

(b) Assume the cache miss penalty is 100 clock cycles and all instructions normallytake 1.0 clock cycles [ignoring memory stalls]. Assume the average miss rateis 2%, there is an average of 1.5 memory references for instruction, and theaverage number of cache misses per 1000 instructions is 30. What is the impacton performance when behavior of the cache is included? Calculate the impactusing both misses per instruction and miss rate. [8+8]

6. (a) Give the architecture of distributed memory multiprocessor. Explain.

(b) Explain the performance metrics for communication mechanism. [8+8]

7. (a) What is the average time to read or write a 512 bytes sector for a disk? Theadvertised average seek time is 5ms, the transfer rate is 40MB/sec, it rotatesat 10,000RPM, and the controller overhead is 0.1ms. Assume the disk is idleso that there is no queuing delay. In addition, calculate the time assumingthe advertised seek time is 3 times longer than the measured seek time.

(b) Write about

i. Optical Disk

ii. Magnetic Tapes. [8+8]

8. (a) Write short notes on:

i. Fibre optic Components

ii. Fibre Optic Cables

iii. Wavelength division multiplexing.

(b) Briefly Write about the performance parameters of interconnection networks.[8+8]

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1. (a) Define Temporal locality.

(b) Explain about wall clock time in detail? [4+12]

2. With a neat diagram explain the structure of recent compilers. [16]

3. List out the three models of memory alias analysis and explain. [16]

4. What is meant by trace scheduling? Explain in detail? [16]

5. (a) Write about cache and performance.

(b) Calculate the cpu execution time for a computer with clock cycles per instruc-tion as 1.0 when all memory accesses hit in the cache.The only data accesses orloads and stores, and these total 50% of the instructions. If the miss penaltyis 25 clock cycles and the miss rate is 2%,how much faster would the computerbe if all instructions were cache hits? [8+8]

6. (a) What is multiprocessor cache coherence?

(b) Explain about multiprogramming and OS workload. [8+8]

7. (a) Suppose an IO system with a single disk gets on average 50 IO requests persec. Assume the average time for the disk to service an IO request is 10ms.What is utilization of an IO system?

(b) Write about the errors and failures in Berkeley’s tertiary disk. [8+8]

8. What is a cluster? Explain about the designing of a cluster with an example. [16]

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1. Write short notes on

(a) learning curves.

(b) Amdhal‘s law. [8+8]

2. With a neat diagram explain the structure of recent compilers. [16]

3. Write a notes on speculation processor. [16]

4. What is meant by local scheduling? Discuss in detail? [16]

5. (a) Draw the organization of data cache in alpha 21264 microprocessor and ex-plain.

(b) Explain what happens on a write in to the cache? [8+8]

6. (a) Give the reasons why cache coherence is an accepted requirement in smallscale multiprocessors?

(b) Draw the state transition diagram for an individual cache block in a directorybased system. [8+8]

7. (a) What is the average time to read or write a 512 bytes sector for a disk? Theadvertised average seek time is 5ms, the transfer rate is 40MB/sec, it rotatesat 10,000RPM, and the controller overhead is 0.1ms. Assume the disk is idleso that there is no queuing delay. In addition, calculate the time assumingthe advertised seek time is 3 times longer than the measured seek time.

(b) Write about

i. Optical Disk

ii. Magnetic Tapes. [8+8]

8. Write about [6+5+5]

(a) WAN

(b) SAN

(c) LAN.

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1. Write the formula for total execution time. Explain the same with an example?[16]

2. Give a brief account on streaming SIMD extension (SSE). [16]

3. Write notes on finite registers. [16]

4. Explain static branch prediction. [16]

5. Explain the techniques in increasing memory bandwidth. [16]

6. (a) Explain multiprogramming and OS workload.

(b) When do you say a memory system is coherent. Explain? [8+8]

7. (a) Give the applications of the interrupt driven IO.

(b) Write about the bit interleaved parity. Give an example comparing RAID 3and RAID 4/5 on small write updates. [8+8]

8. Discuss about the practical issues for commercial interconnection networks? [16]

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Advanced Computer Architecture SRS