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1 The Dark Side of Loop Control Theory 1 • Chris Basso APEC 2012 Christophe Basso IEEE Senior Member

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Page 1: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

1

The Dark Side of Loop Control Theory

1 • Chris Basso – APEC 2012

Christophe Basso

IEEE Senior Member

Page 2: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

2

Course Agenda

Introduction to Control Systems

Shaping the Error Signal Shaping the Error Signal

How to Implement the PID Block?

The PID at Work with a Buck Converter

Considering the Output Impedanceg p p

Classical Poles/Zeros Placement

Shaping the Output Impedance

Quality Factor and Phase Margin

2 • Chris Basso – APEC 2012

What is Delay Margin?

Gain Margin is not Enough

Page 3: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

3

What is the Purpose of this Seminar?

There have been numerous seminars on control loop theory

Seminars are usually highly theoretical – link to the market?

Control theory is a vast territory: you don't need to know everything!

This 3-hour seminar will shed light on some of the less covered topics:

/ PID compensators and classical poles/zeros compensation

Output impedance considerations in a switching regulator

Understanding delay and modulus margins

In a 3 hour course we are just scratching the surface !

3 • Chris Basso – APEC 2012

In a 3-hour course, we are just scratching the surface…!

Page 4: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

4

Course Agenda

Introduction to Control Systems

Shaping the Error Signal Shaping the Error Signal

How to Implement the PID Block?

The PID at Work with a Buck Converter

Considering the Output Impedanceg p p

Classical Poles/Zeros Placement

Shaping the Output Impedance

Quality Factor and Phase Margin

4 • Chris Basso – APEC 2012

What is Delay Margin?

Gain Margin is not Enough

Page 5: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

5

What is a Closed-Loop System?

A closed-loop system forces a variable to follow a setpoint

The setpoint is the input the controlled variable is the output The setpoint is the input, the controlled variable is the output

French term is "enslavement": the output is slave to the input

A car steering wheel is a possible example:

u t y t

control

5 • Chris Basso – APEC 2012

The input u The output y

Page 6: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

6

Representing a Closed-Loop System

A closed-loop system can be represented by blocks

The output is monitored and compared to the input The output is monitored and compared to the input

Error processing

+ sensor

°

° V

vc

p g

Any deviation between the two gives birth to an error

- VV

The plantH

The compensatorG

6 • Chris Basso – APEC 2012

Any deviation between the two gives birth to an error This error is amplified and drives a corrective action

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7

A Servomechanism or a Regulator?

Airplane elevator control is a servoservo--mechanismmechanism:

• The pilot imposes a mechanical position via the yoke• The pilot imposes a mechanical position via the yoke

u t

y tVariable

Car cruise control is a regulatorregulator:

• The speed is set, the car keeps it constant despite wind, etc.v

setpoint Output followsthe input

7 • Chris Basso – APEC 2012

v

u t constantv Fixedsetpoint Output is constant

Page 8: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

8

Processing the Error Signal

The error signal is processed through the compensator G

We want the following operating characteristics:We want the following operating characteristics:

Speed

Precision

Robustness1.00

1.40

overshoot precision u t

200m

600m

speed

PID

Since1930

8 • Chris Basso – APEC 2012

12.0u 36.0u 60.0u 84.0u 108u

-200mPID y t

Page 9: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

9

Course Agenda

Introduction to Control Systems

Shaping the Error Signal Shaping the Error Signal

How to Implement the PID Block?

The PID at Work with a Buck Converter

Considering the Output Impedanceg p p

Classical Poles/Zeros Placement

Shaping the Output Impedance

Quality Factor and Phase Margin

9 • Chris Basso – APEC 2012

What is Delay Margin?

Gain Margin is not Enough

Page 10: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

10

Where do You Shape the Signal?

The compensator is the place where you apply corrections

Error processing

The compensator: G

vc

The compensator is built with an error amplifier:

v vc

10 • Chris Basso – APEC 2012

Op amp TL431 OTA

vc

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11

The PID Compensator

A PPID welcomes a Proportional block

c pv t k tpk t

240m

k i hi h248 mV

0

120m

t

cv t kp is high:

reaction speed risks of overshoot

kp is low:

100 mV

248 mV

11 • Chris Basso – APEC 2012

4.29u 12.9u 21.5u 30.1u 38.7u

2.48pk

kp is low:

sluggish response

Page 12: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

12

The PID Compensator

A PIID includes an Integrating block

0

tp

ci

kv t d

p

i

k

-2.92240m

Integral action:

t

-2 98

-2.96

-2.94

0

120m

t

cv t Integral action:

no static error slow response decreases stability

-100 µV

S

12 • Chris Basso – APEC 2012

8.59u 25.8u 42.9u 60.1u 77.3u

-3.00

2.98

large overshoots

107μsi -100u . 30k = -3 V

i

S

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13

The PID Compensator

A PIDD offers a Derivative block

D i ti ti

c p d

d tv t k

dt

p d

dk

dt t

2.00240m 1.63Vp dk S Derivative action:

perturbation variationis known: anticipation stabilizes the response

-1 00

0

1.00

0

120m

t

cv t

p d

S

13 • Chris Basso – APEC 2012

o no static effect

3.66u 11.0u 18.3u 25.6u 32.9u

-2.00

1.00

163μsd

Page 14: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

14

The PID Compensator

The Derivative block anticipates the signal evolution and speed

y

t

y

dt

t S

d

d

t tt

t

tt dt

t

d d

d tt t

dt

14 • Chris Basso – APEC 2012

nowlater

dtif smalld

Page 15: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

15

Combining the Blocks

You can formulate the PID transfer function in different ways:

d differentiation:

integration:

c c

d tv t V s s s

dt

c c

sv t t dt V s

s

The standard form:

The derivative term cannot

11p d

i

G s k ss

The parallel form:

k

be physically implemented:

lim ds

s

Need a pole

15 • Chris Basso – APEC 2012

ip d

kG s k sk

s

1

dd

d

ss

s

N

Page 16: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

16

Combining the Blocks

The transfer function becomes a filtered PID:

11

1

dp

di

sG s k

ssN

If we develop we obtain a more familiar expression: If we develop, we obtain a more familiar expression:

21 d d i

i d is sN N

G s

A double zeroAn origin pole

16 • Chris Basso – APEC 2012

1i d

p

s sk N

An origin poleA high-frequency pole

Page 17: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

17

Course Agenda

Introduction to Control Systems

Shaping the Error Signal Shaping the Error Signal

How to Implement the PID Block?

The PID at Work with a Buck Converter

Considering the Output Impedanceg p p

Classical Poles/Zeros Placement

Shaping the Output Impedance

Quality Factor and Phase Margin

17 • Chris Basso – APEC 2012

What is Delay Margin?

Gain Margin is not Enough

Page 18: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

18

Practical Implementation

Sum up the output of each individual block:

pkP

Ipk

+

u(t)

(t)vc(t)

i

D p dd

kdt

-

c( )

18 • Chris Basso – APEC 2012

y(t)

This is the parallel form of the PID

Page 19: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

19

Practical Implementation

This is the filtered standard form of the PID

kPI1

+

u(t)

(t) v (t)pkPIi

D

-

vc(t)

1

1 ds Nd

d

dt

19 • Chris Basso – APEC 2012

y(t)

Page 20: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

20

Bridging a PID to a Type 3

A type 3 is implemented around an op amp

1 2

1 2

1 1

1 1

z z

po p p

s sG s

s s s

1 2 2

2

1

1 1 11

z z z z

s s

Addedpole

20 • Chris Basso – APEC 2012

1 2 2

1 2

1

1 1

z z z z

po p p

G ss s s

Page 21: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

21

Bridging a PID to a Type 3

Identify the terms and write the equations:

1 2 2

1

2

1

1 1 11

1

z z z z

po p

s s

G ss s

2

1

1

1

d d ii d i

i d

p

s sN N

G s

s sk N

1 1 22

1 1 1d d ii d i

z z z zN N

1po p p

Four unknowns, four equations:

21 • Chris Basso – APEC 2012

1

1 1i d

p po pk N

Page 22: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

22

Bridging a PID to a Type 3

From Type 3 to PID:

2

1 1 1 2

1 1 1 2 1 2 1

p z p z

d

p z p z z z p

1

1 1 1 2 1 2 1

2

1p

p z p z z z p

N

1 2

1 2 1

1z z

iz z p

1 1 2

po po pop

z p z

k

1 2 1z z p 1 1 2z p z

From PID to Type 3:

1

2 2 2 24 2

2 1 2d d i i d i d i

zd i

N N N Nf

N

1 2pd

Nf

22 • Chris Basso – APEC 2012

2

2 2 2 24 2

2 1 2d d i i d i d i

zd i

N N N Nf

N

2p

poi

kf

Page 23: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

23

Testing the Conversion Assume a type 3 compensator calculated for:

2740 Hzf 1fG at a crossover of 2740 Hzcf 1cf

G

1200 Hzzf

2600 Hzzf

121400 Hzpf

221400 Hzpf

2 2

High-frequencypole

at a crossover of

The "0-dB crossover" pole is placed at:

1 2

1

1

22

1 1

43.4 Hz 272 rd s

1 1

c

c c

p p

po f z

z c

c z

f f

f ff G f

f f

f f

23 • Chris Basso – APEC 2012

2c zf f

194d u 1.05i m 25.6N 0.287pk

Page 24: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

24

What is the "0-dB Crossover" Pole? s appears as an isolated term in N(s), it is an origin pole

1G s s = 0 is the origin pole

11 p

G ss s

s = 0 is the origin pole

If s is affected by a coefficient it is the "0-dB crossover pole"

11

1 11 z

ss s

s s s ss s s

1 11 1

11 1 11

0

1 11

1 1 11

z zz z po

zp p pp

po

s s s ss s sG s G

sAs s s ss

G s Dimensionof a gain

24 • Chris Basso – APEC 2012

po 10log f

Crossoverpole

0 dB

Page 25: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

25

Testing with Mathcad®

We wanted a magnitude of 1 at 2.7 kHz

0

10

20

0

100

20 log G1 i 2 f( ) 10

20 log G2 i 2 f( ) 10

arg G1 i 2 f( ) 180

180

Filtered PID G s

10 100 1 103 1 10

4 1 105

20

10 100

g 2( ) arg G2 i 2 f( )

f

Type 3

G s

25 • Chris Basso – APEC 2012

2.7 kHz, 0 dBMaximum phase boost

Page 26: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

26

Testing with SPICEparameters

fc=2740Gfc=0

G 10^( Gf /20)

parameters

i=(1+fc^2/fp1^2)*(1+fc^2/fp2^2)j=(1+fz1^2/fc^2)*(1+fc^2/fz2^2)W i t(i/j)*G*f 1*2* i

Integration

TD = 1.929e-004N = 2.594e+001

X3

67

C60.1u

R9

IntFilt

DeriveFilt

R10Ti/0.1u

X5AMPSIMP

Vstim

G=10^(-Gfc/20)pi=3.14159

fz1=600fz2=200fp1=21.4kfp2=21.4k

Wz1=2*pi*fz1Wz2=2*pi*fz2Wp1=2*pi*fp1

Wpi=sqrt(i/j)*G*fz1*2*pi

e=(Wp1-Wz1)*(Wp1-Wz2)f=Wp1*Wz1+Wp1*Wz2-Wz1*Wz2

Td=e/(f*Wp1)N=((Wp1^2)/f)-1Ti=((Wz1+Wz2)/(Wz1*Wz2))-(1/Wp1)kpf=(Wpi/Wz1)-(Wpi/Wp1)+(Wpi/Wz2)

-500uV4.00V

gTI = 1.054e-003KPF = 2.871e-001

K

S+A 32

X6POLEFP = fp2K = -1 SUM2

K1

K216

5

SUM2K1 = 1K2 = -18 9

R9Td/0.1u

C70.1uF

K

S+A10

X1POLEFP = (N/Td)/(2*pi)

11

R11x10k

12

R1210k/kpf

SUM3

K1

K2

K313

X4SUM3K1 = 1K2 = 1K3 = 1

X8AMPSIMP

X9AMPSIMP

R810k

R1110k

Vout

Vrefx5

-

+

17

Vbias4.9995

V3unknown

stim

-1.15V1.15V

5.00V

5.00V

-500uV

0V

0V

0V

115uV

4.00V

500uV

-50.0nV

5.00V

kp

Filteredderivation

26 • Chris Basso – APEC 2012

14

X10AMPSIMP

10k

-1 This is the filtered

form implementation

Page 27: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

27

Testing with SPICE

36020.0

0 1

dB

G s

0

180

0

10.0

G s

-180

0

-10.0

0

2.7 kHz, 0 dBMaximum phase boost

27 • Chris Basso – APEC 2012

10 100 1k 10k 100k

-360-20.0

Maximum phase boost

Page 28: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

28

Course Agenda

Introduction to Control Systems

Shaping the Error Signal Shaping the Error Signal

How to Implement the PID Block?

The PID at Work with a Buck Converter

Considering the Output Impedanceg p p

Classical Poles/Zeros Placement

Shaping the Output Impedance

Quality Factor and Phase Margin

28 • Chris Basso – APEC 2012

What is Delay Margin?

Gain Margin is not Enough

Page 29: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

29

Stabilizing a Buck with a PIDWe will use a PID to stabilize a voltage-mode Buck converter

L1 R6

Vout2

16

Cout220u

Resr70m

2 12

L175u vout

3

R6100m

d

a c

PWM switch VM p

X7PWMVML = 75uFs = 100k

VinVinAC = 0

Rload2.5

5.01V

5.01V

5.21V 5.21V

10.0V

Out

GA

IN

4

5

XPWMGAINK = 1/Vpeak

1.04V

523mV

Th Pl t

H s

29 • Chris Basso – APEC 2012

V3unknown

Vstep The Plant

In

Page 30: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

30

Small-Signal Response of the Buck

30 0

The transfer function shows a resonance at 1.2 kHz

-50.0

-30.0

-10.0

10.0

30.0

5 H sResonance at 1.2 kHz

10 100 1k 10k 100k

-90.0

0

90.0

30 • Chris Basso – APEC 2012

10 100 1k 10k 100k

-270

-180

H s

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31

Compensating the Buck – Method 1

We will explore three different methods for compensation:

1. Shape closed-loop gain to make it a 2nd-order system2. Place poles and zeros to crossover at 10 kHz3. Shape the output impedance only

Method 1 – derive the open-loop gain first p p g

31 • Chris Basso – APEC 2012

H s G s OLT s G s H s

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32

Compensating the Buck – Method 1

The loop gain expression is that of the PID and H(s)

N( )

1

2

0 2

0 0 0

11

1 1

d d ii d i

z

OLi d

p

s ssN N

T s Hs ss s

k N Q

D(s)

N(s)

To simplify the expression, we can neutralize D(s) by N(s)

2

Place a double zero at the double pole position:

32 • Chris Basso – APEC 2012

2

0 0 0

1 1d d ii d i

s ss s

N N Q

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33

Compensating the Buck – Method 1 The loop gain expression is now well simplified:

1H

10 1

1

z

OLi d

p

H sT s

s sk N

For a unity feedback control system, the closed-loop gain is:

1

1

0 1

11

1 1

z

i d

zpCL

H s

s ssk N

T sH s

33 • Chris Basso – APEC 2012

1

1

0 2

0 0

1 111

1

z i d i

z p pi d

p

H ss s

H k NH ks s

k N

Page 34: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

34

Compensating the Buck – Method 1We want a damped second-order response:

2

1

2

2

0 0

11 1i d i

z p p c c c

s ss s

H k NH k Q

Closed-loop denominator Second-order canonical form

Choose a crossover frequency and a quality factor:

34 • Chris Basso – APEC 2012

0.5cQ Non-ringing response 27.3rd s 10kHzc

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35

Compensating the Buck – Method 1

1 1iT 1d iT T 1T T1dT

Four unknowns, four equations:

1 0

1 1i

z p c c

T

H k Q

20

1d i

p c

T T

NH k

21 0

1d id i

T TT T

N

0 0

1di

TT

N Q

2 2 2 2 2 2 4 2 3 2 20 0 0 0 0 0 02Q Q Q Q Q Q Q Q Q

1 1 1 1 1

1 1 1

0 0 0 0 0 0 0

20 0 0

21.116 msc z c z c c c c z c c z c z c

d

c c c z c c z c c z

Q Q Q Q Q Q Q Q QT

Q Q Q Q

1 1 1 1 1

1 1 1

2 2 2 2 2 2 4 2 3 2 20 0 0 0 0 0 0

20 0 0

272.4c z c z c c c c z c c z c z c

c z c c z c c z

Q Q Q Q Q Q Q Q QN

Q Q Q Q

35 • Chris Basso – APEC 2012

1 1

1

20 0

20 0 0

14.6μsc c z c c z

iz c c c

Q Q QT

Q Q Q

1 1 1

1

20 0

2

0 0 0

0.178c z c c z c c z

p

z c c

Q Q Q Qk

H Q Q

Page 36: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

36

Compensating the Buck – Method 1We can now compute our transfer functions in Mathcad®

60

G s

20

0

20

40

100

0

100

20 log G1 i 2 f( ) 10 arg G1 i 2 f( ) 180

G s G s

Compensatorresponse G(s)

10 100 1 103 1 10

4 1 105

20

f

0

20

40

60

0

100

20 log TOL i 2 f( ) 10 arg TOL i 2 f( ) 180

10 kHzcrossover OLT s

p ( )

36 • Chris Basso – APEC 2012

10 100 1 103 1 10

4 1 105

40

20

0

100

f

m = 80° OLT sOpen-loop gainresponse TOL(s)

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37

Compensating the Buck – Method 1

The closed-loop system is perfectly compensated

10

0

0

100

20 log T1 i 2 f( ) 10 arg T1 i 2 f( ) 180

11.8 kHz-3 dB

CLT s

T

10 100 1 103 1 10

4 1 105

30

20

100

f

OLT sT

CLT s

37 • Chris Basso – APEC 2012

1

OLCL

OL

T sT s

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38

Compensating the Buck – Method 1We can test the compensation with SPICE

L175u

voutR6100ma cparameters 5.00V5.10V 5.10V10.0V

Vout2

16

Cout

220u

Resr

70m

2 12

3

GA

IN

5

XPWM

d

a c

PWM switch VM p

X7PWMVM

L = 75u

Fs = 100k

fc=10kGfc=-20Vin=10Vpeak=2

G=10^(-Gfc/20)pi=3.14159

fz1=1.2kfz2=1.2kfp1=10kfp2=50k

Rload2.5

VinVin

AC = 0

X3

SUM2vout

910

C60.1u

R9

Td/0.1u

IntFilt

DeriveFilt

R11x

R10Ti/0.1u

X5

AMPSIMP

5.00V

5.00V

5.10V 5.10V

511mV

10.0V

-1.27mV1.15V

G

4

GAINK = 1/VpeakWz1=2*pi*fz1

Wz2=2*pi*fz2Wp1=2*pi*fp1

i=(1+fc^2/fp1^2)*(1+fc^2/fp2^2)j=(1+fz1^2/fc^2)*(1+fc^2/fz2^2)Wpi=sqrt(i/j)*G*fz1*2*pi

e=(Wp1-Wz1)*(Wp1-Wz2)f=Wp1*Wz1+Wp1*Wz2-Wz1*Wz2

Td=e/(f*Wp1)N=((Wp1^2)/f) 1

6

LoL

1kH

22

7

CoL1kF

V1AC = 1

TR13100m

K

S+A 8

X6

POLEFP = fp2

K = -1 SUM2

K1

K220

23

K1 = 1K2 = -1

Vref5

-

+

11 13

C7

0.1uF

K

S+A17

X1

POLE

FP = (N/Td)/(2*pi)

15

10k

18

R12

10k/kpfSUM3

K1

K2

K314

X4

SUM3K1 = 1

K2 = 1

K3 = 1

X8AMPSIMP

X9AMPSIMP

25

10

R8

10k

R11

10k

Vdirect

VPIDFiltered

1.02V

-1.02V

5.00V

-1.27mV

0V 0V

0V

1.12mV

1.15V1.26mV

-1.39uV

1.02V

38 • Chris Basso – APEC 2012

N=((Wp1^2)/f)-1Ti=((Wz1+Wz2)/(Wz1*Wz2))-(1/Wp1)kpf=(Wpi/Wz1)-(Wpi/Wp1)+(Wpi/Wz2)

Tdd=1.116mTii=14.6ukpff=0.178NN=72.4

AC 1X10

AMPSIMP

Vdirect

Page 39: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

39

Compensating the Buck – Method 1We can test the compensation with SPICE

° dB

30.0

60.0

90.0

180 OLT s

OLT sm = 80°

° dB

-30.0

0

-90.0

0

10-kHzcrossover

Perfect compensation dude!

39 • Chris Basso – APEC 2012

10 100 1k 10k 100k

-60.0-180

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40

Compensating the Buck – Method 1We have a stable but oscillatory response!

5 00

5.04

5.08 2

10.128

21

20ln

45

1 2 3.9Q

45 mV

20 mV

4.92

4.96

5.00

outV t

806 µs

1.2 kHz

67 mV

Wasn't it supposed to be perfect, uh?

40 • Chris Basso – APEC 2012

500u 1.50m 2.50m 3.50m 4.50m

1 A in 100 μsoutI

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41

Compensating the Buck – Method 1 Bode or Nyquist do not predict the oscillatory response

2.00

4.00

1, 0j1/GM

m OLT s

-2.00

0

1/GM

m

c

41 • Chris Basso – APEC 2012

-4.00 -2.00 0 2.00 4.00

-4.00

e

Page 42: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

42

Compensating the Buck – Method 1We compensated the Vout to Vref path only!

I Z

inin VV s G s

H(s)+

(s)

G(s)

outV sPWMG d(s)

T s

out outI s Z s+

+

- refV s

( )

10

0

0

100 CLT s

?

42 • Chris Basso – APEC 2012

10 100 103 104 10530

20100

refV t CLT s

outV t

?

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43

Compensating the Buck – Method 1

The output response is as expected

5 15

5.25

5.35

4.95

5.05

5.15

outV t

43 • Chris Basso – APEC 2012

300u 900u 1.50m 2.10m 2.70m

Where is the issue coming from then?

Page 44: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

44

Course Agenda

Introduction to Control Systems

Shaping the Error Signal Shaping the Error Signal

How to Implement the PID Block?

The PID at Work with a Buck Converter

Considering the Output Impedanceg p p

Classical Poles/Zeros Placement

Shaping the Output Impedance

Quality Factor and Phase Margin

44 • Chris Basso – APEC 2012

What is Delay Margin?

Gain Margin is not Enough

Page 45: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

45

Compensating the Buck – Method 1 In reality, Vref is fixed: "we have a regulator, stupid!"

I s Z s

H(s)+

G(s)

,out out OLI s Z s

+

-

outV s refV s

I think he's right…

Because the system is linear, superposition applies

1 1

OLout ref

OL

T sV s V s

T s

2 ,out out out OL out OLV s I s Z s V s T s

,out OLOL Z sT sV s V s V s V s I s

45 • Chris Basso – APEC 2012

1 2 1 1out out out ref outOL OL

V s V s V s V s I sT s T s

During the load step, : Zout fixes the response!

,out CLZ

ˆ 0refv

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46

Compensating the Buck – Method 1What matters is the output impedance ,out CLZ

thVthR outI

1I

2Imodel

What is the output impedance of a buck converter?

L Cr

outV s

outI s

0out

N sZ s R

D s

It follows the form

46 • Chris Basso – APEC 2012

LroutC

loadR D s

Ω ΩNo dimension

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47

Compensating the Buck – Method 1

outV sZ

The output impedance is a transfer functionresponse

0 ||L loadR r R

outout

out

Z sI s

excitation

Let's find the term R0 in dc: open caps, short inductors

Lr loadR outI s

0LsL r 1 0LL

Lr s

r

The zeros cancel the response

L Cr outI s1

Lz

r

L

0?outV s

47 • Chris Basso – APEC 2012

10C

out

rsC

1 0C outsr C Lr

outC

loadR2

1z

C outr C

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48

Compensating the Buck – Method 1

The denominator is solely dependent on the structure

It is independent from the excitation: set it to zero!

There are two storage elements: this is a 2nd–order network

2

21 1s s

D s a s a s

1 20 0

1 1D s a s a sQ

D must be dimensionless thus:

The two possible terms for a1 are

1

1a Hz 2

2a Hz

1 2 L

48 • Chris Basso – APEC 2012

The two possible terms for a2 are 1 2' or

LRC

R

1 2'

Page 49: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

49

Compensating the Buck – Method 1

For a1 look at the resistance R driving L and C

Look at the driving impedance at L while C is in its dc state Look at the driving impedance at C while L is in its dc state

Lr Cr

loadR

Lr Cr

loadR ... ||L load CL load

Ls C r R r

r R

?R ?R

1 2

49 • Chris Basso – APEC 2012

L loadR r R ||L load CR r R r

1 2

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50

Compensating the Buck – Method 1

how 1 (involving L) combines with '2 (involving C)? how 2 (involving C) combines with '1 (involving L)?

a2 how 2 (involving C) combines with 1 (involving L)?

Look at the driving impedance at C while L is in its HF state Look at the driving impedance at L while C is in its HF state

Lr

?R

Lr Cr

loadR1

L load

L

r R

If we chose ?R

Cr

loadR 2 ||L load CC r R r

If we chose

Same result

50 • Chris Basso – APEC 2012

2' c loadC r R 1' ||L load C

L

r R r

Same result

1 2 1 2' '

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51

Compensating the Buck – Method 1

We have our denominator!

21 || C loadL load C

L load L load

r RLD s s C r R r s LC

r R r R

The complete transfer function is now:

2

1 1

||

1 ||

C outL

out L load

C loadL load C

L load L load

Ls sr C

rZ s r R

r RLs C r R r s LC

r R r R

51 • Chris Basso – APEC 2012

See "Fast Analytical Techniques" from Vatché Vorpérian, Cambridge Press

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52

Compensating the Buck – Method 1

It can be put under the following form:

1 2

0 2

0 0

1 1

1

z z

out

s sZ s R

s sQ

Where we can identify the terms:Where we can identify the terms:

0 ||L loadR r R1

Lz

r

L

2

1z

C outr C

1 L l dr R 0t C l dLC r R

52 • Chris Basso – APEC 2012

0

1 L load

C loadout

r R

r RLC

0out C load

out L C L load C load

LC r RQ

L C r r r R r R

Page 53: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

53

Compensating the Buck – Method 1 If we now plot the output impedance, we see peaking For an non-oscillatory response, the peaking must be damped!

-7.00

3.00

0f

,maxoutZ

dBΩ

Z

-37.0

-27.0

-17.0

Cr

,out OLZ

,

1out OL

OL

Z

T s

53 • Chris Basso – APEC 2012

10 100 1k 10k 100k

It's not, this is where the problem comes from

OL

Page 54: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

54

Compensating the Buck – Method 1

60

We organized a gain deficit right at the resonance!

G s

20

0

20

40

100

0

100

20 log G1 i 2 f( ) 10 arg G1 i 2 f( ) 180

G s

G s G s

10 100 1 103 1 10

4 1 105

20

f

To tame the peaking, we must have gain at f0

How much do we peak at f0?

1 2

2 2

0 01 1z z

54 • Chris Basso – APEC 2012

1 20 0

,max 0 0 2 2

20 01 ||

z z

out

C loadout out C L load

L load L load

Z Rr R L

LC C r r Rr R r R

Page 55: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

55

Compensating the Buck – Method 1

We can impose a magnitude to stay below rC

evaluate the needed gain to fulfill this goal: evaluate the needed gain to fulfill this goal:

,max 0

01out

COL

Z fr

T f

,max 0

0

out

COL

Z fr

T f

,max 0

0

out

OLC

Z fT f

r

Closed-loop output impedance

Applying the numerical values of the buck:

0

1.1216or 24dB

70OLT fm

output impedance

55 • Chris Basso – APEC 2012

Is this enough to obtain a ringing-free response?

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56

Compensating the Buck – Method 1

No, ringing is reduced but not eliminateddBΩ V

-50.0

-30.0

-10.0

5.00

5.04

5.08

dBΩ V

The peaking in the output impedance is still there!

10 100 1k 10k 100k

-90.0

-70.0

500u 1.50m 2.50m 3.50m 4.50m

4.92

4.96

Less than 0.4%

,

1out OL

OL

Z

T sIncreasedOL gain outV t

56 • Chris Basso – APEC 2012

The peaking in the output impedance is still there! The notched zeros are the cause for the gain dip at f0

We must find a different compensation method

Page 57: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

57

Another (Bad) Example

Can we crossover at 10 Hz according to this plot?

dB °

90.0

180

20.0

40.0 10 Hz 14dBH dB

180

-90.0

0

40 0

-20.0

0

arg 10 Hz 0H

57 • Chris Basso – APEC 2012

We have no phase lag at 10 Hz, a type 1 could do?10 100 1k 10k 100k

-180-40.0

1

Page 58: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

58

Rolling-off the BW at Low Frequencies

SPICE gives us the open-loop gain snapshotL1100u vout

rLf10m

a c vout

16

C51m

R101m

11

Vin10

37

8 vout

d

a c

PWM switch VM pX3PWMVML = 100uFs = 100k

parameters

Vout=5VRupper=10kfc=10Gfc=14

G=10^(-Gfc/20)pi=3.14159

C1=1/(2*pi*fc*G*Rupper)fp0=1/(2*pi*C1*Rupper)

R111

Vcp(t)

5

Rupper10k

Rl6

GA

IN

2

X1GAINK = 0.5

Vin

C1C1

LoL1kH

-6 dBPWM gain

58 • Chris Basso – APEC 2012

Rlower10kX2

AMPSIMPV22.5

Verr

9

CoL1kF

VstimAC = 1

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59

The Open-Loop Gain Looks Good…

The type 1 confirms our 0-dB crossover frequency

dB °

90.0

180

20.0

40.0

dB T s

argT s

90m

-90.0

0

-20.0

0

m

10Hzcf

GM 24dB

59 • Chris Basso – APEC 2012

100m 1 10 101 1k 10k

-180-40.0

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60

As Expected: It is Ringing!

The load step reveals a ringing ac output

V

5.20

5.60

4748

V

outV t 01 f

2AoutI

4.40

4.80

4748

60 • Chris Basso – APEC 2012

Munch

Vcp(t) is first order5.50m 16.5m 27.5m 38.5m 49.5m

4.00 cpV t

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61

Good dc Coupling, Weak ac Coupling

H1 is stable per Bode analysis, but H2 is out of the loop…

Vout(s)

T(s)

Vin H1(s) H2(s)

G(s)

dcf < fc

acf >> fc

d(s)

Loose couplingin ac, no signaltransmission >> fc…

T(s)

61 • Chris Basso – APEC 2012

“Fast Analytical Techniques for Electrical and Electronic Circuits”, V. Vorpérian, Cambridge Press, 2002

The dc is fed back via the loop but not the ac… Oscillations are NOT due to the loop!

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62

Again, an Undamped RLC Network… No gain at resonance: the RLC network runs open loop

dBΩ

0

20.0

output filter f0

Gain action

Zout,OL

Zout,CL Properly compensated, fc = 4 kHz-60 0

-40.0

-20.0

62 • Chris Basso – APEC 2012

The system cannot reduce the Q at the resonant frequency

Zout,CL

1 10 100 1k 10k 100k 1Meg

60.0

Page 63: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

63

Course Agenda

Introduction to Control Systems

Shaping the Error Signal Shaping the Error Signal

How to Implement the PID Block?

The PID at Work with a Buck Converter

Considering the Output Impedanceg p p

Classical Poles/Zeros Placement

Shaping the Output Impedance

Quality Factor and Phase Margin

63 • Chris Basso – APEC 2012

What is Delay Margin?

Gain Margin is not Enough

Page 64: APEC 2012 Dark Side of Loop Control finalcbasso.pagesperso-orange.fr/Downloads/PPTs/Chris... · 1 The Dark Side of Loop Control Theory 1 • Chris Basso – APEC 2012 Christophe Basso

64

Compensating the Buck – Method 2 In this method, we will focus on two parameters: crossover frequency fc

phase margin m

First, look at the ac response of the power stage:

resonance

dB °

18040.0

-90.0

0

90.0

-20.0

0

20.0 H s

H s -20 dB-132 °

64 • Chris Basso – APEC 2012

10 100 1k 10k 100k

-180-40.0ESR zero

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65

Compensating the Buck – Method 2 The peaking in H brings a severe phase lag at f0

stay away from f0 , pick fc at least 10 times above (10 kHz) extract the phase/magnitude of H at 10 kHz:

10 kHz 20dBH 10kHz 132H

The compensator G must shape the loop gain TOL by

providing a high dc gain for precision: place an origin pole reducing the phase lag at 10 kHz to provide a m of 70°

65 • Chris Basso – APEC 2012

What compensation type do we need?

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66

Compensating the Buck – Method 2

The origin pole brings a permanent phase lag of 90° added to the op amp inversion of -180°, we have -270°p p , total phase (op amp and H) must be -360 + 70° = -290° the needed phase boost at fc is thus:

90 70 132 90 112m cboost H f

G s

270

boost

270G s

G s

G s

270

boost

66 • Chris Basso – APEC 2012

10 100 1k 10k 100k

G s1 2 5 10 20 50 100 200 500 1k

10 100 1k 10k 100k

G s

Type 1 – no boost Type 2 – up to 90° Type 3 – up to 180°

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67

Compensating the Buck – Method 2 type 3: an origin pole, a double zero and 2 poles this is our PID compensator!

1

1 2 2

1

1 2 1 2

1 1 1 1

1 1 1 1

z

z z zpo

z

po p p p p

s s ss

G ss s s s s

1 2 1 2p p p p p

The magnitude is derived as:

1

2

22

1 1z

zpo

f ff ff

G ff

The argument is found to be:

arg arg argG f N D

1arg arctan arctanzf fN

f f

67 • Chris Basso – APEC 2012

1

1 2

2 2

1 1z

p p

ff

f ff f

1 2

arg arctan arctanp p

f fD

f f

2zf f

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68

Compensating the Buck – Method 2

Place the double zero at f0 ,the second pole at Fsw/2

The 0-dB crossover pole is adjusted to provide +20 dB at fc

The first pole is adjusted to provide the right m

1

2 1 2

arg arctan arctan arctan arctanz c c cc

c z p p

f f f fG f

f f f f

110.8kHzc

p

ff

ff f

68 • Chris Basso – APEC 2012

1

2 2

1 1 1tan arg tan tan tanzc c

p c z

ff fG

f f f

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69

Compensating the Buck – Method 2

The 0-dB crossover pole is adjusted to give 20 dB at 10 kHz

1 2

1

1

2

2 2

22

1 1

2kHz

1 1

c c

p p

po c z

z c

c z

f f

f ff G f f

f f

f f

10.8 kHz|G(s)|

20 dB-1

10

50 kHz

2c zf f

The final configuration is as follows:

1 2kHz 1 2kHz 1 2kHz 37 dBOT G H

69 • Chris Basso – APEC 2012

1.2 kHz

2 kHz

0 dB

doublezero (+2)

-1+1

1.2kHz 1.2kHz 1.2kHz 37 dBOLT G H

It should be ok to damp Zout

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70

Compensating the Buck – Method 2

Enter the PID coefficients from the poles/zeros positions

55.5d u 250i u 3.76N 3.1pk

90.0

180

30

60

-30.0

-10.0

OLT s

dB °

Z

dB

-180

-90.0

0

90.0

-60

-30

0

30

-90.0

-70.0

-50.0

30.0

,

1out OL

OL

Z

T s OLT s

,out CLZ-21 dBm = 70°

70 • Chris Basso – APEC 2012

10 100 1k 10k 100k 10 100 1k 10k 100k

More than 30 dB at f0 and absolutely no peaking in Zout

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71

Compensating the Buck – Method 2

The transient response with a 0.1-A load step is excellent

4.998

5.000 outV t

4.994

4.996

8 mV

71 • Chris Basso – APEC 2012

683u 906u 1.13m 1.35m 1.58m

4.992 , 10 21dB 84 mΩout CLZ k

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72

Course Agenda

Introduction to Control Systems

Shaping the Error Signal Shaping the Error Signal

How to Implement the PID Block?

The PID at Work with a Buck Converter

Considering the Output Impedanceg p p

Classical Poles/Zeros Placement

Shaping the Output Impedance

Quality Factor and Phase Margin

72 • Chris Basso – APEC 2012

What is Delay Margin?

Gain Margin is not Enough

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73

Compensating the Buck – Method 3 The capacitor stray elements affect the transient response

5.000

CrESR zoom80.0u 240u 400u 560u 720u

4.976

4.982

4.988

4.994

4.994

4.998

outV t

outV tCSl

Depends onCout fc m

C

Cl

ESL

94.7u 102u 109u 117u 124u

4.982

4.986

4.990

700m

900m

1.10

outI

t

C outr ICSl

outIS

73 • Chris Basso – APEC 2012

94.7u 102u 109u 117u 124u

300m

500m outI tS

t

R. Redl et al."Optimizing the Load Transient Response of the Buck Converter", APEC 1998

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74

Compensating the Buck – Method 3

During a step load, the converter fights the current change

5.000

max min

2

V V

5.000

maxVmax minV V

936u 1.16m 1.39m 1.61m 1.84m

outV t

500u 1.50m 2.50m 3.50m 4.50mminV

outV t

Traditional compensation: Adaptive Voltage Positioning

74 • Chris Basso – APEC 2012

inductive output impedance resistive output impedance

Limited excursion Full-span excursion

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75

Compensating the Buck – Method 3Whatever the gain, Zout meets the open-loop value beyond fc

dBΩ li Z

Cr

dBΩ,lim OL CLs

Z

40 0

-20.0

0

,out OLZ

-80.0

-60.0

-40.0

,out CLZ

75 • Chris Basso – APEC 2012

10 100 1k 10k 100k

Make the output impedance equal to rC along the freq. range

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76

Compensating the Buck – Method 3 How to force the output impedance to be resistive?

1 2

1

,, 0 2

0 0

1 11

1 111

z zout OLout CL

z

s s

ZZ R

sT s s sQ H G s

0 00 2

0 0

1

1

Q H G ss s

Q

Extract G(s)to have:

76 • Chris Basso – APEC 2012

,out CL CZ r

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77

Compensating the Buck – Method 3 Once G(s) is extracted, what filter is that?

40

2

2

0

0 0

0

0

1 1

1

z

C

s s sRQ

G sr G s

G

10

20

30

dB

1pf

1zf

1z

1s

1 10 100 1 103

´ 1 104

´ 1 105

´

0

G s

77 • Chris Basso – APEC 2012

0

1

1

G

G

z

p

G s Ks

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78

Compensating the Buck – Method 3 Some parameter identification is now needed:

1 8L Cr rK

47 7CL rr

a p 1 1

74 2Crb r u

00

1.8C

KH r

1 2

20

47.7z z

a p

1 2 0

74.2Lz z

b r uQ

0.27L Cc r r 2 4

580 Hz4Gz

b b acf

a

1

24 kHzGp zf f

40

10

20

30

dBapproximated

78 • Chris Basso – APEC 2012

YAO et al. ,"Design Considerations for VRM Transient Response Based on the Output Impedance", IEEE Proceedings, 2003

1 10 100 1 103

´ 1 104

´ 1 105

´

0

G s

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79

Compensating the Buck – Method 3 The following op amp architecture will do the job

outV s

1R2R 3R

1C

1

1

c

out

v s R

V s Z

1Z

2 31

1

1

1

R RsC

Z

cv s 2 31

1R R

sC

1 2 32

1 3 1

1

1

sC R RRG s

R sR C

79 • Chris Basso – APEC 2012

20

1

RK

R

1

1 2 3

1z C R R

1

3 1

1p R C

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80

Compensating the Buck – Method 3

L175u vout

R60 3 5 00V10 0V

A test fixture is assembled using a buck averaged model

Vout2

16

Cout220u

Resr30m

2 12

75u

3

0.3

5

d

a c

PWM switch VM p

X7PWMVML = 75uFs = 100k

parameters

Vin=10Vpeak=2

pi=3.14159

fz1=580fp1=24k

Vin

Rload2.5

VinVinAC = 0

vout

5.00V

5.00V

5.30V 5.30V

531mV

10.0V

GA

IN

4

XPWMGAINK = 1/Vpeak

Wz1=2*pi*fz1Wp1=2*pi*fp1kv=1.8

R1=10kR2=R1/kvR3=R1*Wz1/(Kv*(Wp1-Wz1))C1=(Kv*(Wp1-Wz1))/(R1*Wp1*Wz1)

6

LoL1kH

Vout

Vin

8

RfR1

9

X8AMPSIMP

Vref2.5

R7R2*1.47

R12R2

10

R8R3

C2C1

R13100m

1.06V

2.50V

2.50V

2.50V

1.06V

80 • Chris Basso – APEC 2012

22

7

CoL1kF

V1AC = 1

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81

Compensating the Buck – Method 3 After stabilization we have good margins with a 20-kHz fc

dBΩdB °

-180

-90

0

0

20

40

T s

0

20

40 ,out CLZ s

10 100 1k 10k 100k

-360

-270

-40

-20

T s

10 100 1k 10k 100k

-40

-2030dBΩ 31mΩ

81 • Chris Basso – APEC 2012

The output impedance is purely resistive! But the dc gain is low: line and load regulation problems!

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82

Compensating the Buck – Method 3 Also, the gain expression K0 can be a problem:

0L Cr rK

0

0

0L CL C

C

K r rG r

4.995

5.005 30 mV

4.965

4.975

4.985

outV t1AoutI

82 • Chris Basso – APEC 2012

500u 1.50m 2.50m 3.50m 4.50m

VM, fixed frequency, is not the best for Zout resistive shaping

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83

Compensating the Buck – Method 3 Going current-mode, fixed frequency is one way to go

vc

a c

PWM switch CM p

duty-cycle L Lr

Cr

C

loadRinV

outv s

outC

G s

cv s

83 • Chris Basso – APEC 2012

Use the PWM switch model in current-mode for Zout

G s

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84

Compensating the Buck – Method 3

The large-signal model combines two current-sources

vc

a cduty-cycle

a c

cdI

aI cI

2c Lv I

R

2I1IPWM switch CM p

p

2iR

LItV L 1 swc

D TvI V

c

i

v

RcI

84 • Chris Basso – APEC 2012

LI t offt

outV L 2 2

swcout

i

vI V

R L

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85

Compensating the Buck – Method 3

For ac study, we must obtain a small-signal model

2

11

,2 2

outsw

inswc cout c out out

i i

VT

VD TV VI V V V V

R L R L

Calculate the partial derivative coefficients to vout and vc

2 2 ˆ 2ˆ ˆ ˆ1

2c sw out

c out outc out i in

v T VI Iv v v

V V R L V

Update the schematic with this linear sourcegm

85 • Chris Basso – APEC 2012

Update the schematic with this linear source as R, L and C are also linear, Laplace applies

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86

Compensating the Buck – Method 3

We look at the output impedance closed-loop

L r L Lr

Cr

outv s

loadR gmcout

v sv s

R outi s

2I

cv s

outC

iR

86 • Chris Basso – APEC 2012

G s

2

gm 12

sw out

in

T V

L V

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87

Compensating the Buck – Method 3

We can apply the superposition theorem:

1gm ||c

out out load Ci out

v sv s v s R r

R sC

iout is 0

1||out out load C

out

v s i s R rsC

I2 is 0

Considering we have: c outv s G s v s

1 1gm || ||out out load C out load C

i out out

G sv s v s R r i s R r

R sC sC

87 • Chris Basso – APEC 2012

1 11 gm || ||out load C out load C

i out out

G sv s R r i s R r

R sC sC

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88

Compensating the Buck – Method 3

The output impedance is thus:

1

,

1||

ˆ

ˆ 11 gm ||

load Coutout

out CL

outload C

i out

R rsCv s

Z si s G s

R rR sC

Giving a small massage we obtain: Giving a small massage, we obtain:

,

1

gm gm1

gm

load i C outout CL

i load i load i load i C load C i load Cout

i load i load

R R sr CZ s

R G s R R R R R R r G s R r R R rsC

R G s R R R

"There is a

88 • Chris Basso – APEC 2012

massage for you"

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89

Compensating the Buck – Method 3

Factoring and re-arranging, we have:

1

1

,

1

1z

out CLp

sZ s R s

s

gm

load i

i load i load

R RR s

R G s R R R

1

1z

C outr C

1

1

gmp

i load i C load C i load Cout

R R R r G s R r R R rC

R G R R R

gmout

i load i loadR G s R R R

Now make Zout,CL(s) = rC and extract G(s):

2 2gm

1 load C Cout

R r rsC

R R R R R

89 • Chris Basso – APEC 2012

gm gm

1

outi load C load C load C load C

C load C out

R R r R r R r R rG s

r R sr C

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90

Compensating the Buck – Method 3

The compensator brings a single pole/zero response

1 R R R 1 1

1

0

1

1z

p

sG s G

s

0

gmi load C load C i

C load C

R R r R r RG

r R r

1

1p

out CC r

1 2 2 2

1 1

gm

gm

zload C C C

out outload C load C load

R r r rC C

R r R r R

Very high frequencycan be neglected

0.6Ω

30 mΩ

220μF

i

C

out

R

r

C

10

20

30

0

100 G s

G s

dB °

90 • Chris Basso – APEC 2012

10 100 103 104 105 10610

0 100

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91

Compensating the Buck – Method 3 Sub-harmonic oscillations at can cause peaking Place a zero at as recommended by YAO and al.

2swF

swF

1RR R

1C

outV s

1

1

c

out

v s R

V s Z 1Z

2 31

1R R

sCZ

2R 3R

cv s

11

2 31

1Z

R RsC

1 2 32

1 3 1

1

1

sC R RRG s

R sR C

91 • Chris Basso – APEC 2012

YAO et al. ,"Design Considerations for VRM Transient Response Based on the Output Impedance", IEEE Proceedings, 2003

20

1

RG

R

1

1 2 3

1z C R R

1

3 1

1p R C

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92

Compensating the Buck – Method 3 Run the SPICE simulation with the CM PWM switch model

L1 R6

d499mV

Vout2

16

Cout220u

Resr30m

2 12

L175u vout

3

R60.02

4

Vin

vc

a c

PWM switch CM p

duty-cycle

X3PWMCCMCML = 75uFs = 100kRi = 0.6Se = Se

VinVinAC = 0

R12.5

AC = 1I2

5.05V

5.05V

5.09V 5.09V

10.2V

1.42V

parameters

Vin=10.18se=20kFsw=100kpi=3.14159

pi=3.14159Ri=0.6

Slopecomp.

6

RfxR1

R12R2

X8AMPSIMP

vout

10

R14R3

C2C12.50V 2.50V

Ri 0.6Cout=220urC=30mwp=1/(rC*Cout)

Wz1=pi*FswWp1=1/(rC*Cout)G=Ri/rC

R1=10kR2 R1/G

92 • Chris Basso – APEC 2012

9

Vrefx2.5

R7R2

2.50VR2=R1/GR3=R1*Wz1/(G*(Wp1-Wz1))C1=(G*(Wp1-Wz1))/(R1*Wp1*Wz1)

Automated calculations

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93

Compensating the Buck – Method 3

18040 0m

The output impedance is resistive, the system is stable.Ω °

-180

-90.0

0

90.0

180

-40.0m

-20.0m

0

20.0m

40.0m

,out CLZ s

,out CLZ s

10 100 1k 10k 100k 1Meg

18040.0m

0

20.0

40.0

0

90.0

180 66m OLT s OLT s

93 • Chris Basso – APEC 2012

10 100 1k 10k 100k 1Meg

-40.0

-20.0

-180

-90.0 40kHzcf

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94

Compensating the Buck – Method 3 The output response is a square signal as expected

5.080

5.090 30mVoutV

@f F

5.060

5.0701@z swf F

94 • Chris Basso – APEC 2012

500u 1.50m 2.50m 3.50m 4.50m

5.050 outV t1AoutI

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95

Course Agenda

Introduction to Control Systems

Shaping the Error Signal Shaping the Error Signal

How to Implement the PID Block?

The PID at Work with a Buck Converter

Considering the Output Impedanceg p p

Classical Poles/Zeros Placement

Shaping the Output Impedance

Quality Factor and Phase Margin

95 • Chris Basso – APEC 2012

What is Delay Margin?

Gain Margin is not Enough

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96

Output Impedance and Quality Factor How to get Q and m from the available signals?

5.00

7.00

9.001 8.21 VpeakV

3 6.33 VpeakV

6.33 50.414

8.21 5k

5.00

7.00

9.001 8.21 VpeakV

3 6.33 VpeakV

6.33 50.414

8.21 5k

You need enough signal and ringing to extract the data

500u 1.50m 2.50m 3.50m 4.50m

1.00

3.00

outV t

841.5 μsdt

500u 1.50m 2.50m 3.50m 4.50m

1.00

3.00

outV t

841.5 μsdt

Q = 3.6

Must remain small-signal!

96 • Chris Basso – APEC 2012

21

ln 4Q

k

02

1

1d

ft

2

1

21

ln k

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97

Output Impedance and Quality Factor Extraction is difficult with flat ac 2nd-order responses

7 00

-1.00

1.00

3.00

5.00

7.00

outV t5-V step response

500u 1.50m 2.50m 3.50m 4.50m

0

40.0

80.0

0

90.0

180

H s

dB

Ac analysis

97 • Chris Basso – APEC 2012

10 100 1k 10k 100k 1Meg

-80.0

-40.0

-180

-90.0 s

H s

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98

Output Impedance and Quality Factor

20 0 Q = 10dB

The phase drops at a different pace as Q changes

-20 0

-10.0

0

10.0

20.0 H sQ = 10Q = 5

Q = 3

Q = 1Q = 0.6

10 100 1k 10k 100k 1Meg

20.0

-90.0

-50.0

-10.0 H sQ = 10Q = 5Q = 3

Q = 0.6

°

98 • Chris Basso – APEC 2012

10 100 1k 10k 100k 1Meg

-170

-130Q = 1

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99

Output Impedance and Quality Factor Is there a link between Q and the phase rate of change?

d Group delay g

d

d

[s]

2

1H s

2

1H j

Let's apply the definition to a 2nd-order network:

s j

0 0

1s s

Q

200

1 jQ

a b

1 1b

99 • Chris Basso – APEC 2012

2 2

2 22

200

1

1

H a b

Q

1 1

20

20

1tan tan

1

bH

a Q

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100

Output Impedance and Quality Factor

We can apply g definition to the argument

1

20

2 220 00

2 4 2 2 2 2 4 2 20 0 0

1tan

1

2g

dQ

Q

d Q Q Q

0 0 0Q Q Q

0

2g

Q

0

At 0 the following formula links Q to the group delay

100 • Chris Basso – APEC 2012

002

ggQ f

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101

Output Impedance and Quality Factor

Let's apply the theory to a classical case, the RLC filterVin

2

L1L

C1C

Vout

parameters

Vp=5f0=1.2kL=10uC=1/(4*3.14159^2*f0^2*L)w0=(L*C)^ 0 5

3

V1AC = 1

R1R out

w0=(L C)^-0.5Q=0.6R=L*w0/QR2=1/(Q*C*w0)Q1=(sqrt(L/C))/RDzeta=(R/2)*sqrt(C/L)Dzeta1=R/(2*L*w0)

plot the ac response

101 • Chris Basso – APEC 2012

Q3=1/(2*Dzeta)per=1/(f0*sqrt(1-Dzeta^2))tp=1/(2*f0*sqrt(1-Dzeta^2))

calculate the group delay

see if we can find Q

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102

Output Impedance and Quality Factor

-10.0

01

f

-170

-130

-90.0

-50.0 0 1207 Hzf

outZ s

80.0u

140u

200u

260u

158 μsg

102 • Chris Basso – APEC 2012

10 100 1k 10k 100k 1Meg

20.0u

0 1207 158 3.14159 0.599gQ f u

Group delay

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103

Output Impedance and Quality Factor

Knowing Q can also lead us to the phase margin m

40.0

80.0

90.0

180

m OLT s

OLT s

dB

0 2

1

1OLT s

s s

80 0

-40.0

0

180

-90.0

0

-2

-1

cf

02

0 dB

103 • Chris Basso – APEC 2012

10 100 1k 10k 100k

-80.0-180 2

Open-loop ac analysis

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104

Output Impedance and Quality Factor

If we consider the open-loop gain around fc only…

Closed-loop

0 2

1

1OLT s

s s

2

0 2 0

1

1

1

OL

OL s s

T s

T s

2 2

1 1

s s s s 0

cQ

0 2c

Closed-loop

Identify

Unity return

20 2 0

1 1c c c

s s s sQ

2

Closed-loopdata

Open-loopdata

We want to link Qc and the crossover frequency

1 1

104 • Chris Basso – APEC 2012

0 2

1

1OLT s

s s

20 2cQ

2

2 2

1

1OL

c

T ss s

Q

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105

Output Impedance and Quality Factor

Calculate the TOL magnitude at crossover with Qc in:

42 1 4 1

2

c

c

Q

2 22

2 2 42

22 2

1

1

c

c c c c

c

Q

j j

Q

Solve c

1OL cT

Derive the argument of TOL simplify it: Derive the argument of TOL, simplify it:

2 2

222

222 2 2 2

2 20 2

1 1arg arg arg arg

1

cOL

c cc c

c c

jQT s

js s jQ Q

2c

105 • Chris Basso – APEC 2012

2 2

1 12 22

2 22

arg arg 1 tan tancOL

c c

c

QT s

Q

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106

Output Impedance and Quality Factor

If we substitute c by its definition, we have:

1 1

4 4

2 2arg tan tan

1 4 1 1 4 1OL

c c

T sQ Q

60.0180

T OL c mT f

dB

-30.0

0

30.0

-90.0

0

90.0

OLT s

T s

cf

OL cT f

m OL cT f

106 • Chris Basso – APEC 2012

1 10 100 1k 10k 100k

-60.0-180

OLT sm

1

4

2tan

1 4 1m

cQ

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107

Output Impedance and Quality FactorWe can now extract the closed-loop quality coefficient:

2 4

8

24 1 tan cos

tan sinm m

cm m

Q

Qc10

2010m

20

dB

10

2010m

20

dB

Q

41

2

4 1 1cos

2c

mc

Q

Q

0

2

4

6Q m

0.5

m

10

0

0

90m

20m

30m 45m

-3 dB

1

T s

T s

10

0

0

90m

20m

30m 45m

-3 dB

1

T s

T s

cQ

107 • Chris Basso – APEC 2012

0 20 40 60 80 1000

m360

2 76°

20m

10 100 1 kHz 10 kHz 100 kHz

1 T s20

m

10 100 1 kHz 10 kHz 100 kHz

1 T s

Closed-loop gain

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108

Output Impedance and Quality Factor

The formula considers the vicinity of fc only: precision?

dB

0

60.0

120

0

40.0

80.0

dB

OLT s

OLT s

cf

23m

4 92

5.00

5.08

5.16 128 mV

47 mV

1 10 100 1k 10k 100k

-120

-60.0

-80.0

-40.0cf

869u 1.15m 1.43m 1.70m 1.98m

4.84

4.92

outV t

2

1 44 1 1Q

Double zeroclose to fc

Step-load response

108 • Chris Basso – APEC 2012

13.1

47 4ln

128

cQ

12

4 1 1cos 18

2c

mc

Q

Q

"Revisiting the Response of Closed Loop of PWM Converters ", S. Ben-Yaakov, IEEE Apec 2008

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109

Output Impedance and Quality FactorWe can ac sweep the output impedance also and check g

dB 3.5 kHz

-80.0

-60.0

-40.0

-20.0

0

-20.0

20.0

60.0

100

140

outZ s outZ s

-240u

-120u

0

120u

240u

253 μsg Group delay

109 • Chris Basso – APEC 2012

1 10 100 1k 10k 100k

0u Group delay

0 3.5 253 3.14159 2.8gQ f k u 20.4m

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110

Output Impedance and Quality FactorWe can apply the technique to simple linear regulators

H s

+

inV Cr

outV s outZ s

H s

v s

outC

loadR

You have no means to perform open-loop analysis

cv s

110 • Chris Basso – APEC 2012

You have no means to perform open-loop analysis

Plot its output impedance with a network analyzer…S. Sandler, C. Hymowitz, "New Technique for Non-Invasive Testing of Regulator Stability", PET Magazine, September 2011

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111

Output Impedance and Quality Factor Plot magnitude and phase of Zout and compute g

0120 ZdBΩ

-80.0

-60.0

-40.0

-20.0

0

-40.0

0

40.0

80.0

120

500u

outZ s outZ s

1 574 9 3 14159 1 8Q f k10 100 1k 10k 100k

-300u

-100u

100u

300u

500u

574.9 μsg Group delay

111 • Chris Basso – APEC 2012

0 1 574.9 3.14159 1.8gQ f k u

4 4

1 1 12 2

4 1 1 4 1.8 1 1cos cos cos 857 31

2 2 1.8m

Qm

Q

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112

Output Impedance and Quality Factor The LDO circuit is made of the following elements

Iout

12

Vi

12

C11mF

7 Vout

13

R410k

R110k

C3C1

C2C2

R2R2

11

Q12N3055

Q22N2219

L220n

10.0V

5.00V

5.69V

Vin10

3

1mF

6

4

X1AMPSIMPGAIN = 30000

Vref2.5

R510k

R320m

Verr

10I1unknown

0V

2.50V

2.50V

6.38V

2.50V

112 • Chris Basso – APEC 2012

We can open its loop and plot the open-loop gain TOL(s)

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113

Output Impedance and Quality Factor The open-loop plot confirms the experimental results

90.0

180

40.0

80.0

30m OLT s

-90.0

0

-40.0

0

1 kHzcf

OLT s

113 • Chris Basso – APEC 2012

10 100 1k 10k 100k

-180-80.0

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114

Output Impedance and Quality Factor The phase margin is increased to 60°

1200 Z sdBΩ °

1.3 kHz

-40.0

0

40.0

80.0

-80.0

-60.0

-40.0

-20.0

outZ s outZ s

10 100 1k 10k 100k

-300u

-100u

100u

300u

500u

185.5 μsg Group delay

114 • Chris Basso – APEC 2012

0 1.3 185.5 3.14159 0.76gQ f k u

4 4

1 1 12 2

4 1 1 4 0.76 1 1cos cos cos 457 63

2 2 0.76m

Qm

Q

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115

Course Agenda

Introduction to Control Systems

Shaping the Error Signal Shaping the Error Signal

How to Implement the PID Block?

The PID at Work with a Buck Converter

Considering the Output Impedanceg p p

Classical Poles/Zeros Placement

Shaping the Output Impedance

Quality Factor and Phase Margin

115 • Chris Basso – APEC 2012

What is Delay Margin?

Gain Margin is not Enough

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116

Considering a Delay in the Loop Before a decision is actually executed, a delay occurs

The delay can be digital (computation time) or analogue The delay can be digital (computation time) or analogue

A typical delay is the duty-ratio conversion in a VM converter

+G

5 V

ont

ontd +

G

5 V

ont

ontd

+

--

errV t

compensator

d t

0 V

rampV t rampV t

swTsw

dT

+

--

errV t

compensator

d t

0 V

rampV t rampV t

swTsw

dT

Prop. delay inthe 50 – 100 ns range

116 • Chris Basso – APEC 2012

pV

swT

ramp

errV tpV

swT

ramp

errV t

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117

A Delay is a Time-Domain Shift The output signal is the input signal that occured s before

t

u t

y t

delayadvance

t

u t

y t

delayadvance

y t u t

tt1 t2

tt1 t2

117 • Chris Basso – APEC 2012

Time delay

u t y tTime delay

u t y t

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118

Deriving the Delay

To account for the delay, we need its Laplace expression

1

2

0 0

1

1

zs

s s

Q

errV s outV s d s1

peakV

cv s

H sThe plant

1

2

0 0

1

1

zs

s s

Q

errV s outV s d s1

peakV

cv s

H sThe plant

delay ?

118 • Chris Basso – APEC 2012

delay ?

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119

Deriving the Delay To account for the delay, we need its Laplace expression

y t u t

Let's start with a sinewave phasor expression

j tu t Ae

y t

Time delay

j ty t Ae

119 • Chris Basso – APEC 2012

a b a be e e j t j t j jy t Ae Ae e u t e

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120

Deriving the Delay Let's take the Laplace transform of the new expression

Y s Y js j sY s U s e

sY se

U s

Euler phasor formula uses the argument as the exponent

j

jY je

U j

s j

j je e arg je

1je

A delay block is a simple delay line!

120 • Chris Basso – APEC 2012

UTD u t y t

K = 1, td = 250 ns

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121

Building the Delay A delay line can time-shift the input signal

1

2 Vout

3

parameters

tau=250nT1TD = Tau50 = Zo

Delay block

1

2 Vout

3

parameters

tau=250nT1TD = Tau50 = Zo

Delay block

1

R150

E11

3

4

E21

VinAC = 1

1

R150

E11

3

4

E21

VinAC = 1

121 • Chris Basso – APEC 2012

Best simulation practice is to buffer the input and the output

D. Adar, S. Ben-Yaakov, "Generic Average Modeling and Simulation of Discrete Controllers ", APEC Anaheim, 2001

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122

Building the Delay A Bode plot confirms the 0-dB magnitude over frequency

-4.00

-2.00

0

2.00

4.00

se

-4.00

-2.00

0

2.00

4.00

se

Magnitudeis flat

-60.0

-40.0

-20.0

0

se

-60.0

-40.0

-20.0

0

se -9°

122 • Chris Basso – APEC 2012

10 100 1k 10k 100k 1Meg

-80.0

10 100 1k 10k 100k 1Meg

-80.0

100 kHz

180100 6.28 250 9k n

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123

Adding the Delay in the Laplace DomainWe can now update our transmission chain with the delay

1

2

1

1

zs

s s

Q

errV s outV s d s1 st

peak

eV

cv s

H sThe plant

1

2

1

1

zs

s s

Q

errV s outV s d s1 st

peak

eV

cv s

H sThe plant

0 0Q p0 0Q p

11s

zse

123 • Chris Basso – APEC 2012

1

2

0 0

1

z

peak

eH s

V s s

Q

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124

Adding the Delay in the Laplace Domain How do you deal with the term in the transfer function?

You don't: replace it with a poles/zeros combination!

ste

You don t: replace it with a poles/zeros combination!

A pole will bring phase shift as frequency increases

1

1 s 1arg tan

But you still need to compensate the transmittance decrease

A zero will do but now, all is neutralized!

1 s

2

1

124 • Chris Basso – APEC 2012

1

1

s

s

2

mag 1

1

1 1arg tan tan 0

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125

Calling the RHP Zero for Help Replacing the LHP zero by a RHP zero does the job

Both pole and zero magnitude neutralize each other Both pole and zero magnitude neutralize each other

The RHPZ phase lags and cumulates with that of the pole

20dB °

1

1st s

es

10

0

10

100

0

1001

1

s

s

1arg

s

125 • Chris Basso – APEC 2012

10 100 10 3 10 4 10 5 10 620

10 100arg1 s

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126

Mapping the Delay to the Pole/Zero Position

Both arguments must be equal:

1arg arg

1s s

es

arg 1 arg 1s s

Replacing s by j:

1 1 1tan tan 2 tan

Use the arctangent Taylor series equivalent:3 5

0

126 • Chris Basso – APEC 2012

31

5

ta ...3

n5

xxx

x 23 5

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127

We Have the Padé Approximation

2

Solving for gives us…

2

Substituting in our first expression

12s

s

e

Henri Padé1863-1953

12

es

This is the 1st-order Padé approximant of an exponential

12

x 2nd-order 21 1

12 12

x x

127 • Chris Basso – APEC 2012

2

12

xex

2

2 121 1

12 12

xex x

http://en.wikipedia.org/wiki/Padé_approximant

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128

Padé Approximant Frequency Response

dB °dB °When frequency increases, a phase deviation occurs

dB

0

2

40

20

0

1 2arg

1 2

s

s

se

dB

0

2

40

20

0

1 2arg

1 2

s

s

se

3 4 5 6

2

0

80

60

se

1 2

1 2

s

s

3 4 5 6

2

0

80

60

se

1 2

1 2

s

s

128 • Chris Basso – APEC 2012

10 100 1 10 3 1 10 4 1 10 5 1 10 610 100 1 10 3 1 10 4 1 10 5 1 10 6

Use higher order approximants to improve precision

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129

How to Avoid the Delay Line?

A delay line adds computational burden in simulations

I th i l i it th t ld b d? Is there any simpler circuit that could be used?

2 3

R11/(10n*Wtau)

C1K1

parameters

tau=250nWtau=2/tau

1

C110n SUM2

K2

5

X2SUM2K1 = 1K2 = 1

Vdelay1

E31k

6

E41

C210n

7

R31/(10n*Wtau)

V1AC = 1

RHPZ

1V s

129 • Chris Basso – APEC 2012

11 1 1 1 1

1

11out

RV s V s V s V s sR C

sC

RHPZ

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130

How to Avoid the Delay Line?

dB° dB°

Good phase response of the analogue circuit

2.00

4.00

-20.0

0

dB°Op amp phase response

2.00

4.00

-20.0

0

dB°Op amp phase response

-2.00

0

-60.0

-40.0 1112

Op amp output magnitude

Delay line output magnitude

Delay line phase response

-2.00

0

-60.0

-40.0 1112

Op amp output magnitude

Delay line output magnitude

Delay line phase response

130 • Chris Basso – APEC 2012

10 100 1k 10k 100k 1Meg

-4.00-80.0

10 100 1k 10k 100k 1Meg

-4.00-80.0

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131

Delay Margin versus Phase Margin

The characteristic equation is affected by the delay:

1 0ss e T s 1 0s T s

The stability condition for the magnitude does not change:

max 1sce T 1se 1cT

Unity return denominator T(s)

c c

The stability condition for the argument does change:

maxmax aa rrg arg g c

sce T T

T

131 • Chris Basso – APEC 2012

argm cT

maxm

c

Solvingfor max

The max acceptabledelay in the loop

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132

Delay Margin versus Phase Margin

The delay margin is thus defined by:

max Current delay

Maximum acceptabledelay

1 A buck converter features a 250-ns internal delay1. A buck converter features a 250 ns internal delay

2. At a 100-kHz crossover, the phase margin is 49.5°

3. The maximum delay, accounting for 250 ns, is:

49.51 375 μsm

132 • Chris Basso – APEC 2012

max 1.375 μs2 100 180c k

1.375 0.250 1.125µs Maximum acceptable extra delay

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133

Checking via Simulation The delay is simply added in series with the PWM block

Vout2 12

L1L vout

a c3

R6100m 5.00V10.0V

Vout2 12

L1L vout

a c3

R6100m 5.00V10.0V

Vout

16

CoutCout

ResrResr

2 12

dPWM switch VM p

3

9

X1PWMVM2L = LFs = 1Meg

ut X4

Rload2.5

Vin10 5.00V

5.20V 5.20V

524mV

T1TD = Tau50 = Zo

out

parameters

tau=250n

Vout

16

CoutCout

ResrResr

2 12

dPWM switch VM p

3

9

X1PWMVM2L = LFs = 1Meg

ut X4

Rload2.5

Vin10 5.00V

5.20V 5.20V

524mV

T1TD = Tau50 = Zo

out

parameters

tau=250n

10

RupperRupper

4

vout

13

R3R3

C3C3

15

R2R2

C1C1

C2C2

GA

IN

5

6

XPWMGAINK = 0.5

ino

u

Config_1

LoL1G

2.50V

2 50V

1.05V

5.00V

1.04V1.05V

524mV

1

R150 E1

1

3

E21

in

10

RupperRupper

4

vout

13

R3R3

C3C3

15

R2R2

C1C1

C2C2

GA

IN

5

6

XPWMGAINK = 0.5

ino

u

Config_1

LoL1G

2.50V

2 50V

1.05V

5.00V

1.04V1.05V

524mV

1

R150 E1

1

3

E21

in

133 • Chris Basso – APEC 2012

RlowerRlower

8

V22.5

VerrX2AMPSIMP

7

CoL1G

V1AC = 1

2.50V

0V

RlowerRlower

8

V22.5

VerrX2AMPSIMP

7

CoL1G

V1AC = 1

2.50V

0V Delay built with an adaptedtransmission line

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134

Checking via SimulationWith a 250-ns delay, the phase margin is acceptable

dB °dB °

90.0

180

20.0

40.0 T s

T s

m49.5°

90.0

180

20.0

40.0 T s

T s

m49.5°

-90.0

0

-20.0

0

fc

100 kHz

-90.0

0

-20.0

0

fc

100 kHz

134 • Chris Basso – APEC 2012

100 1k 10k 100k 1Meg

-180-40.0

100 1k 10k 100k 1Meg

-180-40.0

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135

Checking via Simulation If we add 1.125 µs to 250 ns, no phase margin at all!

dB °dB °

90.0

180

20.0

40.0

dB °

T s

T sm0°

90.0

180

20.0

40.0

dB °

T s

T sm0°

-90.0

0

-20.0

0

fc

100 kHz

-90.0

0

-20.0

0

fc

100 kHz

135 • Chris Basso – APEC 2012

100 1k 10k 100k 1Meg

-180-40.0

4

100 1k 10k 100k 1Meg

-180-40.0

4

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136

Course Agenda

Introduction to Control Systems

Shaping the Error Signal Shaping the Error Signal

How to Implement the PID Block?

The PID at Work with a Buck Converter

Considering the Output Impedanceg p p

Classical Poles/Zeros Placement

Shaping the Output Impedance

Quality Factor and Phase Margin

136 • Chris Basso – APEC 2012

What is Delay Margin?

Gain Margin is not Enough

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137

Gain Margin Defines the Robustness GM defines the robustness of a system to gain variations

OLT s

OLT s Conditions foroscillations:

0°0 dB

0

0dB

OL

OL

T s

T s

drift 0°0 dB

20 dB/div

T f

-38 dB

1

GM 38dBT f

137 • Chris Basso – APEC 2012

10 100 1k 10k 100k 1Meg

If the gain drifts up by 38 dB, we have oscillations

f

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138

Gain Margin Defines the Robustness In Bode representation but also in Nyquist

mm

1

2

1 GM

III

ReT

1

2

1 GM

III

ReT

orT s

Im 0T s

1

0-1,j0

e

c

0 rd

T s

m

1 GM

h

1

0-1,j0

e

c

0 rd

T s

m

1 GM

h

2 2

1GM

Re ImT f T f

138 • Chris Basso – APEC 2012

2 1 0 1 22

2

III IV

2 1 0 1 22

2

III IV

1Re

GMT f

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139

Gain Margin in NyquistWhat really matters is the distance to the "-1" point

mm1 ReT

1

2

1 Re cT

1

2

1 Re cT

-1 ReT 1 ReT

h

1

0-1,j0

e Re cT

Im cT c

h

1

0-1,j0

e Re cT

Im cT c

h ImT

2 2

1 Re Imh T T

139 • Chris Basso – APEC 2012

2 1 0 1 22

2 1 0 1 22

1h T s

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140

Rejecting the Perturbation

u (s)u (s)

A closed-loop system rejects the incoming perturbation u1

pert rbation

H(s)u2(s) y(s)+ (s)

G(s)

+

u1(s)

H(s)u2(s) y(s)+ (s)

G(s)

+

u1(s)perturbation

2 1

1

1 1

T sy s u s u s

T s T s

11h T s

140 • Chris Basso – APEC 2012

Sensitivity function S

1h T sS

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141

Watch for a Peak in S The trajectory must keep away from the "-1" point

A 0 5-radius circle detects a peak in S: modulus margin A 0.5-radius circle detects a peak in S: modulus margin

1

2

m

1

2

m

1

2

m

1

2

m

1

0 e

c

-1,j0M

1/GM

1

0 e

c

-1,j0M

1/GM

1

0 e

c

-1,j0M

1/GM

1

0 e

c

-1,j0M

1/GM

141 • Chris Basso – APEC 2012

2 1 0 1 22

2 1 0 1 22

2 1 0 1 22

2 1 0 1 22

Margin violationSpec limit

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142

400m

800mfrequency = 26.3k hertzreal = -649m imag = -111m

400m

800mfrequency = 26.3k hertzreal = -649m imag = -111m

Bode can also Show the Modulus Margin

-800m -400m 0 400m 800mreal

-800m

-400m

0

ima

g

-1

1/GMM

min1 S

-800m -400m 0 400m 800mreal

-800m

-400m

0

ima

g

-1

1/GMM

min1 S

0

10.0

20.0

1

1S

T s

dB

6-dB limit

real

0

10.0

20.0

1

1S

T s

dB

6-dB limit

real

142 • Chris Basso – APEC 2012

10 100 1k 10k 100k

-20.0

-10.0

frequency = 26.3k hertzsens = 8.67 dB

10 100 1k 10k 100k

-20.0

-10.0

frequency = 26.3k hertzsens = 8.67 dB

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143

Conclusion

Switching or linear power supplies are regulators

Applying a pure mathematical compensation brings problems Applying a pure mathematical compensation brings problems

Engineering judgment found output impedance guilty

Lack of sufficient gain at resonance brings oscillations

Standard poles/zeros placement method gives good results

For high-speed dc-dc converters, resistive shaping rules

Q to phase margin approximation requires engineering judgment

Less known delay and modulus margins are useful figures!

M i !

143 • Chris Basso – APEC 2012

Merci !Thank you!

Xiè-xie!