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SUBJECT:- COA TOPICS:-Instruction Created by : - Sanjay Patel Basic Computer Organization and Design

Basic Computer Organization and Designhmpatel123.weebly.com/uploads/2/3/7/3/23736061/che-2_coa.pdf · SUBJECT:- COA. TOPICS:-Instruction . Created by : - Sanjay Patel. Basic Computer

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Page 1: Basic Computer Organization and Designhmpatel123.weebly.com/uploads/2/3/7/3/23736061/che-2_coa.pdf · SUBJECT:- COA. TOPICS:-Instruction . Created by : - Sanjay Patel. Basic Computer

SUBJECT:- COATOPICS:-Instruction

Created by : - Sanjay Patel

Basic Computer Organization and Design

Page 2: Basic Computer Organization and Designhmpatel123.weebly.com/uploads/2/3/7/3/23736061/che-2_coa.pdf · SUBJECT:- COA. TOPICS:-Instruction . Created by : - Sanjay Patel. Basic Computer

Created by : - Sanjay Patel2

Outline Instruction code

Computer Register

Computer Instruction

Timing and control

Input – Output and interrupt

Complete Computer Description

Design of Basic Computer

Design of Accumulator logic

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Instruction Code Every different processor type has its own design

(different registers, buses, micro operations,machine instructions, etc)

Modern processor is a very complex device

It contains

Many registers

Multiple arithmetic units, for both integer andfloating point calculations

The ability to pipeline several consecutiveinstructions to speed execution

Etc

However, to understand how processors work, wewill start with a simplified processor model

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The Basic computer

The Basic Computer has two components, a processor and memoryThe memory has 4096 words in it4096 = 212, so it takes 12 bits to select a word in memory

Each word is 16 bits longCPU RAM

0

4095

015

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Computer Register

List of BC RegistersDR 16 Data Register Holds memory operandAR 12 Address Register Holds address for memoryAC 16 Accumulator Processor registerIR 16 Instruction Register Holds instruction codePC 12 Program Counter Holds address of instructionTR 16 Temporary Register Holds temporary dataINPR 8 Input Register Holds input characterOUTR 8 Output Register Holds output character

Registers in the Basic Computer

11 0PC

15 0IR

15 0TR

7 0OUTR

15 0DR

15 0AC

11 0AR

INPR0 7

Memory4096 x 16

CPU

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Process Register A processor has many registers to hold instructions, addresses, data, etc. The processor has a register, the Program Counter (PC) that holds the memory address of the next instruction to get.In a direct or indirect addressing, the processor needs to keep track of what locations in memory it is addressing: The Address Register (AR) is used for thisWhen an operand is found, using either direct or indirect addressing, it is placed in the Data Register (DR). The processor then uses this value as data for its operation.The Basic Computer has a single general purpose register – the Accumulator (AC)

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Instruction Program:- A sequence of (machine) instructions.

(Machine) Instruction :- A group of bits that tell thecomputer to perform a specific operation (asequence of micro-operation).

The instructions of a program, along with anyneeded data are stored in memory.

The CPU reads the next instruction from memoryIt is placed in an Instruction Register (IR)

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Instruction format

A computer instruction is often divided into two parts.

An opcode (Operation Code):- that specifies theoperation for that instruction

An address:- that specifies the registers and/or locationsin memory to use for that operation

In the Basic Computer, since the memory contains 4096(= 212) words, we needs 12 bit to specify which memoryaddress this instruction will use

In the Basic Computer, bit 15 of the instruction specifiesthe addressing mode

(0: direct addressing, 1: indirect addressing)

Opcode Address

Instruction Format

15 14 12 0I

11

Addressing mode

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Computer Instruction Dec-2005, June-2008

A basic computer has three types of instruction.

Basic Computer Instruction Format

15 14 12 11 0I Opcode Address

1. Memory-Reference Instructions (OP-code = 000 ~ 110)

2. Register-Reference Instructions (OP-code = 111, I = 0)

3. Input-Output Instructions (OP-code =111, I = 1)

15 12 11 0Register operation0 1 1 1

15 12 11 0I/O operation1 1 1 1

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Memory Reference Instruction

Mnemonic Description

AND Logically AND memory word to ACAC AC * M[AR]

ADD Logically ADD memory word to ACAC AC + M[AR]

LDA Load AC from memoryAC M[AR]

STA Store content of AC into memoryM[AR] AC

BUN Branch unconditionallyPCAR

BSA Branch and save return address M[AR]PC, PCAR+1

ISZ Increment and skip if zero

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Register Reference instruction 2005, 2008,2009

Mnemonic Description

CLA Clear Accumulator Register

CLE Clear bit E

CMA Complement contents of AC register

CME Complement E bit

CIR Circulate Right AC register and E bit

CIL Circulate Left AC register and E bit

INC Increment AC register

SPA Skip next instruction if content of AC register are positive

SNA Skip next instruction if content of AC register are Negative

SZA Skip next instruction if content of AC register are ZERO

SZE Skip next instruction if bit E=0

HLT Stop processing and Halt the computer

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Input-Output InstructionMnemonic Description

INP Load a Character in Accumulator register from input port

OUT Send a Character to output port from AC register

SKI Skip next instruction if input flag=1

SKO Skip next instruction if output flag=1

ION Enable Interrupt IEN 1

IOF Disable Interrupt IEN 0

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Control unit of basic computer Control unit (CU) of a processor translates from

machine instructions to the control signals for themicro operations that implement them.

Control units are implemented in one of two ways.

Hardwired Control:- CU is made up of sequentialand combinational circuits to generate the controlsignals.

Micro programmed Control :- A control memory onthe processor contains micro programs thatactivate the necessary control signals

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Control Unit of Basic ComputerJune-2008, Dec-2009, June-2005

Instruction register (IR)15 14 13 12 11 - 0

3 x 8decoder

7 6 5 4 3 2 1 0

ID0

15 14 . . . . 2 1 04 x 16

decoder

4-bitsequence

counter(SC)

Increment (INR)Clear (CLR)Clock

Other inputs

Controlsignals

D

T

T

7

15

0

CombinationalControl

logic

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Instruction Cycle

In Basic Computer, a machine instruction is executed in the following cycle:1. Fetch an instruction from memory2. Decode the instruction3. Read the effective address from memory if the

instruction has an indirect address, Execute the instruction.

4. Store the result. After an instruction is executed, the cycle starts

again at step 1, for the next instruction Note: Every different processor has its own (different)

instruction cycle

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Instruction Cycle

= 0 (direct)

StartSC ← 0

AR ← PCT0

IR ← M[AR], PC ← PC + 1T1

AR ← IR(0-11), I ← IR(15)Decode Opcode in IR(12-14),

T2

D7= 0 (Memory-reference)(Register or I/O) = 1

II

Executeregister-reference

instructionSC ← 0

Executeinput-outputinstructionSC ← 0

M[AR]←AR Nothing

= 0 (register)(I/O) = 1 (indirect) = 1

T3 T3 T3 T3

Executememory-reference

instructionSC ← 0

T4

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Instruction Cycle

D7 I Instruction Executed

0 0 Memory Reference Instruction with a direct address

0 1 Memory Reference Instruction with a indirect address

1 0 Register Reference Instruction

1 1 I/O Instruction

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Program Interrupt

Interrupt MethodMaskable interruptNon- Maskable interrupt

After interrupt cycle

0 BUN 112001

PC = 256255

1 BUN 0

Before interrupt

MainProgram

1120I/O

Program

0 BUN 11200

PC = 1

256255

1 BUN 0

Memory

MainProgram

1120I/O

Program

256

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Interrupt Cycle (3-4 times in GTU)

Store return address

R =1=0

in location 0M[0] ← PC

Branch to location 1PC ← 1

IEN ← 0R ← 0

Interrupt cycleInstruction cycle

Fetch and decodeinstructions

IEN

FGI

FGO

Executeinstructions

R ← 1

=1=1

=1

=0

=0

=0

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Complete Computer Description

Instruction cycleInterrupt cycleMemory- reference instructionRegister- reference instructionInput-output instructionComputer register

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COMPLETE COMPUTER DESCRIPTIONFlowchart of Operations

=1 (I/O) =0 (Register) =1(Indir) =0(Dir)

startSC ← 0

R

AR ← PCR’T0

IR ← M[AR], PC ← PC + 1

R’T1

AR ← IR(0~11), I ← IR(15)D0...D7 ← Decode IR(12 ~ 14)

R’T2

AR ← 0, TR ← PC

RT0

M[AR] ←TR, PC ← 0

RT1

PC ← PC + 1, IEN ← 0R ← 0, SC ← 0

RT2

D7

I I

ExecuteI/O

Instruction

ExecuteRR

Instruction

AR <- M[AR] IdleD7IT3 D7I’T3 D7’IT3 D7’I’T3

Execute MRInstruction

=0(Instruction =1 (interrupt Cycle) Cycle)

=1(Register or I/O) =0(Memory Ref)

D7’T4

IEN

FGI

FGO

=1

=1

=1

=0

=0

=0

R ← 1

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Design of Accumulator Logic

The fig shows the control circuit associated with the AC register.

The ALU has three source of input.AC registerDR registerINPR register

The output of ALU is connected as an input for AC registerThe AC register has three control inputs.LDINRCLR

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Thank You !

Created by :-

S A N J A Y P A T E LAssistant Professor (I.T.)

Shankersinh Vaghela Bapu

Institute of Technology, Gandhinagar