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The Bosch Process Brian Vanderelzen

Bosh Process

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Page 1: Bosh Process

The Bosch ProcessBrian Vanderelzen

Page 2: Bosh Process

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

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Bosch Process Overview– U.S. Patent #5,501,893– Assigned to Robert Bosch Gmbh– 8/5/94– A mechanism for anisotropically etching silicon in

a plasma environment– The mechanism employs alternating a semi-

isotropic etch step with a polymerizing step– Initial chemistry involved SF6 & Ar for the etch,

CHF3 & Ar for the polymerization– The Bosch process offers significant advantages

over prior art including repeatability, etch rate, selectivity, and aspect ratio

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

3Bosch Process Overview (Cont.)

• Processed licensed initially by STSystems, Inc. who continued to advance the process in conjunction with Bosch

• Process currently licensed by a wide variety of Semiconductor tool manufacturers

• A primary enabler of MEMS technology• Enables very deep etching in silicon with high

selectivity– Depths > 1mm– Rates > 10 microns per minute– Aspect ratios > 50:1– Selectivities

• >50:1 Photoresist mask• >200:1 SiO2 mask

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

4Anatomy of a directional etch

• Reactive Ion Etching is a bit of a misnomer. Etching is primarily done by neutral reactive species. This chemical component is more or less isotropic.

• In order to achieve anisotropy, there must be some form of resistance to the chemical component

• A delicate balance must then be achieved such that the chemical etch can only proceed where the directional physical ion bombardment overcomes this etch resistance

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

5Mechanisms of Anisotropy

• Generally etch resistance is referred to as passivation – an etch resistant layer deposited during the etch– Polymer forming gas – fluorocarbons– O2 to form etch resistant oxide– Self passivating etchants such as HBr

• Reacted species exhibit low volatility• Require physical bombardment to be released from the

surface

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

6Limitations of Single Step Process

• Passivation inhibits vertical etching at the same time that it prevents lateral etch, resulting in slow etch rates

• Passivating chemistry often reacts with the etch mask reducing selectivity– Fluorocarbons etch oxide– O2 etches photoresist

• The physics of deposition is significantly different than that of etch– As aspect ratio increases, the demands of each change

independently and frequently in opposite directions– Low pressures and high bias voltage improves directionality,

allowing ions to reach the bottom of narrow trenches. These same parameters reduce efficiency and conformality of deposition.

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

7Do the Two Step

• The Bosch Process overcomes these limitations by segregating the etch and passivation into independently controllable steps

• The typical process alternates a highly chemical SF6 based etch step with a teflon-like polymer forming passivation step

• The passivation step conformally coats all surfaces• The etch may then only proceed where the energetic

ions break through this passivation• Typical step times range from 5 to 20 seconds• The etch step typically exhibits poor anisotropy,

however, by keeping the steps short, one builds an anisotropic etch from stacked isotropic ‘blocks’

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

8The Etch Step

• Directional ions and non-directional reactive species etch silicon for several seconds

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

9Passivation

• ICP power breaks down C4F8, with little to no bias power

• A fluorocarbon polymer precipitates out on all surfaces

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

10Repeat Etch

• Directional energetic ions break through passivationon horizontal surfaces

• Reactive neutral species do not etch until silicon is exposed

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

11Repeat Etch 2

• Repeat isotropic etches stack to form an anisotropic etch

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

12Scalloping

• The stepped process typically results in a scalloped sidewall

• This SEM shows typical undercut and scalloping for a moderately high rate process

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

13Parameter Ramping

• The physics of the process changes with aspect ratio• It is desirable to ramp parameters as the process

proceeds • Pressure is routinely decreased with time to allow

gases to get in and out of narrow features and to increase ion directionality

• Cycle times, gas flows, and power may also be adjusted as the etch progresses

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

14Issues – Undercut and Scalloping

• Undercut and scalloping are a result of the isotropic nature of the etch step

• May be reduced by shortening cycle times• Adding C4F8 or O2 to the etch will increase step anisotropy and

reduce both scalloping and undercut at the expense of selectivity

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

15Undercut & Scalloping

• Image on left shows scalloping < 20nm• Image on the right ‘probably’ better• Results achieved by adding high O2 flow to etch step• Dramatically reduces PR selectivity – will require hard mask

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

16Issues – ARDE (RIE Lag)

• Etching is highly aspect ratio dependent• High aspect ratio features tend to etch much slower than small

aspect ratio features• It is very difficult to optimize an etch for varying feature sizes

– Etches that are optimized for small features tend to widen large features

– Etches optimized for large features tend to cause etch stopping or grass in small features

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

17Issues - Notching

Slide courtesy of CMI - Center of MicroNanoTechnology, Ecoles Polytechniques fédérales de Lausanne

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

18Notching Solution – lf pulsing

Slide courtesy of CMI - Center of MicroNanoTechnology, Ecoles Polytechniques fédérales de Lausanne

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

19Issues – Loading and Microloading

• The etch is significantly chemically limited

• The rate at which gas reaches the surface determines etch rate

• Thus patterns with large open areas may etch slower than denser patterns– Using the same recipe, a wafer with

80% open area may etch as slow as ¼ the rate of a wafer with 10% open area

– Etch recipes must be optimized for specific pattern density

• Local density or microloading also an issue– Ideally solved in the design phase

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MICHIGAN NANOFABRICATION FACILITY, THE UNIVERSITY OF MICHIGAN, ANN ARBORmnf.umich.edu

20The Modern Bosch Process

• The Bosch process has been developed and improved over the years primarily in University and R & D type environments

• Tool manufacturers are now working on creating production ready tools and processes

• Etch rate has seen dramatic increases recently to over 40 microns per minute

• Tools for 200mm and 300mm wafers are now being produced• Many of typical Bosch process issues have now been resolved

– Etch rates > 40 microns per minute– Uniformity < 3%– Aspect ratios near 100:1– Sidewall roughness < 15nm– SOI notching greatly improved or eliminated– ARDE issues greatly reduced

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© Surface Technology Systems plc, January 06 STS Confidential

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Recent Process Results

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Pegasus: An Enabling Technology

Power Devices

RF MEMSDe-couplingcapacitors

Ink Jet heads

Micro Fluidics‘Lab on a chip’

Silicon Inertial sensors

Optical MEMSswitching

AdvancedPackaging

MEMS Pressuresensors

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Via SOI

50µm vias, 200mm wafers

Etch Characteristic Target AchievedDepth (µm) 250

>10

<3

<200

89

<500

250

Etch Rate (µm/min) 10.06

Uniformity (±%) <1

Sidewall Roughness (nm) <186

Profile angle (o) 90

Notching (nm/edge) ~760

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Very High Aspect Ratio

Aspect Ratio: 73:1!

Issues:- Bowing at top of trench

Process development still in progress.

0.8µm trench, 150mm wafer (note: ¼ piece)

Etch Characteristic Specification Achieved Depth (µm) 100 ~81Rate (um/min) >3 1.49Uniformity (±%) 5 2.2Selectivity Si:SiO2 >50:1 >54:1Initial mask undercut (nm) <50 <60Sidewall roughness (nm) <50 ~40Profile (º) 89-90 89.9

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Wafer Level Packaging

180µm trench, 200mm wafer

Etch Characteristic Target Achieved

Depth (µm) 75

>10

55-60

75

Etch Rate (µm/min) ~15

Profile angle (o)

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Results of recent work to increase etch rate

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Pegasus High Rate Switched Process

Close to practical application

100µm via

69µm deep

etched at 35µm/min

on standard Pegasus

(200mm wafer, open area 10%)

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Pegasus High Rate Switched Process

Champion data

35µm trench

92µm deep

etched at 46µm/min

on standard Pegasus

(200mm wafer, open area 1%)

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Pegasus High Rate Switched Process

Champion data

80µm trench

100µm deep

etched at 50µm/min

on standard Pegasus

(200mm wafer, open area 1%)

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STS Confidential

Pole Position in DRIE

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© Surface Technology Systems plc, January 06 STS Confidential

STS ASE-SR Process Capabilities

Prepared forUniversity of Michigan NNIN Meeting

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Contents

Examples of process capability of standard rate system at University of Michigan

Deep etching at high etch ratesHigh aspect ratio etchingSmooth sidewallsMinimising RIE lag

STS Contact details

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© Surface Technology Systems plc, January 06 STS Confidential

Deep Etching

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Through Wafer / Deep Etch

Main Requirements:High Etch-rateHigh Selectivity to MaskProfile Control of >10:1 Aspect RatioSidewall Roughness Control

Silicon micromachined fuel atomiser showing smooth

sidewalls and base of silicon. A magnification of the exit hole

is shown top right.

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Deep Etching

Cross-section of a 350µm deep bore through silicon.Etch rate 2.8µm/min, anisotropy >0.99.

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Through Wafer Etching

Anisotropy >0.99Selectivity >300:1 to SiO2 maskEtch Rate » 3 µm/minWafer is 200 µm thick, underlayer is SiO2

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© Surface Technology Systems plc, January 06 STS Confidential

Smooth Sidewalls

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Ramping Gas Flow

Without Parameter Ramping

Undercut/edge =320nm

Scalloping = 230nm

With Parameter Ramping

Undercut/edge =100nm

Scalloping = 40nm

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© Surface Technology Systems plc, January 06 STS Confidential

High Aspect Ratio Etching

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High Aspect Ratio Via Etch

30 µm via,324 µm depth:

Typical results:90.2°>50:1 Si:PR

Etch rate, depth limited by sidewall break-down

100mm wafer diameter, 5% exposed area,7 µm photoresist + 3 µm TEOS mask

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High Aspect Ratio Via Etch - Breakdown

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High aspect ratio viasHigh Aspect Ratio Etch

Typical application: Trench capacitors, trench isolation, MOS decoupling capacitors in RF circuits

Typical requirements:2-20 µm holes/trenches

Up to 100 µm depthVertical/positive slopeSmooth sidewallsRounded base

Results89.4° profile Selectivity >20:1 Si:Ox;>10:1 Si:PR<80nm scallops; <270nm/edge CD loss

Typical example:1.5 µm diameter holes>33 µm depth150 mm wafer diameter~15 % exposed Si area

Courtesy of F. Roozeboom, Philips

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RIE Lag

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Reducing RIE Lag

Control of RIE lag is difficult however there are some general process trends which help.

Increase the deposition characteristicThe deposition at the base of large features is greater than that in smaller features.

Reduce etch rate in larger features

STS Confidential

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Examples of Minimal RIE Lag

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If You Need More Information Contact…

Steve HallMid West Regional Sales Manager

Cell: 608 234 2934Email: [email protected]