By Marek PerkowskiSome slides of M. Thornton used

Introduction

Introduction: Introduction: What is the sense What is the sense

in MV logicin MV logic

THE MULTIPLE-VALUED THE MULTIPLE-VALUED LOGIC.LOGIC.

• What is it?• WHY WE BELIEVE IT HAS A BRIGHT

FUTURE.• Research topics (not circuit-design oriented)• New research areas• The need of unification

Is this whole a nonsense?Is this whole a nonsense?• When you ask an average engineer from industry,

he will tell you “multi-valued logic is useless “multi-valued logic is useless because nobody builds circuits with more than because nobody builds circuits with more than two values”two values”

• FirstFirst, it is not true, there are such circuits built by top companies (Intel Flash Strata)

• SecondSecond, MV logic is used in some top EDA tools as mathematical technique to minimize binaryminimize binary logic (Synopsys, Cadence, Lattice)

• ThirdlyThirdly, MV logic can be realized in softwarerealized in software and as such is used in Machine Learning, Artificial Intelligence, Data Mining, and Robotics

Short Introduction: multiple-valued logicmultiple-valued logic

{0,1} - binary logic (a special case)

{0,1,2} - a ternary logic

{0,1,2,3} - a quaternary logic, etc

Signals can have values from some set, for instance {0,1,2}, or {0,1,2,3}

Minimal valueMIN

MAX

21

Maximal value

12

1

23

23

23

Binary logic is doomedBinary logic is doomed

• It dominates hardware since 1946• Many researchers and analysts believe that the

binary logic is already doomed - because of Moore's Law

• You cannot shrink sizes of transistors indefinitelyindefinitely• We will be not able to use binary logic alonealone in

the generation of computer products that will start to appear around 2020.

Quantum phenomenaQuantum phenomena

• They will have to be considered in one way or another

• It is not sure if standard binary logic will be still a reasonable choice in new generation computing

• Biological models

• Chip size and performance are increasingly related

to number of wires, pins, etc., rather than to the devices themselves.

• Connections will occupy higher and higher percentage of future binary chips, hampering future progress around year 2020.

• In principle, MVL can provide a means of increasing data processing capability per unit chip area.

• MVL can create automatically efficient MVL can create automatically efficient programs from dataprograms from data

Future “Edge” of MVL

From twotwo values to moremore values

• The researchers in MV logic propose to abandon Boolean principles entirely

• They proceed bravely to another kind of logic, such as multi-valuedmulti-valued, fuzzyfuzzy, continuouscontinuous, setset or quantum.quantum.

• It seems very probable, that this approach will be used in at least some future calculatingcalculating products.

Multi-Valued Logic SynthesisSynthesis(cont)

• The MVL research investigates – Possible gatesPossible gates, – Regular gate connection structuresconnection structures (MVL PLA), – Representations Representations - generalizations of cube calculus

and binary decision diagrams (used in binary world to represent Boolean functions),

– Application of design/minimization algorithms– General problem-solving approachesGeneral problem-solving approaches known from

binary logic such as:• generalizations of satisfiability, graph algorithms or

spectral methods, • application of simulated annealing, genetic algorithms and

neural networks in the synthesis of multiple valued functions.

Binary versus MVBinary versus MV Logic Synthesis Research

• There is less research interest in MVL because such circuits are not yet widely used in industrial products

• MV logic synthesis is not much used in industry.• Researchers in hundreds• Only big companies, military, government. IBM• The research is more theoretical and fundamental.• You can become a pioneerYou can become a pioneer – it is like Quine and

McCluskey algorithm in 1950• Breakthroughs are still possibleBreakthroughs are still possible and there are many

open research problems• Similarity to binary logic is helpful.

However………,However………,

• if some day MV gatesMV gates were introduced to practical applications, the markets for them will be so large that it will stimulate exponential growthexponential growth of research and development in MV logic.

• and then, the accumulated 50 years of accumulated 50 years of researchresearch in MV logic will prove to be very practical.

ApplicationsApplications• Image Processing

• New transforms for encoding and compression

• Encoding and State Assignment

• Representation of discrete information

• New types of decision diagrams

• Generalized algebra

• Automatic Theorem Proving

History History and and

ConceptsConcepts

Jan Lukasiewicz (1878-1956)

• Polish minister of Education 1919

• Developed first ternary ternary predicate calculuspredicate calculus in 1920

• Many fundamental works on multiple-valuedmultiple-valued logic

• Followed by Emil Post,Emil Post,

• American logician born in Bialystok, Poland

LiteralsLiterals

• Post Literals:

0 1 2

MV functions of single variableMV functions of single variable

• Generalized Post Literals: 0 1 2

1

0 1 2

1

2 2

1

2

0 1 2

1

0 1 2

1 1

2 22

0 1 2

• Universal Literals:

0 1 2

2 1 0

= wire

0 1 2

1

0 1 2

1

22

0 1 2

2 1 0

= negation

MV functions of single variable (cont)MV functions of single variable (cont)

• Let us start with an example that will help to understand,

Suppose that we have the following table, and we need to build a circuit with MV-Gates, (MAXMAX & MINMIN).

As we can see, this is ternary logic.

Multiple-Valued LogicMultiple-Valued Logic

00 2 2 2

01 - - 0,2

02 1,2 1,2 0,1

10 2 2 -

11 2 2 -

12 0 0 0

20 1 2 2

21 - 2 2

22 0 0 -

a b c 0 1 2

00 2 2 2

01 - - 0,2

02 1 1 0,1

10 2 2 -

11 2 2 -

12 0 0 0

20 1 2 2

21 - 2 2

22 0 0 -

a b c 0 1 2

a0,1 b0,1

b0,1 c1,2

a0,1 b0,1 + b0,1 c1,2

“Covering 2’s in the map”

00 - - -

01 - - -

02 1 1 1

10 - - -

11 - - -

12 0 0 0

20 1 - -

21 - - -

22 0 0 -

ab c 0 1 2

a0

b0,1

1.a0,1 +1.b0,1

“Covering 1’s in the map”

MVL Circuits

MIN-gate

MAX-gate

SOP = a0,1 b0,1 + b0,1 c1,2+ 1.a0,1 +1.b0,1

1

a 0,1

b 0,1

1

Min

Min

Min

Min

Max fc 1,2

Example of Application of logic with MV inputs and binary outputs to minimize area of custom PLA with decoders.

• Pair of binary variables corresponds to quaternary variable X• a’+b’=X012

• a’+b=X013

a b 0 1

0 1

0 1

2 3

a + b’ = X023

a + b = X123

(a + b’) *(a’+b)= X023 * X013

Thus equivalence can be realized by single column in PLA with input decoders instead of two columns in standard PLA

Multiple Valued Logic

• Currently Studied for Logic Circuits with More

Than 2 Logic States

– Intel Flash Memory – Multiple Floating Gate Charge

Levels – 2,3 bits per Transistor

http://www.ee.pdx.edu/~mperkows/ISMVL/flash.html

• Techniques for Manipulation Applied to Multi-

output Functions

– Characteristic Equation

– Positional Cube Notation (PCN) Extensions

MVI Functions

• Each Input can have Value in Set {0, 1, 2, ..., pi-1}

1:{0,1,..., } {0,1, }iF p X

• MVI Functions

• X is p-valued variable

• literal over X corresponds to subset of values

of S {0, 1, ... , p-1} denoted by XS

MVL Literals

• Each Variable can have Value in Set {0, 1, 2, ..., pi-1}

• X is a p-valued variable

• MVL Literal is Denoted as X{j} Where j is the Logic

Value

• Empty Literal: X{}

• Full Literal has Values S={0, 1, 2, …, p-1}

X{0,1,…,p-1} Equivalent to Don’t Care

MVL Example• MVI Function with 2 Inputs X, Y

– X is binary valued {0, 1}– Y is ternary valued {0, 1, 2}– n=2 pX=2 pY=3

• Function is TRUE if:– X=1 and Y= 0 or 1– Y=2– SOP form is:– F = X{1}Y{0,1} + X{0,1}Y{2}

• Literal X{0,1} is Full, So it is Don’t Care– implicant is X{1} Y{0,1}

– minterm is X {1}Y{0}

– prime implicants are X{1} and Y{2}

0 1

0 1

1 1

2 1 1

X

Y

F

MVL to MVL to encode encode

binary logicbinary logic

PLA with decoders

a b

cd

X012

Y012

X013

Y013

X023

Y023

Y123

X123

decoders

Standard PLA

xx

x

x

T1= (a’ b) (c d)

x

x

x

T2 = (a’ + b’) (c’ + d)

x Z=T1+T2

• Such PLAs can have much smaller area thans to more powerful functions realized in columns

• The area of decoders on inputs is negligible for large PLAs

• Multi-valued logic is used to minimize mv-input, binary-output functions with capital letter inputs X,Y,Z,etc.

PLA with decoders

Multi-output Binary Function

• Consider0( , , )f x y z x z x y x z

1( , , )f x y z z x y x

y

z

f0

f1

x y z f0 f1 0 0 0 1 0 0 0 1 1 1 0 1 0 1 1 0 1 1 0 1 1 0 0 0 0 1 0 1 1 1 1 1 0 0 0 1 1 1 1 1

Multi-output Binary Function

• Consider 0( , , )f x y z x z x y x z

1( , , )f x y z z x y

x

y

z

f0

f1

x y z f0 f1 0 0 0 1 0 0 0 1 1 1 0 1 0 1 1 0 1 1 0 1 1 0 0 0 0 1 0 1 1 1 1 1 0 0 0 1 1 1 1 1

x y z W F 0 0 0 0 1 0 0 0 1 0 0 0 1 0 1 0 0 1 1 1 0 1 0 0 1 0 1 0 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 0 0 1 0 0 1 0 1 0 1 0 1 1 0 1 1 1 1 1 0 0 0 1 1 0 1 0 1 1 1 0 1 1 1 1 1 1

x

y

z

F

W

Characteristic Equation

Characteristic Characteristic EquationEquation

Characteristic Equation

{0} {0} {0} {0} {0} {0} {1} {0}

{0} {0} {1} {1} {0} {1} {0} {0}

{0} {1} {0} {1} {0} {1} {1} {1}

{1} {0} {1} {0} {1} {0} {1} {1}

{1} {1} {1} {0} {1} {1} {1} {1}

F x y z W x y z W

x y z W x y z W

x y z W x y z W

x y z W x y z W

x y z W x y z W

Sum of Minterms

x y z W F 0 0 0 0 1 0 0 0 1 0 0 0 1 0 1 0 0 1 1 1 0 1 0 0 1 0 1 0 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 0 0 1 0 0 1 0 1 0 1 0 1 1 0 1 1 1 1 1 0 0 0 1 1 0 1 0 1 1 1 0 1 1 1 1 1 1

Positional Cube Notation (PCN) for MVL Positional Cube Notation (PCN) for MVL FunctionsFunctions

• Binary Variables, {0,1},

Represented by 2-bit Fields

• MV Variables, {0,1,…,p-1}, Represented by p-bit Fields

• BV Don’t Care is 11

• MV Don’t Care is 111…1

• MV Literal or Cube is Denoted by C()

00

0 10

1 01

* 11

PCN for MVL Example

• Positional Cube Corresponding to X{1} is C(X{1})

{1} {0,1} {0,1} {2}F X Y X Y

 

X Y 01 110 11 001

{1}( ) 01 111C X

• Since Y{0,1,2} is Don’t Care

PCN for MVI-BO Example

• View This as a SOP of MVI Function:

1

2

3

1 2 3( , ); ( , , )

f a b ab

f ab

f ab a b

f a b f f f f

{0} {0} {0} {0} {1} {2} {1} {0} {2} {1} {1} {0,1}F f a b z a b z a b z a b z

• F is the Characteristic Equation

za b f1 f2 f3

a b

10 10 100

a b 10 01 001

a b 01 10 001

a b 01 01 110

List Oriented ManipulationList Oriented Manipulation

• Size of Literal = Cardinality of Logic Value Set

x{0,2} size = 2

• Size of Implicant (Cube, Product Term) = Integer

Product of Sizes of Literals in Cube

• Size of Binary Minterm = 1 Implicant of Unit Size

EXAMPLE f (x1,x2,x3,x4,x5,x6){1} {1} {0} {0,1} {0,1} {0,1}

1 3 4 1 3 4 2 5 6

2 5 6

1 1 1 2 2 2 01 0110 1111 11 8

# ' 3 ( , , )

implicant x x x x x x x x x

size

Don t Cares x x x

Logic Operations

• Consider Implicants as Sets

– Apply (, , , etc)

• Apply Bitwise Product, Sum, Complement to PCN

Representation

• Bitwise Operations on Positional Cubes May Have

Different Meaning than Corresponding Set Operations

EXAMPLE

Complement of Implicant Complement of Positional Cube

MVL Logical OperationsMVL Logical Operations• AND Operation – MIN - Set Intersection

• OR Operation – MAX - Set Union

• NOT Operation – Set Complement

EXAMPLE{0,1,3} {1,2} {1} {2} {1} {2}

{0,1,3} {1,2} {1} {2,3} {0,1,3} {1,2,3}

{0,1,3} {2,4}5;

X Y X Y X Y

X Y X Y X Y

p X X

MVL Number of Functions of 1 Variable

p pp 2 4 3 27 4 256 5 3125 6 46656 7 823543 8 16777216

Example of Example of MV function MV function minimizationminimization

Cube Merging• Basic Operation – OR of Two Cubes

• MVL Operation – MAX is Union of Two Cubes

EXAMPLE

= 1 {0,1} 0 1 = 0 {0,1} 0 1

Merge and into

= {0,1} {0,1}0 1

( )ac d ac d c d a a c d {1} {0,1} {0} {1} {0} {0,1} {0} {1}

{0,1} {0} {1} {1} {0}

{0,1} {0,1} {0} {1}

( )( )

a b c d a b c d

b c d a a

a b c d

Multi-Output Minimization Example

Input Output X1 X2 X3 f0 f1 f2 0 0 0 0 1 1 0 0 1 0 0 1 0 1 0 0 0 0 0 1 1 0 0 1 1 0 0 0 0 0 1 0 1 1 1 0 1 1 0 1 0 0 1 1 1 1 0 0

X1 X2 X3 X4 F 1 0 0 0 0 0 2 0 0 0 1 1 3 0 0 0 2 1 4 0 0 1 0 0 5 0 0 1 1 0 6 0 0 1 2 1 7 0 1 0 0 0 8 0 1 0 1 0 9 0 1 0 2 0 10 0 1 1 0 0 11 0 1 1 1 0 12 0 1 1 2 1 13 1 0 0 0 0 14 1 0 0 1 0 15 1 0 0 2 0 16 1 0 1 0 1 17 1 0 1 1 1 18 1 0 1 2 0 19 1 1 0 0 1 20 1 1 0 1 0 21 1 1 0 2 0 22 1 1 1 0 1 23 1 1 1 1 0 24 1 1 1 2 0

Minimization Example (cont)

{0} {0} {0} {1} {0} {0} {0} {2}1 2 3 4 1 2 3 4

{0} {0} {1} {2} {0} {1} {1} {2}1 2 3 4 1 2 3 4

{1} {0} {1} {0} {1} {0} {1} {1}1 2 3 4 1 2 3 4

{1} {1} {0} {0} {1} {1} {1} {0}1 2 3 4 1 2 3 4

F X X X X X X X X

X X X X X X X X

X X X X X X X X

X X X X X X X X

Sum of Minterms (Fig. 10.7 PLA Implementation)

Merging• Merge 1st and 2nd

• Merge 3rd and 4th

• Merge 5th and 6th

• Merge 7th and 8th

{0} {0} {0} {1,2} {0} {0,1} {1} {2}1 2 3 4 1 2 3 4

{1} {0} {1} {0,1} {1} {1} {0,1} {0}1 2 3 4 1 2 3 4

F X X X X X X X X

X X X X X X X X

X1 X2 X3 X4 F 1 0 0 0 0 0 2 0 0 0 1 1 3 0 0 0 2 1 4 0 0 1 0 0 5 0 0 1 1 0 6 0 0 1 2 1 7 0 1 0 0 0 8 0 1 0 1 0 9 0 1 0 2 0 10 0 1 1 0 0 11 0 1 1 1 0 12 0 1 1 2 1 13 1 0 0 0 0 14 1 0 0 1 0 15 1 0 0 2 0 16 1 0 1 0 1 17 1 0 1 1 1 18 1 0 1 2 0 19 1 1 0 0 1 20 1 1 0 1 0 21 1 1 0 2 0 22 1 1 1 0 1 23 1 1 1 1 0 24 1 1 1 2 0

Minimization Example (cont){0} {0} {0} {1,2} {0} {0,1} {1} {2}

1 2 3 4 1 2 3 4

{1} {0} {1} {0,1} {1} {1} {0,1} {0}1 2 3 4 1 2 3 4

F X X X X X X X X

X X X X X X X X

0 1 2 3 1 2f X X X X X

1 1 2 3 1 2 3f X X X X X X

2 1 2 3 1 2f X X X X X

Multi-Output Function Using of Multi-Output Prime Implicants (Fig. 10.8 PLA Implementation)

History History againagain

Why we need Multiple-Valued logic?Why we need Multiple-Valued logic?• In new technologies the most delay and power

occurs in the connections between gates.• When designing a function using Multiple-Valued

Logic, we need less gatesless gates, which implies less less number ofnumber of connectionsconnections, then less delayless delay.

• Same is true in case of software (program) realization of logic

• Also, most the natural variablesnatural variables like color, is multi-valued, so it is better to use multi-valued logic to realize it instead of coding it into binary.

• In multi-valued logic, the binary AND gate is replaced by MINMIN gate, and OR by MAXMAX

• But, ANDAND can be also replaced by arithmeticarithmetic multiplicationmultiplication, or modulo modulo multiplicationmultiplication, or Galois multiplicationGalois multiplication

• OR can be also replaced by modulo modulo additionaddition, or by Galois additionGalois addition, or by Boolean Ring additionBoolean Ring addition, or by…..

• Finally, the number of values in infiniteinfinite

• This way we get Lukasiewicz logic, fuzzy This way we get Lukasiewicz logic, fuzzy logic, possibilistic logic, and so on…logic, possibilistic logic, and so on…

• Continuous logics

• There are very many ways of creating gates in MVL

• They have different mathematical properties• They have very different costs in various

technologies• The values and operators can describe time, moral

values, energy, interestingness, utility, emotions…….

Mathematical, logical, system science, or psychological/ methodological/

philosophical foundations• Functional completeness theory studies the

construction of logical functions from a set of primitives and enumeration of bases.

• The problems which are investigated include:– classificationclassification of functions

– enumeration of basesenumeration of bases of a closed subset of the set of all k-valued logical functions

– study of particular kinds of functionsparticular kinds of functions (monotone, symmetric, predicate, etc.) in multi-valued logics.

Are we sure that Lukasiewicz Are we sure that Lukasiewicz was the first human who had was the first human who had

these ideas?these ideas?

• Some Chinese philosophers claim that the Buddhist logic,Buddhist logic, invented Before Christ Era, was very similar to fuzzy logic

• Raymon Lullus (Ramon Llull) invented many concepts that were hundreds yearshundreds years ahead of his time

Raymon LullusRaymon Lullus, 1235-1316 (probably)

• Creator of “Cartesian “Cartesian Product”Product”

• Creator of binary binary counting systemcounting system

• Creator of multi-multi-valued logic and valued logic and counting systemcounting system

• Creator of the concept of logic computerlogic computer

Lotfi Zadeh (1921- )Lotfi Zadeh (1921- )• Father of Fuzzy

Logic• Professor of

University of California in Berkeley

• First paper on fuzzy logic published in 1956

Continuous Continuous LogicLogic

Continuous LogicContinuous Logic• From two values to many values to infinite number of

values– Fuzzy logic (Lotfi Zadeh),

– Lukasiewicz logic,

– Probabilistic logic,

– Possibilistic logic,

– Arithmetic logic,

– Complex and Quaternion logic,

– other continuous logics

• Find now applications in softwaresoftware and in hardware• Are studied now outside the area of MV logic, but

historically belong to it.

Example:Arithmetic Logic

AB = A+B - A*B

Logic sum Arithmetic sum

We express logic operators by arithmetic operators

A=0.5 B=0.5 then result = 0.5+0.5-0.5*0.5=1-0.25=0.75

1-(1-A)(1-B)=1-(1-A-B+AB)=A+B-AB

This corresponds to probabilistic reasoning

Example:Arithmetic Logic

A B = A+B - 2*A*B

Logic exor Arithmetic sum

We express logic operators by arithmetic operators

A=0.5 B=0.5 then result = 0.5+0.5-2*0.5*0.5=1-0.5=0.5

A B = A’B + AB’=(1-A)B+A(1-B)-(1-A)B(1-B)A=B-AB+A-AB-AB(1-A)(1-B)=A+B-2AB-AB(1-A-B+AB)

In this definition, the same results for natural numbers 0 and 1, but slightly different for A=B=0.5

Various operators can be defined to model certain reasonings and because their hardware realization is simple

Check it, define Check it, define other operators of other operators of similar properties.similar properties.

Functional Representations Functional Representations in Logic Synthesisin Logic Synthesis

• New representations aim at more compact compact representationrepresentation of discrete data that allows:– less memory space,– smaller processing time.

• Data can be functions, relations, sets of functions and sets of relations.

• Result of logic synthesis is a computer program for a robot

• Logic Synthesis = Automatic Program Synthesis• Good synthesis = better program (smaller, faster,

more reliable - noise, generalization)

• Examples of representations :

1. Cube RepresentationCube Representation and the corresponding Cube operations (Cube Calculus).

2. Decision DiagramDecision Diagram (DD) Representation and the corresponding DD operations.

3. Labeled Rough PartitionsLabeled Rough Partitions encoded with BDDs.

• Cube Representations : 1-a. Graphical Cube Representations of Multi-Valued Input Binary Output.

a bc d

000102101112202122

00 01 02 10 11 12 20 21 22

1 1 0 1 1 0 0 0 00 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 01 1 0 1 1 0 0 0 00 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0

Cube

• 1-b. Expression (Flattened Form)

Representation of Cubes of Multi-

Valued Input Binary Output .

For the previous example :-

F = 1.a0b0c0d0 + 1.a0b0c0d1 + 1.a0b0c1d0 +

1.a0b0c1d1 + 1.a1b0c0d0 + 1.a1b0c0d1 +

1.a1b0c1d0 + 1.a1b0c1d1

= 1 . a 0,1 b0c 0,1 d 0,1

Tabular RepresentationTabular Representation

Cube# a b f g

0 0,2 1 _ 2 1 0,1 0 0,2 0

2 2 0 1,2 0 3 1 1 1,2 2

Functions and Relations are just mappingsmappings

• To recognize faces we obtain the following tabular representation :-

N H M SPerson

John 1 1 1 1,2

Peter 2 0 1 0,1

Philip 0 1 0 1,2

Ken 2 0 2 2

Cubes

Input Features Output isa relationdue to the imprecise

measurements of S

f

a01

2

b\c 0 1 2

0 0,1 1 1,2

1 1 0,1 2

2 1 0,1 2

b\c 0 1 2

0 0 - -

1 0 2 0

2 1,2 1,2 0,2

b\c 0 1 2

0 - - 0

1 2 2 2

2 0 2 0

Multi-valued Logic

Expand the function with respect to variable ‘a’ first.

Step 1: Expand the function with respect to variable “a”,”b” and “c”.

To get it’s Decision Diagrams, we follow these steps.

00 0,1 1 1,2

01 1 0,1 2

02 1 0,1 2

10 0 - - 11 0 2 0

12 1,2 1,2 0,2

20 - - 0

21 2 2 2 22 0 2 0

a b c 0 1 2

b\c 0 1 2

0 0,1 1 1,2

1 1 0,1 2

2 1 0,1 2

C 0 1 20,1 1 1,2

C 0 1 21 0,1 2

C 0 1 21 0,1 2

When a=0, expand the function with respect to ‘b’ and ‘c’.

b= 0 1 2

Multi-valued Logic

1

f equals ‘1’ here no matter if c is 0, 1 or 2, so it terminals at 1.

Because this group canbe 1, the 0

can be ignored

0 1 2

1 20,1

0 1 2

1 20,1

C 0 1 20 - -

C 0 1 20 2 0

C 0 1 21,2 1,2 0,2

a=1

b= 0 1 2

Multi-valued Logic

b\c 0 1 2

0 0 - -

1 0 2 0

2 1,2 1,2 0,2

0 20 2

0 02

1

C 0 1 2- - 0

C 0 1 22 2 2

C 0 1 20 2 0

a=2

b= 0 1 2

Multi-valued Logic

b\c 0 1 2

0 - - 0

1 2 2 2

2 0 2 0

0 20 2

0 2

1

0

Multi-valued Logic

a

f

b bb

c c

01

2

0 1 2

1

0 2

1 21

1 0 2

1 21

1

c

0 1 2

0 2

0 2

0 02

1

c

0 1 2

0 2

Step 2: Draw the Decision Tree

0 2

0 02

1

Choice done for simplification

Multi-valued Logic

a

f

b bb

c

01

2

01,2

1

2

0,1

c

0 12

0,21

0 12

Step 3: Combine the same terminals to get Decision Diagram

20 1

FUTURE FUTURE RESEARCH RESEARCH AREAS AND AREAS AND ANALOGIESANALOGIES

First Extension from First Extension from BinaryBinaryBinary Logic ------------ MV Logic

And Gate ----------------------- MIN gate

Or Gate -------------------------- MAX gate

Inverter -------------------------- LiteralPost, generalized Post or Universal

This is standard, many published results, both two-level and multi-level, completecomplete system

Second Extension from Second Extension from BinaryBinaryBinary Logic ------------ MV Logic

And Gate <--------------------- Galois Multiplication gate

EXOR Gate <-------------------- Galois Addition gate

Inverter <------------------------ Power of variable

This system was introduced by Pradhan and Hurst, few papers have been published, no software, most is two-level logic

Another Another very recent very recent extensionextension

Binary Logic ------------ MV LogicAnd Gate ------------------- MIN gate

Exor Gate ----------------------- MODSUM gate

Inverter ----------------------- Literals

This system was introduced by Muzio and Dueck and independently by Elena Dubrova in her Ph.D. Two papers have been published. Recent interest.

Perhaps universal literals will increase the power, not investigated yet

Problems Problems to think aboutto think about

1. What is multivalued logic.2. Can multi-valued logic be used to synthesize binary

circuits?3. Ternary logic, prime implicants and covering.4. Continuous and Arithmetic logic5. Multi-valued decision trees and diagrams.6. Types of MV literals.7. Types of MV logic.8. PLA with decoders and how it relates to MV logic.