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CDP1802 Microprocessor KitUser's Manual
Rev 1.0, October, 2018
CDP1802 MICROPROCESSOR KIT
CONTENTS
OVERVIEW...........................................................................................4
FUNCTIONAL BLOCK DIAGRAM........................................................4
HARDWARE LAYOUT...........................................................................5
KEYBOARD LAYOUT............................................................................7
HARDWARE FEATURES......................................................................9
MONITOR PROGRAM FEATURES.......................................................9
MEMORY AND I/O MAPS......................................................................10
PLD DECODER……...............................................................................11
GETTING STARTED..............................................................................12
HOW TO ENTER PROGRAM USING HEX CODE................................14
AUTO LOAD Subroutine DELAY.........................................................16
GPIO1 LED............................................................................................17
RS232C PORT......................................................................................18
DATA FRAME for UART COMMUNICATION......................................18
CONNECTING KIT TO TERMINAL.......................................................19
EXPANSION BUS HEADER.................................................................22
10ms TICK GENERATOR....................................................................23
CONNECTING LCD MODULE.............................................................24
LOGIC PROBE POWER SUPPLY........................................................25
HARDWARE SCHEMATIC, BOM
MONITOR PROGRAM LISTINGS
OVERVIEW
The CDP1802 Microprocessor Kit is a new design single board educational computer. The kit is based on CDP1802 8-bit CMOS microprocessor. System memory are 28kB monitor ROM, 32kB user RAM and 4kB memory mapped I/O. The kit provides HEX keypad and 6-digit seven segment display. Students can enter CDP1802 instructions using HEX code to the memory and run it directly. The kit also provides 10ms tick generator, 9600 UART and expansion header.
FUNCTIONAL BLOCK DIAGRAM
Notes
1. CDP1802 is CMOS microprocessor.2. The kit has 8-bit LCD module interfacing bus.3. 100Hz Tick generator is for interrupt experiment.4. Ports for display and keypad interfacing were built with discrete logic IC chips.5. Memory and Port decoders are made with Programmable Logic Device, PLD.6. Hardware UART is INS8250, 9600 bit/s.
4
HARDWARE LAYOUT
5
Selector for 10ms tick or INTR key
DC jack, +9VDC
RS232C connector, DB9 male
Safety Information
1. Plugging or removing the LCD module must be done when the kit is powered off!
2. AC adapter should provide approx. +9VDC, higher voltage will cause the voltage regulator chip becomes hot.
3. The kit has diode protection for wrong polarity of adapter jack. If the center pin is not the positive (+), the diode will be reverse bias, preventing wrong polarity feeding to voltage regulator.
6
KEYBOARD LAYOUT
HEX keys Hexadecimal number 0 to F with associated user registers, D, R3-R15 (use with key REG). CPU control keys
RESET Reset the CPU, the CDP1802 will JUMP to location 0000.
INT Make INTRPT pin to logic low, for experimenting with interrupt process
EF1 Make EF1 pin to logic low, for testing EF1 conditional branch
EF2 Make EF2 pin to logic low, for testing EF2 conditional branch
EF3 and EF4 are available on expansion header.
Monitor function keys
PC Return current address to location 8000.
DATA Set entry mode of hex keys to Data field
ADDR Set entry mode of hex keys to Address field
GO Jump from monitor program to user code, R0 will be user program counter
- Decrement current display address by one
+ Increment current display address by one
Q LED Test Q output bit, blinking yellow LED 7
INS Insert byte, after current byte +512 locations will be shifted down
DEL Delete current byte, 512 locations will be shifted up USER User key for monitor program customization
TEST Test 10ms tick, SW1 when set to 10ms tick, the gpio1 LED will be counting at10Hz rate
COPY Copy block of memory, use with key + and GO, sequence will be START, END, DESTINATION, then GO
DUMP Dump memory contents to 9600 terminal, will need RS232 cross cable and PCrunning terminal emulator
LOAD Load Intel HEX file, 1ms character and line delay will be needed.
8
HARDWARE FEATURES Hardware features:
CPU: Intersil CDP1802 CMOS Microprocessor @3.6864MHz clock Memory: 32kB SRAM, 28kB EPROM, 4kB memory mapped I/O Memory and I/O Decoder chip: Programmable Logic Device GAL22V10D Display: high brightness 6-digit 7-segment LED Keyboard: 36 keys RS232 port: INS8250 UART, 9600 bit/s 8n1 Debugging LED: 8-bit GPIO1 LED at location $7000 Q LED: high brightness yellow color dot LED for Q output bit Tick: 10ms tick produced by 89C2051 for time trigger experiment Text LCD interface: direct CPU bus interface text LCD Brownout reset: KIA7042 reset chip for power brownout reset Expansion header: 40-pin header
MONITOR PROGRAM FEATURES MONITOR program features:
Simple hex code entering Insert and Delete byte User registers: D, R3-R15, used for saving CPU registers after BREAK Copy block of memory Intel HEX file downloading Memory dump Beep ON/OFF TEST 10ms tick
9
MEMORY AND I/O MAPS The kit provides two spaces of memory, i.e. 1) 32kB RAM, 2) 28 monitor ROM.
I/O space uses 4kB Memory mapped. These I/O locations can be accessed using memory READ/WRITE instructions directly.
Monitor ROM is placed from location 0000H to 6FFFH. RAM starts at 8000H to FFFFH
I/O ports are located from 7000H to 7FFFH.
GPIO1 LED is located at 7000H. User can use instruction that writes 8-bit data with 16-bit address easily, e.g.
8000 F8 70 B4 F8 LOAD R4, GPIO1 ; LOAD R4 WITH GPIO1 LED LOCATION 8004 00 A4 8006 F8 01 LDI 1 ; LOAD D WITH 1 8008 54 STR R4 ; WRITE D TO GPIO1 8009 00 IDL ; BREAK
Note: For LCD and UART internal registers, check at the schematic and monitor source code.
10
FFFFH
7000H
LCD base address
7100H7101H
UART base address
7200H
7300H
GPIO1 LED
PORT1
PORT2
PORT0
64kB Memory I/O ports Memory Mapped
8000H
7102H
32kB User RAM
28kB MonitorROM
0000H
6FFFH
4kB I/O7000H
7FFFH
PLD DECODER The programmable logic device, GAL22V10D is memory and I/O decoder. The chip accepts addresses and control signals from CDP1802, I1 to I12 and provides output enable signals at O1 to O9.
The decoder logic was implemented with PLD equations.
!ROM_CE = !MRD & ADDRESS:[0000..6FFF];
!RAM_CE = ADDRESS:[8000..FFFF];
!RAM_WR = !MWR & ADDRESS:[8000..FFFF];
!GPIO1 = A15 # !A14 # !A13 # !A12 # A10 # A9 # A8 # A1 # A0 # MWR; /* 7000H */
PORT0 = A15 # !A14 # !A13 # !A12 # A10 # A9 # !A8 # A1 # A0 # MRD; /* 7100H */
!PORT1 = A15 # !A14 # !A13 # !A12 # A10 # A9 # !A8 # A1 # !A0 # MWR; /* 7101H */
!PORT2 = A15 # !A14 # !A13 # !A12 # A10 # A9 # !A8 # !A1 # A0 # MWR; /* 7102H */
!LCD_E = A15 # !A14 # !A13 # !A12 # A10 # !A9 # A8 # (MWR & MRD); /* 7200H */
UART = A15 # !A14 # !A13 # !A12 # A10 # !A9 # !A8; /* 7300H */
PLD equation was assembled and translated into JEDEC file using WinCupL. The JEDEC file will be used to program to the PLD chip.
11
GETTING STARTED
The kit accepts DC power supply with minimum voltage of +7.5V. It draws DC current approx. 180mA. However we can use +9VDC from any AC adapter. The example of AC adapter is shown below.
The center pin is positive. The outer is GND.
12
If your adapter is adjustable output voltage, try with approx. +9V. Higher voltage will make higher power loss at the voltage regulator, 7805. Dropping voltage across 7805 is approx. +2V. To get +5VDC for the kit, we thus need DC input >+7.5V.
When power up, we will see the cold boot message 1802.
1802Press PC, the display will show HOME location at 8000. The data field will show its content.
8000 30. 13
HOW TO ENTER PROGRAM USING HEX CODE Let us try enter HEX CODE of the example program to the memory and test it. We write theprogram with CDP1802 instructions.
Address Hex code Label Instruction comment
8000 F8 70 B4F8 00 A4
MAIN LOAD R4, 7000 Load R4 with 7000
8006 F8 01 LDI 1 Load D with 1
8008 54 STR R4 Write to 7000
8009 00 IDL Wait for DMA or interrupt
Our test program has only four instructions.
The first instruction is
LOAD R4,GPIO1
Load R4 register with the 7000
This instruction has six bytes hex code i.e., F8, 70, B4, F8, 00, A4.
[ To load 16-bit value to R4, CDP1802 will need:
LDI 70PHI R4LDI 00PLO R4]
The 2nd instruction is
LDI 1 load immediate value 1, to D register. The instruction's machine code is F8. The immediate 8-bit is 01.
The 3rd instruction is STR R4, write register D to memory location pointed to by R4.
The last instruction is IDL, with hex code 00. It makes CPU to wait for DMA or interrupt process. We can use it to break here.
This test code has only 10 bytes, F8, 70, B4, F8, 00, A4, F8, 01, 54, 00. The first byte will be entered to location 8000. And the following bytes will be entered at 8001, 8002, 8003, 8004, to the last byte at 8009.
14
Let us see how to enter these codes into memory.
Step 1 Press RESET, PC, the display will show current memory address and its contents.
8000 00. The location 8000 has data 00. There are small dots at the data field indicating the active field, ready for modifying the hex contents.
Step 2 Press key F and key 8. The new hex code F8 will be entered to the location 8000.
8000 F8. Step 3 Press key + to increment the location from 8000 to 8001. Then enter hex key 7, 0.
8001 70.
Repeat Step 3 until completed for the last location. We can verify the hex code with key + or key -.
To change the display location, press key ADDR. The dots will move to Address field. Any hex key pressed will change the display address.
To RUN the program, press PC then GO.
See what is happening at gpio1 LED?
Can you change the load value? How?
15
AUTO LOAD Subroutine DELAY The kit provides automatically loaded DELAY subroutine on RESET. Every RESET will load the DELAY subroutine to the last page of user RAM.
F000 D0 RET_DELAY: SEP R0 F001 F8 64 DELAY: LDI 100 F003 A6 PLO R6 F004 F8 00 DELAY1: LDI 0 F006 A7 PLO R7 F007 27 DELAY2: DEC R7 F008 87 GLO R7 F009 3A 07 BNZ DELAY2 F00B 26 DEC R6 F00C 86 GLO R6 F00D 3A 04 BNZ DELAY1 F00F 30 00 BR RET_DELAY
The subroutine provides delay for testing USER code.
Let us see another example:
8000 F8 F0 B3 F8 LOAD R3, F001 ; delay 8004 01 A3 8006 7B LOOP: SEQ ; set q bit 8007 D3 SEP R3 ; delay 8008 7A REQ ; reset q bit 8009 D3 SEP R3 ; delay 800A 30 06 BR LOOP ; repeat
The kit has Q LED that shows Q logic. Simple program, Q LED blinking will need R3 loaded with F001.
Let us try with hex key code entering. Press PC, then GO.
What is happening at Q LED?
We can change blinking rate easily at location F002. Try change it to 20. And press PC, GO.
16
GPIO1 LED The kit provides a useful 8-bit binary display. It can be used to debug the program or code running demonstration. The I/O address is 7000. The output port is 8-bit data flip-flop. Logic 1 at the output will make LED lit.
Try below code for testing how to use gpio1 LED.
8000 F8 F0 B3 F8 LOAD R3, DELAY ; F001 8004 01 A3 8006 F8 70 B4 F8 LOAD R4, GPIO1 ; 7000 800A 00 A4 800C 15 LOOP: INC R5 ; INCREMENT R5 800D 85 GLO R5 ; GET LOW BYTE R5 800E 54 STR R4 ; WRITE D TO GPIO1 800F D3 SEP R3 ; CALL DELAY 8010 30 0C BR LOOP ; JUMP TO LOOP
Enter the hex code and run it.
Can you change counting rate faster? How?
17
RS232C PORT
The RS232C port is for serial communication. We can use the RS232 cross cable or null MODEM cable to connect between the kit and terminal. The connector for both sides are DB9 female. We may build it or buying from computer stores.
For new PC or laptop computer without theRS232 port. It has only USB port, we mayhave the RS232C port by using the USB toRS232 converter.
DATA FRAME for UART COMMUNICATION
Serial data that communicated between kit and terminal is asynchronous format. The CDP1802 kit has UART chip. The kit functions key has commands for HEX file downloading and memory dumping. Bit stream includes START bit, 8-data bit and one STOP bit. Bit period is 1/9600.
18
CONNECTING KIT TO TERMINAL We can connect the CDP1802 kit to a terminal by RS232C cross cable. You may download free terminal program, teraterm from this URL, http://ttssh2.sourceforge.jp/index.html.en
The example shows connecting laptop with COM1 port to the RS232C port of the CDP1802kit. New laptop that has no COM port, we may use the USB-RS232 adapter for converting the USB port to RS232 port.
To download Intel hex file that generated from the assembler or c compiler, set serial port speed to 9600 bit/s, 8-data bit, no parity, no flow control, one stop bit.
One ms delay for character and line.
Step 1 Run teraterm, then click at Serial connection.
19
VT100 Terminal CDP1802 Kit
RS232C cross cable
Step 2 Click setup>Serial port.
Step 3 Set serial port speed to 9600 and format as shown below.
20
Step 4 Press DUMP, the kit will print memory contents.
Key LOAD will wait for Intel hex file.
Click File>Send File..> then select the HEX file to be sent, click OPEN.
The gpio1 LED will show byte being received. When completed, the kit display will be turned on.
21
EXPANSION BUS HEADER JP1, 40-pin header provides CPU bus signals for expansion or I/O interfacing. Students maylearn how to make the simple I/O port, interfacing to Analog-to-Digital Converter, interfacing to stepper motor or AC power circuits. CDP1802 provides N0,N1 and N2 for I/Ointerface.
22
10ms TICK GENERATOR SW1 is a selector for interrupt source between key INTR or 10ms tick produced by 89C2051 microcontroller. Tick generator is software controlled using timer0 interrupt in the89C2051 chip. The active low tick signal is sent to P3.7. For tick running indicator, P1.7 drives D2 LED.
Tick is a 10ms periodic signal for triggering the CDP1802 INTRPT pin. When select SW1 to Tick, the 8080 CPU can be triggered by the external interrupt. The 100Hz tick or 10ms tick can be used to produce tasks that executed with multiple of tick.
NOTE: Key TEST, will use 10ms tick for making binary counting at 10Hz rate.
23
10ms 10ms 10ms 10ms
10ms tick
CONNECTING LCD MODULE
JR1 is 16-pin header for connecting the LCD module. Any text LCD with HD44780 compatible controller can be used. R12 is a current limit resistor for back-light. R13 is trimmer POT for contrast adjustment. The LCD module is interfaced to the CDP1802 bus directly. The command and data registers are located in memory space having address from 7200H to 7203H.
Be advised that plugging or removing the LCD module must be done when the kit is powered off.
Text LCD module accepts ASCII codes for displaying the message on screen.Without settings the LCD by software, no characters will be displayed. The first line will be black line by adjusting the R10 for contrast adjustment.
If the LCD module is connected, the system monitor will write CDP1802 to LCD.
Any text LCD with HD44780 compatible controller can be used.
24
LOGIC PROBE POWER SUPPLY
The kit provides test points TP4(+5V) and TP5(GND) for using the logic probe. Students may learn digital logic signals with logic probe easily. Tick signal is indicated by D1 LED blinking. Red clip is for +5V and Black clip for GND.
25
+ 5V at TP4
GND at TP5
HARDWARE SCHEMATIC, PARTS LIST
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
10ms Tick
Designed by Wichit Sirichote, [email protected], (C) 2018
VOLTAGE DIP RESET
0x8000-0xFFFF 32kBSRAM
PLD decoder logic
Programmable system tick
INTRPT TEST KEY
0x0000-0x6FFF MonitorProgram CPU expansion connector
<Doc> 1
CDP1802 MICROPROCESSOR KIT 2018
B
1 3Monday, September 17, 2018
Title
Size Document Number Rev
Date: Sheet of
A4
EF1
A11
DMAOUT
D5
A8
N1
A14
A1
D2
A[8..14]
D6
A2
A14
A[0..7]
D0
D4
A15
MRD
D3
DMAIN
N0
A7
TICK
CLK
EF2
D5
D4
D2
A12
MWR
D3
A8
D5
D1
INT
D7
A13 A13
INT
D4
EF4
A6
RESET1
TICK
D0
D3
DMAIN
D6
A10
A0
TPB
A7
A3
D0
A9
A2
PCLKD6
D6
MWR
D1
A12
A5
MRD
A5
EF2
A13
D4
D7A9
A12
D6
A10
D5
RAM_WR
A14
ROM_CE
D3
D7
D2
A6
A1
D3
EF3
RAM_CE
TICK/2
MRD
D0
RESET2
D1
RESET1
D0
D5D4A4
WAIT
EF1
EF4
EF2
D1A0
PCLK
D7
A11
D7
EF3
A3D2
D1
N2
D2
RESET2
A0A1A2A3
A7
TPA
A8A9A10A11A12A13A14A15
CLK
CLEAR
INTWAITDMAOUT
EF1EF2EF3EF4
EF1
N0N1N2
MWR
TPB
A10
ROM_CERAM_CERAM_WR
Q
SC0SC1
D0D1D2D3D4D5D6D7
RESET2
RESET1
PCLK
A9
VSS
Q
VDD
A5A4
A6
A8A1A0
CLEAR
PORT2
D1LCD_E
D6
D2PORT0
A[0..7]
PORT1
GPIO1
VCC
D7
D3
D5
D[0..7]
D0
D4
PCLK
PRESET
UART
MWRMRD
RESET_LOW
A0A1
A2
VCC
+5V
+5V
+5V
+5V
+5V
VCC
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
SW3
RESET
C80.1uF
C110.1uF
SW2
INTRPT
JP1
HEADER 20X2
1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 40
TP3
TEST POINT
1
+C7
1000uF25V
+ C410uF
TP5
GND 1
TP4
+5V1
U3
AT89C2051
1
1213141516171819
20
236789
11
54
RST/VPP
P1.0/AIN0P1.1/AIN1
P1.2P1.3P1.4P1.5P1.6P1.7
VCC
P3.0/RXDP3.1/TXDP3.2/INTOP3.3/INT1P3.4/T0P3.5/T1
P3.7
XTAL1XTAL2
R510k
TP2TEST POINT
1
U1
27C256
109876543
252421232
2627
20221
1112131516171819
A0A1A2A3A4A5A6A7A8A9A10A11A12A13A14
CEOEVPP
O0O1O2O3O4O5O6O7
U2
HM62256B
109876543
252421232
261
202227
1112131516171819
A0A1A2A3A4A5A6A7A8A9A10A11A12A13A14
CEOEWE
D0D1D2D3D4D5D6D7
U7
74HC573
111
20
1918171615141312
23456789
OELE
VCC
1Q2Q3Q4Q5Q6Q7Q8Q
1D2D3D4D5D6D7D8D
C120.1uF
U5
CDP1802A
89101112131415
16
20
36
37
38
40
1
2
3
39
65
3433
4
357
24232221
2526272829303132
191817
BUS7BUS6BUS5BUS4BUS3BUS2BUS1BUS0
VCC
VSS
INTRPT
DMAOUT
DMAIN
VDD
CLK
WAIT
CLEAR
XTAL
SC0SC1
TPATPB
Q
MWRMRD
EF1EF2EF3EF4
MA0MA1MA2MA3MA4MA5MA6MA7
N0N1N2
Q1
KIA7045
1
2
3
J1
DC Input
12
+ C510uF
Y1
3.6864MHz
+
C1
10uF
R7
1k
SW5
EF2
+C6
10uF 16V
C
R3
RESISTOR SIP 9
1 23456789
C
R2
RESISTOR SIP 9
1 23456789
U6D
74HC14A
98
C90.1uF
U87805
1
2
3 VIN
GN
D
VOUT
U6B
74HC14A
3 4
U6A
74HC14A
1 2
C130.1uF
D2 1N4733A
C322pF
D3
Q LED
U4
22V10
123456789
101113
23222120191817161514
24
I1/CLKI2I3I4I5I6I7I8I9I10I11I12
O1O2O3O4O5O6O7O8O9
O10
VC
C
R4680
SW4
EF1
TP1
TEST POINT
1
D5
1N4007
12
C2
22pF
C140.1uF
D1
LED
D4
POWER
U6C
74HC14A
56
R1680
SW1
ESP switch
21
3
C100.1uF
R610M
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
7-segment test
0x01
<Doc> 1
CDP1802 MICROPROCESSOR KIT
B
2 3Monday, September 17, 2018
Title
Size Document Number Rev
Date: Sheet of
D1
D3
C
PC1
D5
PC4
D3
D0
D0
B
PA4
PA7
A
D6
PA6
PA4
A
PA7
D7
D
G
PC6
D1
PA0
D4
B
PC0
D7 DP
ED0
PC6
D5
PC3
A
D0
PA6
D2
PC1
DP
D7
C
F
D7
PA3
PC2
D
PA2
G
PC5
D1
SPEAKER
E
G
D2
D4
PC3
PC5
C
D
PC0
PA2
D6
FD6
PA3
PC2
PC4
SPEAKERPC7
D4
D5
PC4
D2
E
D3
PA1
PC2
D4
D2
PC0
D5
D1
PA5
F
DP
B
D3
PC3
PA1PA0
PA5
D6
PC5
PC1
D3D2
PORT0
PORT1
D6D5
VCC
PORT2
D0
D7
D1
D4
PRESET
VCC
VCC
VCC
+5V
VCC
VCC
+5V VCC
S23
C16100nF
S30
U10
LTC-4727JR
14161335
11157
1 2 6 8
4
ABCDEFGDP
DIG
IT1
DIG
IT2
DIG
IT3
DIG
IT4
L1L2L3
S24 S25
S27S26 S28
S19R10
10
LS1
SPEAKER
U11
74HC573
111
20
1918171615141312
23456789
OELE
VCC
1Q2Q3Q4Q5Q6Q7Q8Q
1D2D3D4D5D6D7D8D
S32
+ C1510uF
S1 S2 S3 S4
C
R1110k RESISTOR SIP 912
3456789
S5 S6
R9
4.7k
C
R810k RESISTOR SIP 912
3456789
S7 S8
S31
S9 S10 S11
U12
74HC573
111
20
1918171615141312
23456789
OELE
VCC
1Q2Q3Q4Q5Q6Q7Q8Q
1D2D3D4D5D6D7D8D
S12
U13
74HC541
23456789
119
1817161514131211
20
A1A2A3A4A5A6A7A8
G1G2
Y1Y2Y3Y4Y5Y6Y7Y8
VCC
S13 S14 S15 S16 S17
S29
S18
S20
J2
CON3
123
Q2BC327
1
2
3
S21
U9
LTC-4727JR
14161335
11157
1 2 6 8
4
ABCDEFGDP
DIG
IT1
DIG
IT2
DIG
IT3
DIG
IT4
L1L2L3
S22
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
8-bit Binary display LED x8
RS
9600 bit/s
R/W
HD44780 compatible TextLCD interface
<Doc> 1
CDP1802 MICROPROCESSOR KIT
B
3 3Monday, September 17, 2018
Title
Size Document Number Rev
Date: Sheet of
D5
D1
D6
D0
D1
D5
D7
D6
D3
D7
D2
D0
D5
D4
D4
D2
D0
D3
D6D7
D1
D2D3
D4
D4
RTS
D6
RXD
D0D1
TXD
D3
DCD
D7
D2
D5
GPIO1
D0
RXD
D1
D3
D7
LCD_E
CTSVCC
D5D6
RTS
D4
D2
TXD
UART
PCLK
PRESET
MRDMWR
PRESET A0A1A2
A0A1
+5V
VCC
+5V
+5V
+5V+5V
+5V
VCCVCC
+5V
D10D9D8
LED
D7
D14
1N5227A
D6
VB1
SUB-D 9, Male (cross cable)
594837261
+
C1810uF+
C1710uF 10V
U15
8250
121314
21182219
282726
12345678
2535
1617
9
343130
113233
1038373639
242329
15
CS0CS1CS2
RDWRRDWR
A0A1A2
D0D1D2D3D4D5D6D7
ADSRESET
XTAL1/CLKXTAL2
RCLK
OUT1OUT2
INT
TXDRTSDTR
RXDDCDDSRCTS
RI
CSOUTDDIS
NC
BAUDOUT
+ C19
10uF
JR1
CONN RECT 16
12345678910111213141516
123456789
10111213141516
R12 5
C21100nF
+C20
10uF
R1310K
1 3
2
U16
HIN232
138
1110
1345
2
6
129
147
R1INR2IN
T1INT2IN
C+C1-C2+C2-
V+
V-
R1OUTR2OUT
T1OUTT2OUT
D13D12
U14
74HC573
111
20
1918171615141312
23456789
OELE
VCC
1Q2Q3Q4Q5Q6Q7Q8Q
1D2D3D4D5D6D7D8D
D11
LED
PARTS LIST
Semiconductors
U1 27C256, 32kB EPROMU2 HM62256B, 32kB SRAMU3 AT89C2051, preprogrammed 10ms tick generatorU4 22V10, preprogrammed PLDU5 CDP1802A, Intersil CMOS microprocessorU6 74HC14AU7,U11,U12,U14 74HC573U8 7805, +5V voltage regulatorU10,U9 LTC-4727JR, high brightness 7 segment displayU13 74HC541U15 INS8250, UARTU16 HIN232, RS232 converterQ1 KIA7042, voltage detectorQ2 BC557, PNP transistor
D1,D6,D7,D8,D9,D10,D11, 3mm LED (red)D12,D13D2 1N4733AD3 Q LED ( yellow)D4 POWER LEDD5 1N4001D14 1N5227A
Resistors (all resistors are 1/8W +/-5%)
R4,R1 680R3,R2 RESISTOR SIP 9R13,R5 10kR6 10MR7 1kR11,R8 10k RESISTOR SIP 9R9 4.7kR10 20R12 5
Capacitors
C1,C4,C5,C15,C18,C19,C20 10uFC3,C2 22pFC6 10uF 16VC7 1000uF25VC8,C9,C10,C11,C12 0.1uFC13,C14 0.1uFC21,C16 100nFC17 10uF 10V
Additional parts
JP1 HEADER 20X2JR1 CONN RECT 16J1 DC InputJ2 CON3LS1 SPEAKERSW2 INTRPTSW3 RESETSW4 EF1SW5 EF2S1,S2,S3,S4,S5,S6,S7,S8, 12mm tact switchS9,S10,S11,S12,S13,S14,S15,S16,S17,S18,S19,S20,S21,S22,S23,S24,S25,S26,S27,S28,S29,S30,S31,S32SW1 ESP switch, 10ms selector switchVB1 SUB-D 9, Male (cross cable)Y1 3.6864MHz XtalPCB double side plate through holedisplay filter sheet,Keyboard sticker printable SVG file
MONITOR PROGRAM LISTINGS
1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071
/*Monitor source code for CDP1802 Microprocessor Kit 2018(C) 2018 by Wichit Sirichote
Xtal frequency 3.6864MHz, 32kB RAM, 28kB ROM, 4 kB memory mapped I/OROM 0-6FFF,I/O 7000-7FFFRAM 8000
*/
// prototype declaration
void key_dump();void pstr(char *s);void read_record1();
volatile unsigned char *gpio1 = (unsigned char*) 0x7000;volatile unsigned char *segment = (unsigned char*) 0x7102;volatile unsigned char *digit = (unsigned char*) 0x7101;volatile unsigned char *port0 = (unsigned char*) 0x7100;volatile unsigned char *port1 = (unsigned char*) 0x7101;volatile unsigned char *port2 = (unsigned char*) 0x7102;
volatile unsigned char *uart_buffer = (unsigned char*) 0x7300;volatile unsigned char *uart_line_status = (unsigned char*) 0x7305;volatile unsigned char *uart_fifo = (unsigned char*) 0x7302;volatile unsigned char *uart_lcr = (unsigned char*) 0x7303;volatile unsigned char *uart_divisor_lsb = (unsigned char*) 0x7300;volatile unsigned char *uart_divisor_msb = (unsigned char*) 0x7301;volatile unsigned char *uart_scr = (unsigned char*) 0x7307;
volatile unsigned char *LCD_cwr = (unsigned char*) 0x7200;volatile unsigned char *LCD_dwr = (unsigned char*) 0x7201;volatile unsigned char *LCD_crd = (unsigned char*) 0x7202;volatile unsigned char *LCD_drd = (unsigned char*) 0x7203;
volatile unsigned char *tick = (unsigned char*) 0xffff;
#define BUSY 0x80
char convert[16]= {0xBD,0x30,0x9B,0xBA,0x36,0xAE,0xAF,0x38,0xBF,0xBE,0x3F,0xA7,0x8D,0xB3,0x8F
char text1[]={"\r\n\n\n\nCDP1802 MICROPROCESSOR KIT 2018"};char text2[]={"CDP1802 KIT-----"};char text3[]={"32k RAM 9600UART"};char text4[]={"\r\nLoad Intel Hex file..waiting"};char text5[]={"\r\nBye check sum error!"};char text6[]={"\r\n0 error..."};
//---------------------------- utility subroutines ------------------------------------------// user delay subroutine will be loaded into RAM at location F000// to use it, load register with F001, the set it to be program counterchar user_delay[]={0xD0,0xF8,0x64,0xA6,0xF8,00,0xA7,0x27,0x87,0x3A,07,0x26,0x86,0x3A,04,0x30,
// interrupt service routine @ F020char interrupt_test[]={0xF8,0xF0,0xB1,0xF8,0x38,0xA1,0xF8,0x70,0xB4,0xF8,00,0xA4,0xF8,0xFF,0xB6,0xF8,0xFF,0xA6,0xE0,0x70,0x00,0x30,0x35,0x70,0x22,0x78,0x06,0xFC,01,0x56,0xFB,0x0A,0x3A,0x46,0x56,0x15,0x85,0x54,0xC4,0x30,0x37};
mon1802.c 29/10/2561 7:07
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72737475767778798081828384858687888990919293949596979899
100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142
char n,c,t,hit;
int i,j,k;int temp;unsigned int warm;
char flag;
char bcc, save_bcc, bcc_error, record_type;
char o,q,key;char key_pressed;char buffer[6];
int temp,temp16,timeout;int num, start, end, desti;
unsigned int PC, save_PC;
char state,x,hit;
char *dptr;char *dptr2;
char user_d, user_df, user_xp;int user_r3,user_r4,user_r5,user_r6,user_r7,user_r8,user_r9,user_r10;int user_r11,user_r12,user_r13,user_r14,user_r15;
void delay_num1(){
temp=0;temp=0;
}
void delay_ms(unsigned int w){unsigned int n;for( n = 0; n < w; n++);
}
void blink_q(){asm(" seq \n");delay_ms(100);asm(" req \n");delay_ms(2000);
asm(" seq \n");delay_ms(100);asm(" req \n");delay_ms(2000);
}
char scan(){
k = 1;
key = 0xff;
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143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213
q = 0;
for(i=0; i<6; i++){
*digit = ~k;
*segment = buffer[i];
if(buffer[i] != 0x30 && buffer[i] != 0x38 && buffer[i] != 0x70) delay_ms(3);else delay_num1();
*segment = 0;
// delay_ms(1);
o= *port0;
for(n=0; n<6; n++){
if((o&1)==0){key=q;
}
else q++;o = o >> 1;
}
k = k << 1;}
key_pressed=key;
// *gpio1=key;
return key_pressed;
}
void dot_address(){buffer[0]=buffer[0]&~0x40;buffer[1]=buffer[1]&~0x40;
buffer[2]=buffer[2]|0x40;buffer[3]=buffer[3]|0x40;buffer[4]=buffer[4]|0x40;buffer[5]=buffer[5]|0x40;
}
void dot_data(){
buffer[0]=buffer[0]|0x40;buffer[1]=buffer[1]|0x40;
buffer[2]=buffer[2]&~0x40;buffer[3]=buffer[3]&~0x40;buffer[4]=buffer[4]&~0x40;buffer[5]=buffer[5]&~0x40;
}
void hex4(int h){
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214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284
temp16 = h;buffer[2]= convert[temp16&0xf];temp16>>=4;buffer[3]= convert[temp16&0xf];temp16>>=4;buffer[4]=convert[temp16&0xf];temp16>>=4;buffer[5]=convert[temp16&0xf];}
void address_display(){
temp16 = PC;
hex4(temp16);
}
void data_display(){
dptr = (char *)PC;
n = *dptr;
buffer[0]= convert[n&0xf];n = n>>4;buffer[1]=convert[n&0xf];}
void read_memory(){
address_display();data_display();}
void key_address(){
state = 1;
read_memory();
dot_address();hit=0;
}
void key_data(){
read_memory();dot_data();hit=0;
state=2;
}
void key_plus(){
if(state==1 || state==2){
PC++;
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285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355
read_memory();key_data();
}
if(state==5){
state=6;start = num;hit=0;buffer[0]=0x8f; /* end cursor */return;
}
if(state==6){
state=7;end = num;hit=0;buffer[0]=0xb3; /* destination cursor */
// if(end <= start) print_error();
}
}
void key_minus(){
if(state==1 | state ==2){PC--;read_memory();
key_data();}
}
void data_hex(){
dptr = (char *)PC;x = *dptr;if(hit==0) x=0;{hit =1;x = x << 4;x = x|key;
*dptr = x;
read_memory();
dot_data();}}
void key_PC(){
PC=save_PC;key_data();
}
void hex_address(){
if(hit==0) PC=0;{
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356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426
hit=1;
PC<<=4;PC |= key;read_memory();dot_address();
}}
/* insert byte and shift 512 bytes down */
void insert(){dptr=(char *)PC;
for(j=512; j>0; j--){*(dptr+j)=*(dptr+j-1);
}*(dptr+1)=0; /* insert next byte */PC++;
read_memory();state=2;}
/* delete current byte and shift 512 bytes up */
void cut_byte(){
dptr=(char *)PC;for(j=0; j<512; j++)
{*(dptr+j)=*(dptr+j+1);
}read_memory();
state=2;}
void key_go(){
if(state==1 || state==2){
asm(" ldAD r5,_PC \n"" ldn r5 \n"
" phi r0 \n"" inc r5 \n"" ldn r5 \n"
" plo r0 \n"" sep r0\n"
);
}
if(state==7){
desti = num;temp = end-start;dptr = (char *)start;dptr2 = (char *) desti;
for(i=0; i<temp; i++){*(dptr2+i)=*(dptr+i);}PC = desti;
read_memory();dot_data();
state=2;
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427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497
}
}
void key_test(){
PC = 0xf020; // test 10ms timer SW1 selects 10ms
state = 1;
key_go();
}
void key_load(){
pstr(text4);read_record1();
if(bcc_error) pstr(text5);else pstr(text6);
PC = 0x8000;key_data();
}
void key_reg(){
buffer[5]= 0x03;buffer[4]= 0x8F;buffer[3]= 0xad;buffer[2]=0;buffer[1]=0;buffer[0]=0;
state = 3; /* register display state = 3 with hex key */
}
void reg_d(){
n = user_d;
buffer[2]= convert[n&0xf];n = n>>4;buffer[3]=convert[n&0xf];buffer[4]=0;buffer[5]=0;buffer[1]=0;buffer[0]=0xb3; // reg d}
void reg_df(){
n = user_df; // DF = 0 or 1
buffer[2]= 0;buffer[3]=convert[n&0xf];
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498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568
buffer[4]=0;buffer[5]=0;buffer[1]=0xb3; // flag DFbuffer[0]=0x0f; //}
void reg_xp(){
n = user_xp; // xp
buffer[2]= convert[n&0xf];n = n>>4;
buffer[3]=convert[n&0xf];buffer[4]=0;buffer[5]=0;buffer[1]=0x13; // XPbuffer[0]=0x1F; //}
void reg_r3(){
hex4(user_r3);
buffer[1]=0x03;buffer[0]=0xba;}
void reg_r4(){
hex4(user_r4); //
buffer[1]=0x03; //buffer[0]=0x36;}
void reg_r5(){
hex4(user_r5); //
buffer[1]=0x03; //buffer[0]=0xae;}
void reg_r6(){
hex4(user_r6); //
buffer[1]=0x03; //buffer[0]=0xaf;}
void reg_r7(){
hex4(user_r7); //
buffer[1]=0x03; //buffer[0]=0x38;}
void reg_r8(){
hex4(user_r8); //
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569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639
buffer[1]=0x03; //buffer[0]=0xbf;}void reg_r9(){
hex4(user_r9); //
buffer[1]=0x03; //buffer[0]=0xbe;}void reg_r10(){
hex4(user_r10); //
buffer[1]=0x03; //buffer[0]=0x3f;}void reg_r11(){
hex4(user_r11); //
buffer[1]=0x03; //buffer[0]=0xa7;}void reg_r12(){
hex4(user_r12); //
buffer[1]=0x03; //buffer[0]=0x8d;}void reg_r13(){
hex4(user_r13); //
buffer[1]=0x03; //buffer[0]=0xb3;}
void reg_r14(){
hex4(user_r14); //
buffer[1]=0x03; //buffer[0]=0x8f;}
void reg_r15(){
hex4(user_r15); //
buffer[1]=0x03; //buffer[0]=0x0f;}
void reg_display(){
switch(key){
case 0: reg_d(); break;
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640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710
//case 1: reg_df(); break; // future work//case 2: reg_xp(); break;case 3: reg_r3(); break;case 4: reg_r4(); break;case 5: reg_r5(); break;case 6: reg_r6(); break;case 7: reg_r7(); break;case 8: reg_r8(); break;case 9: reg_r9(); break;case 10: reg_r10(); break;case 11: reg_r11(); break;case 12: reg_r12(); break;case 13: reg_r13(); break;case 14: reg_r14(); break;case 15: reg_r15(); break;
}}
void enter_num(){
if(hit==0) num=0;{
hit=1;
num<<=4;num |= key;hex4(num);
}}
void clear_buffer(){for(i=0; i<6; i++)*(buffer+i)=0;
}
void key_copy(){
state=5;hit=0;clear_buffer();
buffer[2]= 0xbd;
buffer[0]=0xae;buffer[1]=0;
}
/* return internal code hex keys and function keys */
char key_code(char n){char d;if(n == 0x10) return 0;if(n == 0x21) return 1;if(n == 0x1b) return 2;if(n == 0x15) return 3;if(n == 0x16) return 4;if(n == 0x20) return 5;if(n == 0x1a) return 6;
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711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781
if(n == 0x14) return 7;if(n == 0x1c) return 8;if(n == 0x1f) return 9;if(n == 0x19) return 0xa;if(n == 0x13) return 0xb;if(n == 0x22) return 0xc;if(n == 0x1e) return 0xd;if(n == 0x18) return 0xe;if(n == 0x12) return 0xf;
if(n == 0xc) return 0x10; // pcif(n == 0xd) return 0x11; // regif(n == 0xe) return 0x12; // dataif(n == 0xf) return 0x13; // address
if(n == 6) return 0x14;if(n == 7) return 0x15; // MUTEif(n == 8) return 0x16; // -if(n == 9) return 0x17; // +
if(n == 0) return 0x18; // loadif(n == 1) return 0x19; // insertif(n == 2) return 0x1a; // deleteif(n == 3) return 0x1b; // go
if(n == 0x13) return 0x1c;if(n == 0x1d) return 0x1d; // testif(n == 0x17) return 0x1e; // dumpif(n == 0x00) return 0x1f;if(n == 0x23) return 0x20; // copy
return 0xff;
}
void delay_beep(){
for(j=0; j<2; j++)continue;
}
void beep(){
*port2=0;
for(x=0; x<60; x++){*port1 = (char) ~0x80;delay_beep();
*port1 = 0xff;delay_beep();
}
}
void key_mute(){
flag ^=1;}
void key_qled(){
while(1){asm(" seq \n");delay_ms(500);asm(" req \n");
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782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852
delay_ms(30000);}}
void key_exe(){
if(flag==0) beep();
if( key>15){if(key==0x13) key_address();if(key==0x12) key_data();if(key==0x17) key_plus();if (key==0x16) key_minus();if (key==0x10) key_PC();if (key==0x1b) key_go();if (key==0x11) key_reg();if (key==0x19) insert();if (key==0x1a) cut_byte();if (key==0x1e) key_dump();if (key==0x1d) key_test();if (key==0x18) key_load();if (key==0x20) key_copy();if (key==0x15) key_mute();if (key==0x14) key_qled();
}
else{switch(state){
case 1: hex_address(); break;case 2: data_hex(); break;case 3: reg_display(); break;case 5: enter_num(); break;case 6: enter_num(); break;case 7: enter_num(); break;
}
}
}
void scan1(){
while(scan() != 0xff);delay_ms(10);
while(scan() == 0xff);delay_ms(5);
key = scan();
key = key_code(key);
// *gpio1=key; // debug
if((key>=0) && (key <0x30)) key_exe();}
//------------------------------- UART --------------------------------
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853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923
void init_8250(){
*uart_lcr = 0x83;*uart_divisor_lsb = 24; // computed for 3.6864MHz*uart_divisor_msb = 0;*uart_fifo =7;
*uart_lcr = 3;}
void cout(char n){while((*uart_line_status & 0x20)==0);*uart_buffer=n;}
char cin(){while((*uart_line_status & 1)==0);c =*uart_buffer;
return c;}
void pstr(char *s){while( *s ){
cout(*s);s++;
}}
void test_uart(){
for(c=0x20; c<0x80; c++)cout(c);
}
void newline(){cout(0x0a);cout(0x0d);}
void send_hex(char n){
k = n>>4;k = k&0xf;
if (k>9) cout(k+0x37); else cout(k+0x30);k= n&0xf;if (k>9) cout(k+0x37); else cout(k+0x30);
}
void send_word_hex(int n){
temp16 = n>>8;k = temp16&0xff;send_hex(k);k = n&0xff;send_hex(k);
}
void key_dump(){
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Page 13 of 19
924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994
int j,p;
dptr = (char *)PC;
for(j=0; j<16; j++){
newline();send_word_hex(PC);cout(':');
for(p=0; p<16; p++){
send_hex(*(dptr+p));cout(0x20);}
cout(0x20);
for (p=0; p<16; p++){q=*(dptr+p);
if(q >= 0x20 && q < 0x80) cout(q);else cout('.');
}
dptr+=16;PC+=16;}newline();
// PC = dptr;key_address();
}
char nibble2hex(char c){char n;if(c<0x40) return (c-0x30);else return (c-0x37);
}
char gethex(){
char a,b;
a = cin();b = cin();
a = nibble2hex(a)<<4;b = nibble2hex(b);a = a|b;bcc = bcc+a; /* compute check sum */
return (a);}
int get16bitaddress(){
unsigned int load_address;
load_address =0;
load_address |= gethex();load_address <<=8;load_address |= gethex();
return load_address;}
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995996997998999
100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065
// read Intel hex record// :20 0000 00 71F8FFB2F8F0A2F800B3F814A37BD37AD3300DD0F864A6F800A727873A1A2686EB
void read_record1(){
char x;char byte_count;
int address16bit;
bcc_error=0;
do{
bcc =0;
while(cin()!= ':');
byte_count = gethex(); /* only data record */
dptr = (char *) get16bitaddress();
record_type= gethex();
// now read byte
for(x=0; x<byte_count; x++){*(dptr+x) = gethex();
}
// bcc = gethex();// bcc = ~bcc; /* one's complement */
// bcc+= bcc; // two's complement
*gpio1=bcc; /* loading indicator */
// save_bcc= bcc;
// if(save_bcc != gethex()) bcc_error=1;
}
while(record_type==0);
}
//---------------------------------------------------------------------
//---------------------------- LCD drivers ------------------------------
/* LCD driver */
void LcdReady(){
timeout=0;
while(((*LCD_crd&0x80)==1) && (timeout<500))++timeout;
}
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void clr_screen(){
LcdReady();*LCD_cwr=0x01;
}
void goto_xy(int x, int y){
LcdReady();
switch(y){case 0: *LCD_cwr=0x80+x; break;
case 1: *LCD_cwr=0xC0+x; break;case 2: *LCD_cwr=0x94+x; break;case 3: *LCD_cwr=0xd4+x; break;}
}
void InitLcd(){
LcdReady();*LCD_cwr=0x38;LcdReady();*LCD_cwr=0x0c;clr_screen();goto_xy(0,0);
delay_ms(100);}
void PutLCD(char *str){
char i;for (i=0; str[i] != '\0'; i++)
{LcdReady();*LCD_dwr=str[i];}
}
void putch_lcd(char ch){
LcdReady();*LCD_dwr=ch;
}//------------------------- end of LCD drivers ----------------------------
void load_user_subroutines(){PC = 0xf000;dptr = (char *) PC;
for (i=0; i<17 ;i++ ){
*(dptr+i) = user_delay[i];}
PC = 0xf020;
dptr = (char *) PC;
for (i=0; i<sizeof(interrupt_test) ;i++ ){
*(dptr+i) = interrupt_test[i];}
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}
void service_break(){
asm(" plo r2 ; save D first \n"
" ldAD r1, _USER_D \n"" glo r2 \n"" str r1 \n"
" ldAD r1, _USER_R3 \n"" ghi r3 \n"" str r1 \n"" inc r1 \n"" glo r3 \n"" str r1 \n"
" ldAD r1, _USER_R4\n"" ghi r4 \n"" str r1 \n"" inc r1 \n"" glo r4 \n"" str r1 \n"
" ldAD r1, _USER_R5\n"" ghi r5 \n"" str r1 \n"" inc r1 \n"" glo r5 \n"" str r1 \n"
" ldAD r1, _USER_R6\n"" ghi r6 \n"" str r1 \n"" inc r1 \n"" glo r6 \n"" str r1 \n"
" ldAD r1, _USER_R7\n"" ghi r7 \n"" str r1 \n"" inc r1 \n"" glo r7 \n"" str r1 \n"
" ldAD r1, _USER_R8\n"" ghi r8 \n"" str r1 \n"" inc r1 \n"" glo r8 \n"" str r1 \n"
" ldAD r1, _USER_R9\n"" ghi r9 \n"" str r1 \n"" inc r1 \n"" glo r9 \n"" str r1 \n"
" ldAD r1, _USER_R10\n"" ghi r10 \n"" str r1 \n"" inc r1 \n"" glo r10 \n"
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" str r1 \n"
" ldAD r1, _USER_R11\n"" ghi r11 \n"" str r1 \n"" inc r1 \n"" glo r11 \n"" str r1 \n"
" ldAD r1, _USER_R12\n"" ghi r12 \n"" str r1 \n"" inc r1 \n"" glo r12 \n"" str r1 \n"
" ldAD r1, _USER_R13\n"" ghi r13 \n"" str r1 \n"" inc r1 \n"" glo r13 \n"" str r1 \n"
" ldAD r1, _USER_R14\n"" ghi r14 \n"" str r1 \n"" inc r1 \n"" glo r14 \n"" str r1 \n"
" ldAD r1, _USER_R15\n"" ghi r15 \n"" str r1 \n"" inc r1 \n"" glo r15 \n"" str r1 \n"
" lbr 0 ; return to system monitor\n"
);
}
void main(){
*segment = 0;*digit = 0xff;*gpio1 = 0;
*tick=0;
state =0;
init_8250();InitLcd();
if(warm != 0xaaaa){
flag =0;warm = 0xaaaa;
}
blink_q();
PC = 0x8000;save_PC = 0x8000;
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// asm("ldAD r1,9000h \n"); // load interrupt vector at 9000h
load_user_subroutines();
dptr= (char *) PC;
// test_uart();
PutLCD(text2);goto_xy(0,1);
PutLCD(text3);
pstr(text1);
buffer[0]=0;buffer[1]=0;buffer[2]=convert[2];buffer[3]=convert[0];buffer[4]=convert[8];buffer[5]=convert[1];
while(1){
scan1();}}
void setRAM(){
asm("ROM_END1: EQU $\n");asm(" org 0fe00h\n"); // space for monitor variables
}
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NOTE