Upload
juliana-underwood
View
219
Download
0
Embed Size (px)
DESCRIPTION
ROACH I Board
Citation preview
Collaboration for Astronomy Signal Processing and Electronics ResearchCollaboration for Astronomy Signal Processing and Electronics Research
10 gigabit Ethernet
Introduction to Simulink
400 MHz Bandwidth
Spectrometer4 input FX Correlator
ScheduleMorning:
Afternoon:
High level talks, background, science and extant instrument discussion
Hands-on tutorials (room 1301), small group whiteboard discussions
ROACH I Board
ROACH I Board
Interface to high speed analog to
digital conversion
ROACH I Board
Interface to high speed analog to
digital conversionHigh speed IO
(10 gigabit Ethernet)
ROACH I Board
Interface to high speed analog to
digital conversion
PowerPC microprocessor
High speed IO (10 gigabit Ethernet)
ROACH I Board
FPGA
Interface to high speed analog to
digital conversion
PowerPC microprocessor
High speed IO (10 gigabit Ethernet)
✴ FPGA stands for Field Programmable Gate Array - FPGAs consist of a collection of reprogrammable digital logic elements
✴ The first commercially available FPGA was introduced in 1985.
✴ Common applications include telecommunications, cryptography, image processing, defense systems, etc..
What is an FPGA?
✴ The first commercially available FPGA was introduced in 1985.
✴ Common applications include telecommunications, cryptography, image processing, defense systems, etc..
What is an FPGA?✴ FPGA stands for Field Programmable Gate Array - FPGAs consist of a collection of reprogrammable digital logic elements
Programming FPGAsTraditionally done with hardware description languages,
e.g. Verilog, VHDL
‣Addition and Subtraction in C
x = a + b;
Programming FPGAsTraditionally done with hardware description languages,
e.g. Verilog, VHDL
module addsub (a, b, addnsub, result);input [7:0] a;input [7:0] b;input addnsub;output [8:0]
result; reg [8:0] result; always @(a or b or
addnsub) begin if (addnsub)result = a + b;
else result = a - b;endendmodule
‣Addition and Subtraction in Verilog
‣Addition and Subtraction in C
x = a + b;
Programming FPGAsTraditionally done with hardware description languages,
e.g. Verilog, VHDL
HDL Code
Logic Synthesis Binary FPGA Programming Instructions (Bitstream)
Place and Route
Code Generation
Simulink Diagram
HDL Code
Logic Synthesis Binary FPGA Programming Instructions (Bitstream)
Download to ROACH
Place and Route
‘Real’ dual 400MHz BW 16k spectrometer for ROACH
Mark Wagner / Lincoln Greenhill
Up Next:Tutorial #1
An Introduction to Simulink and the CASPER Toolflow