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IntroductionIntroduction
Processors and memory place more focus on performancep
I/O l f d d b l I/O systems place more focus on dependability Networks - communication Disks - storage
3
Introduction§6.1 IntrIntroduction
A high-level view of a simple system with I/O
roduction
A high-level view of a simple system with I/O
Chapter 6 — Storage and Other I/O Topics — 4
Introduction§6.1 IntrIntroduction
A high-level view of a simple system with I/O
roduction
A high-level view of a simple system with I/O
Di I/O t
Chapter 6 — Storage and Other I/O Topics — 5
Diverse I/O systems
Introduction§6.1 IntrIntroduction
Performance consideration with I/O is complex
roduction
Performance consideration with I/O is complex because it depends on The device characteristics Connection between the device and the rest of the system Memory hierarchy
The OS The OS
Chapter 6 — Storage and Other I/O Topics — 6
Performance measures
L ( ) Latency (response time) Regular use of desktop/laptop, the response time
for different tasks is more important. Each I/O request is for a small task
Throughput (bandwidth)g p ( ) In multimedia application, the I/O request is for a
long stream of data (e.g., video)g ( g )
Chapter 6 — Storage and Other I/O Topics — 7
Performance measures
Desktops & embedded systemsDesktops & embedded systems Mainly interested in response time & diversity of
devicesdevices
S Servers Mainly interested in throughput & expandability of
d idevices
Chapter 6 — Storage and Other I/O Topics — 8
Input/OutputInput/Output
What do we mean by Input/Output ? An input operation is inputting a data from a An input operation is inputting a data from a
device to the memoryA d f An output operation is outputting a data from memory to a device This means …
9
Interconnecting Components§6.5 ConInterconnecting Components
N d i i b
nnecting P
Need interconnections between CPU, memory, I/O controllers
Processorss, Mem
orry, and I/OO Devices
Chapter 6 — Storage and Other I/O Topics — 10
BUS : Interconnecting Components§6.5 ConBUS : Interconnecting Components
B h d i i h l
nnecting P
Bus: shared communication channel Parallel set of wires for data and synchronization
of data transfer
Processorsof data transfer
Ad t f b
s, Mem
or
Advantages of a bus: Easy to add new devices because the same set of
shared wires connect all components
ry, and I/O
shared wires connect all components Low cost due to the shared wires
O Devices
Chapter 6 — Storage and Other I/O Topics — 11
BUS: Interconnecting Components§6.5 ConBUS: Interconnecting Components
B di d
nnecting P
Bus: disadvantage Bottleneck: performance of the system limited by
the bus
Processorsthe bus
P f li it d b h i l f t
s, Mem
or
Performance limited by physical factors Wire length, number of connections
ry, and I/O
More recent alternative: high-speed serial ti ith it h
O Devices
connections with switches Like networks
Chapter 6 — Storage and Other I/O Topics — 12
Bus Signalsg
D l Data lines Carry address and data Multiplexed or separate
Control lines Indicate data type synchronize transactions Indicate data type, synchronize transactions
Chapter 6 — Storage and Other I/O Topics — 13
Bus Type: Synchronousp
S h Synchronous Uses a bus clock A fixed protocol for communicating that pre-determines A fixed protocol for communicating that pre-determines
the actions in different clock cycle E.g., transmit address and read command in first cycle,
t it d t 5th l memory transmits data on 5th cycle …
Advantage : Bus can run fast in a predictable fashionAdvantage : Bus can run fast in a predictable fashion
Disadvantage : Devices must run on same clock rate as Disadvantage : Devices must run on same clock rate as bus and there might be clock skew problems
Chapter 6 — Storage and Other I/O Topics — 14
Bus Type: Asynchronousp
A h Asynchronous Uses request/acknowledge control lines for
handshaking They are not clocked – so it is easier to
accommodate a wider range of devices No worries about clock skew problem
Chapter 6 — Storage and Other I/O Topics — 15
I/O Management : OS§6.6 InteI/O Management : OS erfacing I/
I/O is mediated by the OS. Why ? Multiple programs share I/O resources
/O DeviceMultiple programs share I/O resources
Need protection and scheduling
s …
Role of the OS: OS guarantees that the user programs access only g p g y
the portions where it has rights. Recall file write/read rights set by the OSg y
OS schedules access to the shared I/O resources
Chapter 6 — Storage and Other I/O Topics — 16
I/O Management : OS§6.6 InteI/O Management : OS erfacing I/
I/O is mediated by the OS. Why ? I/O causes asynchronous interrupts
/O DeviceI/O causes asynchronous interrupts
Interrupts cause transfer to kernel mode, must be handled by the OS
s …
handled by the OS
Role of the OS: OS handles the interrupts just like exceptions
Chapter 6 — Storage and Other I/O Topics — 17
I/O Management : OS§6.6 InteI/O Management : OS erfacing I/
I/O is mediated by the OS. Why ? Low-level I/O programming is complex
/O DeviceLow level I/O programming is complex
Role of the OS:
s …
OS provides supplies subroutines to handle low-level I/O commands
Chapter 6 — Storage and Other I/O Topics — 18
I/O CommandsI/O Commands
There must be a way for the OS to communicate i h h I/O d i with the I/O devices:
Memory mapped I/O commands
I/O instructions
Chapter 6 — Storage and Other I/O Topics — 19
Memory mapped I/OMemory mapped I/O
P f dd d I/O Portions of address are assigned to I/O devices When processor sends a data to such an
address, the OS ignores it, g Instead, the I/O device controller interprets
the data as a command the data as a command OS uses address translation mechanism to
k th l ibl t k l d t make them only accessible to kernel, and not to the user programs
Chapter 6 — Storage and Other I/O Topics — 20
I/O CommandsI/O Commands
Apart from commands, processor also needs to check the status of the devicethe status of the device
Status registersg Indicate what the device is doing and occurrence of errors E.g, ‘done’ printer has completed printing, ‘error’ printer is
jammedjammed
Data registers Write: transfer data to a device Read: transfer data from a device
Chapter 6 — Storage and Other I/O Topics — 21
I/O InstructionsI/O Instructions
I/O instructions Separate instructions to access I/O registersp g Can only be executed in kernel mode
Example: x86 Example: x86
Chapter 6 — Storage and Other I/O Topics — 22
PollingPolling
Periodically check I/O status register If device ready, do operationy, p If error, take action
C i ll l f l Common in small or low-performance real-time embedded systems Predictable timing
In other systems wastes CPU timeIn other systems, wastes CPU time
Chapter 6 — Storage and Other I/O Topics — 24
InterruptsInterrupts
Wh d i i d When a device is ready or error occurs Controller interrupts CPU
Interrupt is like an exception But not synchronized to instruction execution, i.e.,
does not prevent instruction executionC i f i h f id ifi h Conveys information that often identifies the interrupting device
Chapter 6 — Storage and Other I/O Topics — 25
I/O Data TransferI/O Data Transfer
P ll d d I/O Polling and interrupt-driven I/O CPU transfers data between memory and I/O data
registers Time consuming for high-speed devices
Direct memory access (DMA) OS provides starting address in memoryOS provides starting address in memory I/O controller transfers to/from memory
autonomously without involving the processorautonomously without involving the processor Controller interrupts on completion or error
Chapter 6 — Storage and Other I/O Topics — 26
DMA/Cache InteractionDMA/Cache Interaction
If DMA writes to a memory block that is cached Cached copy becomes stale
If write-back cache has dirty block, and DMA reads memory blocky Reads stale data
Need to ensure cache coherenceNeed to ensure cache coherence Flush blocks from cache if they will be used for DMA Or use non-cacheable memory locations for I/O Or use non-cacheable memory locations for I/O
Chapter 6 — Storage and Other I/O Topics — 27