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COMPUTER ORGANIZATION & ARCHITECTURE
Computer Arithmetic - ALU Designs Lesson 6
1 CSCD211- DEPARTMENT OF COMPUTER SCIENCE, UNIVERSITY OF GHANA
Arithmetic & Logic Unit • Responsible for all calculations. Makes use of simple digital logic devices that can
store binary digits and perform simple Boolean logic operations.
• Data are presented to the ALU in registers, and the
results of an operation are stored in registers
• The ALU may also set flags as the result of an operation. For example, an overflow flag is set to 1 if the result of a computation exceeds the length of the register into which it is to be stored
2 CSCD211- DEPARTMENT OF COMPUTER SCIENCE, UNIVERSITY OF GHANA
Addition and Subtraction • Normal binary addition • Monitor sign bit for overflow
• Take twos compliment of subtrahend and
add to minuend – i.e. a - b = a + (-b)
• So we only need addition and complement circuits
4 CSCD211- DEPARTMENT OF COMPUTER SCIENCE, UNIVERSITY OF GHANA
6 CSCD211- DEPARTMENT OF COMPUTER SCIENCE, UNIVERSITY OF GHANA
• The first four examples illustrate successful operations.
• If the result of the operation is positive, we get a
positive number in twos complement form, which is the same as in unsigned-integer form.
• If the result of the operation is negative, we get a
negative number in twos complement form. • NB: In some instances, there is a carry bit beyond the
end of the word (indicated by shading), which is ignored.
7 CSCD211- DEPARTMENT OF COMPUTER SCIENCE, UNIVERSITY OF GHANA
• On any addition, the result may be larger than can be held in the word size being used. This condition is called overflow.
• When overflow occurs, the ALU must signal this fact
so that no attempt is made to use the result. To detect overflow, the following rule is observed;
• OVERFLOW RULE: If two numbers are added, and
they are both positive or both negative, then overflow occurs if and only if the result has the opposite sign
9 CSCD211- DEPARTMENT OF COMPUTER SCIENCE, UNIVERSITY OF GHANA
• The diagram shows the data paths and hardware elements needed to accomplish addition and subtraction
• The central element is a binary adder, which is presented
with two numbers for addition and produces a sum and an overflow indication.
• For addition, the two numbers are presented to the
adder from two registers, designated in this case as A and B registers
• For subtraction, the subtrahend (B register) is passed
through a twos complementer so that its twos complement is presented to the adder
Multiplication • Multiplication is a complex operation, whether
performed in hardware or software • A typically pencil and paper computation can
be done as follows:
10 CSCD211- DEPARTMENT OF COMPUTER SCIENCE, UNIVERSITY OF GHANA
Flowchart for Unsigned Binary Multiplication
12 CSCD211- DEPARTMENT OF COMPUTER SCIENCE, UNIVERSITY OF GHANA
Multiplying Negative Numbers • This does not work! • Solution 1
–Convert numbers to positive if required
–Multiply as always –If signs are different, negate answer
• Solution 2 –Booth’s algorithm
13 CSCD211- DEPARTMENT OF COMPUTER SCIENCE,
UNIVERSITY OF GHANA
Floating Point
• +/- .significand x 2exponent • Misnomer • Point is actually fixed between sign bit and body of
mantissa • Exponent indicates place value (point position)
15 CSCD211- DEPARTMENT OF COMPUTER SCIENCE, UNIVERSITY OF GHANA
Normalization • Floating Point numbers are usually
normalized • i.e. exponent is adjusted so that leading
bit (MSB) of mantissa is 1 • Since it is always 1 there is no need to
store it • (c.f. Scientific notation where numbers
are normalized to give a single digit before the decimal point e.g. 3.123 x 103)
17 CSCD211- DEPARTMENT OF COMPUTER SCIENCE, UNIVERSITY OF GHANA
Floating Point Arithmetic +/- • Check for zeros Because addition and subtraction are identical except for a sign change, the process begins by changing the sign of the subtrahend if it is a subtract operation • Align significands (adjusting exponents) The next phase is to manipulate the numbers so that the two exponents are equal • Add or subtract significands • Normalize result Normalization consists of shifting significand digits left until the most significant digit (bit, or 4 bits for base-16 exponent) is nonzero
18 CSCD211- DEPARTMENT OF COMPUTER SCIENCE, UNIVERSITY OF GHANA
Floating Point Addition & Subtraction Flowchart
19 CSCD211- DEPARTMENT OF COMPUTER SCIENCE, UNIVERSITY OF GHANA
Floating Point Arithmetic x/÷ • Check for zero • Add/subtract exponents • Multiply/divide significands (watch sign) • Normalize • Round • All intermediate results should be in
double length storage
20 CSCD211- DEPARTMENT OF COMPUTER SCIENCE, UNIVERSITY OF GHANA