Al-Isra Private University

Faculty of Science and Information Technology

Department of CS

Course Plan

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Course No.: 605105

Course Classification:

Department Compulsory (All)

Course Name: Logic Design

Time Division:

3 Lecture Hours + 1 Practical Hour

Course Website: http://elearn.iu.edu.jo Semester &Year: Second, 2014/2015

Course Description

(3 credit hours, Prerequisite: 606108/ General Physics for computer science) Numbering system, computer codes, Boolean algebra and logic gates, simplification of Boolean

functions, combinational logic, MSI and PLD components, synchronous clocked sequential

circuits, asynchronous sequential circuits, and shift registers, memories.

Course Intended Outcomes

At the end of the course, students are expected to learn:

Numbering systems.

Boolean algebra and logic gates.

Simplification of Boolean functions.

Design of combinational circuits (adders, comparators, multiplexers, coder,

decoders,..., etc).

Design of sequential circuits (flip-flops, counters, shift registers). Memories.

Course Outline

Week Mon Class (Text Sec.) Wed Class (Text Sec.)

Oct 26 Course outline and course preview.

Introductory digital concepts, Digital and

analog quantities, Binary digits, logic levels, and digital waveforms, (1.1-1.3).

Basic logic operations, Basic logic functions, Digital integrated circuits,

Numbers systems, operations and

codes, Decimal, Binary, binary

fractions, binary arithmetic, (1.3-1.5,

2.1-2.2)

Nov 2 Octal and Hexadecimal numbers, Binary

coded Decimal (BCD), BCD addition,

Signed numbers, Logic gates, The

invertors, The AND, OR, and NOR gates,

(2.3-2.5, 3.1, 3.2)

The XOR and XNOR gates, Integrated circuit logic families, Boolean algebra

and logic simplification, Boolean

operations and expressions, Laws and rules of Boolean algebra. (3.3-3.4, 4.1-

4.3)

Nov 9 Simplification using Boolean algebra,

Standard forms of Boolean expressions,

SOP & POS, (4.5-4.6) QUIZ

Boolean expressions and truth tables,

The Karnaugh map, The Karnaugh map SOP minimization, (4.6- 4.9)

Nov 16 More examples, K-Map with don’t care

terms, BCD example, (4.9)

The Karnaugh map POS minimization,

(4.10) QUIZ

Nov 23 Five variables K-Map, examples,

Combinational logic, Special combinational

logic circuits, Implementing combinational

circuits, The universal property of NAND

and NOR gates, ((4.10,5.1-5.3)

Combinational logic circuits using

universal gates, Operation with pulse waveforms, (5.4, 5.5)

Nov 30 Review First Exam

Dec 7 Return and Discussion of the First Exam Results,

Functions of combinational logic, Basic Adder (half & full adders), (6.1)

Parallel binary adders, look-ahead

carry adders, adder/subtractor Comparators, Decoders, (6.2- 6.5)

Dec14 Active high or low enable, encoders,

Decoder expansion,

Multiplexers, multiplexer expansion,

Design using multiplexers, and De-

Al-Isra Private University

Faculty of Science and Information Technology

Department of CS

Course Plan

___________________________________________________________________________________

2

encoders, and code converters(optional),

(6.5-6.6)

multiplexers, Parity

generators/checkers, Tutorial

examples, (6.6)

Dec21 Flip-flops and related devices, Latches, SR

latch, Edge-triggered flip-flop, (7.1-7.2)

QUIZ

flip-flops operating Characteristics,

Flip flops with preset and clear ,

Timing diagram of JK with preset &

clear, (7.2-7.4)

Dec 28 Applications of flip flops, division by 2,

Counters,

Asynchronous counter operation,

Counter with decoder, (8.1-8.2)

Jan 4 Synchronous counter operation, Up/down

synchronous counters, Design of

synchronous counters, (8.2-8.4)

Design of synchronous counters,

more examples, (8.3, 8.4)

Jan 11 Review, Second Exam

Jan 18 Return and Discussion of the Second Exam Results,

Basic shift register functions, (9.1), Types of shift registers, (9.2)

Basic semiconductor memories,

ROMs, PROMs and RAMs (10.1-10.2)

Memory Expansion, special types of

memories, (10.1- 10.4)

Jan 25 programmable devices, Programmable

logic devices (PLDs)

Magnetic and optical memories,

Review

Feb 1 Final Exam

Feb 8

Textbook 1. Digital Fundamentals, Floyd, Prentice-Hall, 8th edition, 2003.

Suggested references

1. Digital logic and Computer Design, Mano, Prentice -Hall, 4th edition,2007 2. Digital systems, principles and applications, Tocci, Ronald R.,Prentice-Hall, 10th

edition 2006

Marking

First Exam 15 marks (theoretical)

Second Exam 15 marks (theoretical)

Lab 20 marks

Activity 10 marks

Final Exam 40 marks

Regulations 1. There will be three term exams given during this semester. The best two out of three will be considered for

the First and Second Exam. This means: there will be NO makeup exams! Missing one of the two left

exams means a ZERO grade will be given for that exam.

2. There are no makeup for quizzes

3. Attendance is mandatory and University regulations will be enforced.

4. All Cheating incidents will be reported to the chair. The following activities are considered cheating:

a. Turning in assignment that includes parts of someone else's work.

b. Turning in someone else’s assignment as your own.

c. Giving assignment to someone else to turn in as their own.

d. Copying answers in a test or quiz.

e. Taking a test or quiz for someone else.

f. Having someone else take a test or quiz for you.

5. See Student handbook for other regulations.

Al-Isra Private University

Faculty of Science and Information Technology

Department of CS

Course Plan

___________________________________________________________________________________

3

Assignments and/or Projects

Assignments /

Projects

Description Due Date Marking

Quizzes During the course. (three or

more)

60% of Activity

Mark

Homework Problem sets

The nature of the assignments, deadlines and

method of delivery will be specified by instructors

throughout the course.

40% of Activity

Mark

Instructors' information

Section: 1 Lecture Room: 4116 Time: 11-12:30 (Mon, Wed)

Lab: 4336 Time: 12:30-2:00 (Mon, Wed)

Instructor's Name: Dr. Adnan Al-Helali Office No.: 4125

Email : adnan_hadi@iu.edu.jo

Office Hours: 10-11 Mon, Wed

3-4 Sun, Tue Or by appointment if necessary

Important: The content of this syllabus may not be changed during the current semester

Instructor Council Chair Sun, Tue, Thu [10-11]

Mon, Wed [01-02]