Embed Size (px)
Citation preview
2001 Future Energy Challenge
Texas A&M University Fuel Cell Inverter
- 10 kW Design & Cost Analysis
Texas A&M University, College Station, Texas August 27, 2001
Page 2 of 40
TABLE OF CONTENTS: Page
1. INTRODUCTION ........................................................................... 3
2. TOPOLOGY AND OPERATION ................................................. 3
3. DESIGN AND CALCULATIONS ................................................. 6
4. SCHEMATICS................................................................................. 16
5. BILL OF MATERIALS.................................................................. 17
6. COST EVALUATION .................................................................... 19
7. CONCLUSIONS .............................................................................. 22
APPENDICES:
A. SCHEMATICS................................................................................. 23
B. SIMULATION RESULTS.............................................................. 31
C. UC3825B DATASHEET ................................................................. 34
D. COST INFORMATION ON TEXAS INSTRUMENTS
TMS320C24X DSP .......................................................................... 39
LIST OF TABLES:
1. Bill Of Materials For DC-DC Converter And Bulk Capacitors. 17
2. Bill Of Materials For DC-AC Inverter And Output Filter ......... 18
3. Bill Of Materials For DSP Control Board .................................... 19
4. DC-DC Converter Subsystem Costs .............................................. 21
5. DC-AC Inverter Subsystem Costs ................................................. 22
Page 3 of 40
11..00 IInnttrroodduuccttiioonn
The report outlines the technical approach and the cost analysis to achieve the objectives
proposed by the 2001 Future Energy Challenge organizing committee. The Texas A&M team
believes it has developed an efficient and cost-effective inverter system. The team has developed
a low cost analog control solution for the DC-DC converter, an efficient 3-terminal DC-DC push
pull topology, a unique DSP control for DC-AC inverter control, and a rigorous cost reduction
approach for the 2001 Fuel Cell inverter project.
The Texas A&M team provides a rigorous cost savings approach by reducing the number
of power switches in the design. Incorporating fewer power resistors enhances cost savings and
efficiency. The 3-terminal push-pull DC-DC converter topology provides isolation for safety,
suitable boosting of the fuel cell voltage to 400 volts, reduced cost and reduced size of the energy
storage elements in the converter.
22..00 TTooppoollooggyy aanndd OOppeerraattiioonn Figure 1 shows the schematic for the TAMU fuel cell inverter system which comprises of
a DC-DC boost circuit, a DC-AC inverter circuit and an output filter besides battery banks
floating on the high voltage DC bus.
The DC input from the fuel cell (48 VDC nominal, +50%, -12.5%) is first converted to a
regulated 400 VDC using a high frequency 3-terminal Push-Pull DC-DC converter. The DC-DC
conversion stage consists of a high-frequency transformer. Isolation is provided for safety, system
protection, and to meet the stringent FCC Class-A standards. The 400V DC-DC converter output
is converted to 120V/240V, 50/60 Hz, single-phase AC by means of a PWM driven inverter
stage. To obtain independent single phase outputs, two half-bridge inverters are used. An output
LC filter stage is employed to produce a low THD AC waveform. Low loss, high switching
Page 4 of 40
frequency MOSFET and IGBT switches have been employed to achieve a higher efficiency,
lower size and volume of the fuel cell inverter system.
DC-DC converter and inverter topologies were designed to achieve ease of
manufacturability and mass production. Another unique aspect of the design is the use of the
TMS320C2407 DSP to control the inverter. The DSP reduces printed circuit board layout
complexity. Readily programmable, the DSP adds flexibility and intelligence to implement
various control aspects by means of software. (See Appendix D for DSP cost information)
Two sets of lead-acid batteries are provided on the 200V DC bus to supply sudden load
demands. By floating the standby battery off the 400V instead of at the 48V level, we avoid
processing the battery power via two stages. Efficient and smooth control of the power drawn
from the fuel cell and the high voltage battery is achieved by controlling the front end DC-DC
converter in current mode.
Page 5 of 40
48V
DC
/ 40
0VD
C, 4
0KH
z P
US
H P
ULL
CO
NV
ER
TE
R
+
-
Fue
l Cel
l Inp
ut
48V
DC
120/
240V
, 60
Hz
I in C1
T1
T2
TR
1
1:5
L1
VD
C+ -
C2
C3
L b L b
S1 S2
S3
S4
L2
C4
L3
C5
i A i B
A BN
120V
/240
VA
C, 2
0KH
z P
WM
INV
ER
TE
R
AC
Out
put
Vin
D1
D3
D4
D2
N1
N1
N2
N2
I DC
Bat
tery
Bac
kup
Vba
tt
Vba
tt
Not
e: C
ompo
nent
s sh
own
in d
otte
d bo
xes
are
not c
onsi
dere
d fo
r co
st e
valu
atio
n
3 3N
K1
K2
Fig
ure
1:
Sch
emat
ic o
f th
e T
AM
U F
uel
Cel
l In
vert
er S
yste
m
i T1
I T2
i D1
i L
i C
A
BN
i AO
i BO
Page 6 of 40
VoltageControl ler
CurrentControl ler
CurrentFeedback
Vol tageFeedback
Fuel Cel lPower Avai lable Signal
Fuel Cel lDC Power Input
Voltage Ref.
variable l imiter
To InverterCurrent Ref. +
-
+-
+-
+-
DC-DC Conver ter
Figure 2: Block Diagram for DC-DC Converter Control
Figure 2 shows the block diagram for the current control of the DC-DC converter. The
Power Available signal (analog) from the fuel cell is used to adjust the current limit setting of the
DC-DC converter. This ensures that the power drawn from the fuel cell does not exceed its
capability. The remaining power is then provided by the battery backup system (Figure 1). The
inverter, on the other hand, determines the actual power drawn by the loads and communicates to
the fuel cell to either increase or decrease its power output. This ensures that the fuel cell has
sufficient time to adjust its power generation to meet the changes in load demand.
33..00 DDeessiiggnn aanndd CCaallccuullaattiioonnss 3.1 DC-DC Converter Design For The 10kW TAMU Fuel Cell Inverter System
In this section design of the DC-DC Converter is detailed. Figure 1 shows the circuit
diagram of the push-pull DC/DC converter. Fuel cell output is connected to the DC/DC
converter as shown. MOSFETs T+ and T- are turned on and off alternately at a switching
frequency of 40kHz.
The power output Po of the inverter is 10000W. Assuming an efficiency of 95% for the
inverter and the DC-DC converter, we have an input power Pin,
Page 7 of 40
WW
Pin 1105095.095.0
10000
(1)
A nominal fuel cell input voltage, Vin= 48VDC, is assumed.
Output voltage, Vo= 400VDC
Designing for the low input line condition (Vin=42VDC), input current Iin from the fuel cell is,
AV
WIin 263
42
11050 (2)
The push pull DC/DC converter shown in Figure 1 comprises of two switches, T+ and T-. At the
maximum duty ratio of 0.45, rms current rating IT of the switches are,
AII inT 17645.0 (3)
IRFP260N (200V, 50A) MOSFETs with 4 devices in parallel in each leg are then chosen.
High frequency transformer:
For obtaining an output voltage of 400VDC for the push-pull converter, a turns ratio of K=5 is
selected for the transformer. Center taps are available on both the primary and secondary sides as
shown in Figure 1.
The VA rating of the transformer is defined as the sum of the total primary and secondary
winding VA divided by two,
kVAWIVK
IKV
IVVA inin
inin
ininTr 0.1716600263425.15.122
222
1
(4)
Voltage ratings of the transformer are selected as,
Primary voltage=80V, Secondary voltage=400V
Diode ratings:
The reverse blocking voltage is equal to the DC link voltage 400V. Since each diode is clamped
to the mid-point of the DC-link (200V), each diode can be rated for 300V.
The rms current through the diode, ID, is given by
Page 8 of 40
AK
II in
D 2.372
(5)
Therefore, 60EPU04 (400V, 60A), fast recovery diodes are selected.
Design of Current Mode PWM Controller:
The DC-DC Converter uses the 3-terminal push-pull topology to boost the 48V from the fuel cell
to 200V at a switching frequency of 40kHz. The push-pull DC-DC converter is controlled by
means of a high speed PWM controller UC3825B (datasheet attached in Appendix C). The special
features of this controller are: suitability for current control; soft start; over current and under
voltage protection; low propagation delay; high current dual outputs and low cost.
Current mode control has numerous advantages over simple voltage mode control,
including making the converter respond faster to load changes. In particular the UC3825B is
suitable for the fuel cell inverter application because it allows direct control over the power drawn
from the fuel cell. The error amplifier output in the outer voltage loop defines the level at which
the primary current (in the inner current loop) will regulate the pulse width and output voltage.
Pulse-by-pulse symmetry correction is a feature of current mode control and thus is essential for
flux balancing the transformer in the push-pull topology.
Design methodology for the current mode controller is as follows,
Timing section:
Oscillator frequency=40kHz; period=25s
From the UC3825B data sheet, for a maximum duty cycle of 0.9, we have
nFFR
DC
kDmA
VR
T
MAXT
MAXT
12)10)(40)(10(3
)9.0(6.16.1
3)9.01(10
3)1(10
3
33
2
(6)
which yields a TON=22.5s, TOFF=2.5s.
Power input to the DC-DC converter, Pin is
Page 9 of 40
WPin 11050
The primary current under minimum fuel cell input voltage (42V) conditions, Iin is
AIin 263
For a duty cycle of 0.9, RMS of the primary current is
AI rmsin 2789.09.0
263, (7)
Current sensing:
To obtain 1.0V at 400A, current sensing resistor Rs = 0.0025 is used. We shall use 4 power
resistors rated 0.01 , 75W in parallel (See DC-DC converter schematic in Appendix A).
Accounting for voltage drops on the secondary side, the transformer secondary voltage is 410V.
Hence a transformation ratio of 1:10 is selected. This would result in a transformer turns ratio of
1:5 for the push-pull topology.
The output current Io,
AIo 26400
10500 (8)
Assuming the RMS ripple of Io to be 15%, the peak-to-peak ripple is 8A.
Thus the required value of inductor can be computed as,
HHA
sV
dI
dtVL
600576
8
25.11410sec (9)
PWM control section:
Slope compensation is required to compensate for the peak to average differences in primary
current as a function of the pulse width. The downslope of the inductor current is,
sAs
A
dt
dI
71.0
25.11
8 (10)
This value when reflected to the primary side (multiplying by the transformation ratio) yields
sA 1.71071.0
Page 10 of 40
Equivalent ramp downslope voltage VSL available across the sense resistor is,
sVVSL 01775.0105.21.7 3' (11)
Slope of the oscillator waveform VOSC is,
sVs
VVOSC
08.0
5.22
8.1 (12)
If the amount of inductor downslope voltage to be added to the oscillator waveform is 75%, then
a resistive divider with resistors 10k and 30k can be selected.
Input Capacitor :
Selecting a proper input capacitor C1 (Figure 1) contributes to the reduction in fuel cell input
current ripple. In this section, the selection of C1 is detailed.
The average input current Iavg at full load is 263A.
Assuming a square wave input current, for a duty ratio of 0.9, the peak current I,
AI 2929.0
263 (13)
and the RMS current Irms is,
AIrms 2779.0292 (14)
Therefore the RMS capacitor current Ic,rms ,
AIII avgrmsrmsc 9222, (15)
Based on the rated ripple current, 4 Rubycon Aluminum electrolytic capacitors 22000F, 100V
each are selected.
The simulation results for a 10kW load on the system are presented in Appendix B. Vds1,
Vds2 are the drain to source voltage across the MOSFETs T1 and T2 respectively. VDC is the
output voltage.
Page 11 of 40
3.2 Inverter Design Procedure for the 10kW TAMU Fuel Cell Inverter System
The schematic of the DC-AC Inverter circuit is shown in Figure 1. The inverter produces
two single-phase outputs, Phase-A and Phase-B. It is comprised of two half bridge inverters each
supplying a separate single-phase load at 120VAC, 60Hz. Consider the case when Phase-B is not
loaded and Phase-A is supplying full load (5000VA). The peak amplitude of the fundamental
frequency component is the product of ma and ½VDC, where ma is the modulation index. A
modulation index of 0.9 is assumed for this design.
The fundamental component of the inverter Phase-A output voltage VAO is,
10)sin(2 11, aDC
aAO mtV
mV (16)
The switching function sw1 of the half bridge inverter is
termsfrequency higher tsin 2
9.05.0 11 sw (17)
The Phase-A output current (iAO) is assumed to contain fundamental and third harmonic
current components due to presence of nonlinear load. The current iAO can be expressed as,
...)3sin(3)sin(2 313111 tItIiAO (18)
The current through the IGBT, S1 (isA) is given by
...)3cos(cos32
9.02cos(cos2
2
9.0
...)3sin(2
3)sin(
2
2
31331111
313111
1
tItI
tItI
iswi AOsA
(19)
Assuming the load current iA to consist of only fundamental (I1) and third harmonic component
(I3), we have,
23
21, III rmsA (20)
Page 12 of 40
Further, assuming I3=0.7 I1 (which is typical of a single phase rectifier type nonlinear load) we
have,
1, 22.1 II rmsA
Since
AI rmsA 7.41120
5000, (21)
the current I1 is,
AI 3422.1
7.411 (22)
Therefore, the largest component of the DC-link capacitor current ic is the fundamental frequency
current, the rms value of which equals
AIi rmsc 172
11, (23)
For a voltage ripple Vc less than 5% or 10V we have,
C
iV rmsc
c
, (24)
FV
iC
c
rmsc
4500
60210
17,
(25)
Panasonic Electrolytic capacitors rated 100V, 4500F are selected for this design.
Inverter switch ratings:
The rms current isA is 41.7A. Thus, rms current rating IT of each switch is
AIT 302
7.41 (26)
IXSH24N60 (600V, 48A) IGBTs are selected.
Page 13 of 40
3.3 DC-AC Inverter Output Filter Design Procedure
Figure 3 shows the topology for the output L-C filter. A transfer function is developed
from the schematic. The assumptions used in the analysis are, the output filter is lossless and the
third current harmonic current is 70% of the fundamental current frequency.
Figure 3: Output Filter
The transfer function for this type of filter is described by the equation
)( 2,
,
,
,
CLnLCL
nLC
ni
non XXnjZXnX
ZjX
V
VH
. (27)
Where
nH - transfer function
noV , - output voltage harmonic
niV , - input voltage harmonic
CX - capacitive component of impedance
LX - inductive component of impedance
nLZ , - impedance
n - harmonic order
For 11 H ; or CL XX , then
11,
1,1
CL
LC
XjZ
ZjXH . (28)
jnXL
- jXC
nZL1nVi,n Vo,n
Page 14 of 40
At no load, 1,LZ , therefore equation (27) is
1
1
22
C
LCL
Cn
X
XnXXn
XH (29)
In order to satisfy a THD requirement of less than 3%
22
333.3403.0
1
1
nX
X
X
Xn C
L
C
L
(30)
Non-Linear Load An equivalent circuit used in finding filter characteristics for a non-linear load is shown in
Figure 4.
jhXL
-jXC
hIhVh
Figure 4: Equivalent Circuit for a Non-Linear Load The transfer function for this schematic is described by equation
hLC
CLh I
XhX
XjhXV
2
. (31)
Where
hV - equivalent voltage
h - harmonic order
hI - current at h harmonic
CX - capacitive component of impedance
LX -inductive component of impedance
equation (31) can then be shown as
Page 15 of 40
h
C
L
Lh I
X
Xh
hXV
21
. (32)
Here C
L
X
X is very small making 12
C
L
X
Xh , therefore
hLh IhXV (33)
For the third harmonic 3h , we have
1
3
1
3 3
V
IX
V
VL , where THD is 03.0
1
3 V
V or %3 . Inductor impedance can be found by
3
1
*3
03.0
I
VX L
(34)
Output Filter Design
Let sf be defined as the switching frequency and 1f be defined as the fundamental
frequency. Then for kHzfs 20 , Hzf 601 , and 33.3331
f
fn s , 41009.3 x
X
X
C
L the
filter resonant frequency rf can be found with
89.56333.34
2
1
n
X
X
f
f
L
Cr . (35)
Hzf r 3413
The 10 KW inverter (5 KW per Phase) with VV 1201 , produces AI rms 67.41 ,
AI 95.253 . Use equation (34) to find 046.0LX . Then, using
12 f
XL L
(36)
Where
L - inductance
1f - fundamental frequency
LX - inductance component of impedance
Page 16 of 40
where Hzf 601 , the inductance will be HL 123 .
To find the capacitor impedance use the equation (30), to get 9.148CX , then using
CXfC
12
1
(37)
where
C - capacitance
CX - capacitor component of impedance
1f -fundamental frequency
and Hzf 601 , capacitance will be FC 18 .
Simulation results for a 10kW load on the system are presented in Appendix B.
44..00 SScchheemmaattiiccss The following detailed schematics are attached in Appendix A.
A1. DC-DC Converter: complete design schematic
A2. DC-DC Converter voltage feedback and protection circuit details
A3. Inverter power circuit and gate control
A4. Inverter voltage and current sensing and protection circuitry (Sheet 1)
A5. Inverter voltage and current sensing and protection circuitry (Sheet 2)
A6. DSP Control board schematic (Sheet 1)
A7. DSP Control board schematic (Sheet 2)
Page 17 of 40
55..00 BBiillll ooff MMaatteerriiaallss In this section, a detailed bill of materials is developed for the DC-DC converter and DC-
AC inverter subsystems. The components in the bill of materials are shown in schematics in
Appendix A.
Table 1: Bill of Materials for DC/DC Converter, Bulk Capacitors and its associated control & protection circuitry (refer Figures A1-A2 in Appendix A)
Description Type Rating Quantity MOSFETs IRFP260N 200V, 50A 8 PWM Controller UC3825B 1 Opto-isolated gate driver
HCPL3120 2
Power Diodes 60EPU04 400V, 60A 4 Input Capacitor Electrolytic 100V, 22000F 4 Bulk Capacitors Electrolytic 250V,4500F 2 Transformer 17kVA,
400V,38Arms 1
Inductors Coupled 300H, 38A 2 Sense resistors 0.01ohm,75W 4 High frequency capacitor
Film 1200V, 0.1F 1
Snubber resistor 500ohm, 10W 2 Snubber capacitor 1000V, 150pF 1 Power resistors 56k, 7W 2 Power diode 600V,15A 1 DC Input connector 1 Control input connectors 6 Op-amp LF347 1 Op-amp LF356 1 3-input NOR gates CD4023 1 2-input NOR gates C4011 1 Thermal switch 5R13-90M 1 Power supply 48IMP12-051515-7 1 Heatsink 1 LEDs 5 Switches 2 LCD Display 1 Zener diodes 4 Resistors 2W 4 Resistors 1W 2 Resistors 0.25W 37 Potentiometers 10k 1 Potentiometers 2k 2 Capacitors 50V 17
Page 18 of 40
Table 2: Bill of Materials for DC/AC Inverter, Output Filter and its associated control & protection circuitry (refer Figures A3-A5 in Appendix A)
Description Type Rating Quantity IGBT IXSH24N60 600V, 48A 4 Gate Drive IC IR2110 4 Filter Inductors 123H, 42A 2 Filter Capacitors 18F, 200V 2 Diodes FR104 4 Capacitors Film 0.22F, 1600V 4 Control input connector 1 AC output connectors 2 Thermal switch F11U 2 Current Transformer D1871 4 Current sensor LA55-P 2 Isolation Amplifier AD202JN 2 Opto-isolator 6N137 7 Op-amps LF347 3 Op-amps LM358 1 CMOS NAND gates CD4001 1 Potentiometers 10k 6 Schottky diodes LN4148 27 Zener diodes 3 Diodes 1N5401 2 Power supply 48IMP12-051515-7 15V,5V 3 Heatsinks 4 LED 5 Switches 3 Resistors 0.25W 66 Capacitors 50V 24
Page 19 of 40
Table 3: Bill of Materials for DSP Control Board (refer DSP Schematics in Appendix A)
Description Type Quantity DSP TMS320LF2407 1 CMOS AND gate 74LCX08 1 Serial communication IC
Max232 1
Signal translator P15C3245 1 D/A converter TLV5619 1 Voltage regulator TPS7333 1 7.372MHz oscillator Xc263 1 Zener diode LM4040 1 Ferrite beads 3 Resistors 0.25W 11 Jumpers 5 Capacitors 19 RS232 header 1 Headers 1
66..00 CCoosstt EEvvaalluuaattiioonn
With the practical experience gained by the working budget, the team’s industry partners
and the faculty advisors, the team was able to make well-informed design decisions to
aggressively lower the cost of the final 10kW design and 1.5kW prototype. The TAMU fuel cell
inverter team’s approach to reducing the cost of the inverter by reducing the number of high cost
switching devices by adopting push-pull topology, using a low cost PWM DC-DC controller and
including an efficient DSP DC-AC control board.
By use of the push–pull topology the number of MOSFETs was minimized to half that
needed by a full bridge topology. IGBT’s were reduced in the inverter by use of the half bridge
topology as opposed to the full bridge topology. The analog PWM controller provided a low cost
solution to control of the DC-DC converter. It provides a single chip control solution opposed to
complex discrete analog hardware. DSP control of the DC-AC inverter provides sophisticated
control at low cost. Further, the DSP enables software control of the inverter and adaptability for
stand-alone and utility interface modes. Software control translates into efficiency in human
capital reducing costs of analysis, troubleshooting, development and manufacturing of the fuel
Page 20 of 40
cell inverter. The use of the DSP allows a seamless interface with other components of a power
management system, saving integration time and human resources. The topology of the TAMU
Fuel cell Inverter System employs a high voltage battery floating on the DC-link. This approach
does not add any additional power processing cost for load management.
The cost for the power components of the TAMU Fuel Cell Inverter system were
calculated by developing the cost of the DC-DC converter and the DC-AC inverter and adding
the two components together. The cost analysis was based on the schematic shown in Figure 1
and the 10kW design procedure detailed in this report. The results of the cost analysis for the
DC-DC converter are seen on the normalized spreadsheet Table 4 and the results of the DC-AC
inverter costs are seen in Table 5.
As per the cost analysis spreadsheet provided by the 2001 Future Energy Challenge
Committee, the cost of the DC-DC converter was $598.09. The cost of the DC-AC inverter
$198.69. The total cost of the TAMU Fuel Cell System was $796.78. It should be noted that the
cost analysis spread sheet (Tables 4 & 5) do not give the absolute cost and assumes a fixed cost
for control and packaging. These costs are highly dependent on the type of design and the
number of units manufactured per month.
The TAMU inverter control is based on a low cost DSP (TMS320C24X). Our design and
experimental prototype has demonstrated that sophisticated control algorithms can be
implemented on this DSP platform. Appendix D details a press release from Texas Instruments
and lists a cost of $2.98 for the TMS320C24X DSP employed in the TAMU inverter design.
The TAMU Fuel cell Inverter Team believes that with a detailed analysis of the control
circuit and the ancillary components, this design can be mass produced and marketed for an
amount below the target cost of $500.
Page 21 of 40
2001 FUTURE ENERGY CHALLENGE
UNIVERSITY: Texas A&M University
NAME OF MAIN CONTACT: Dr. Prasad Enjeti
PROJECT NAME: TAMU Fuel Cell Inverter (10kW)
DATE: 24-Aug-01
VOLT VOLT CUR CUR UNIT EXTENDEDQTY DESIG UNIT MEASURE (Vpk) (Vrms) (Avg) (Arms) COST COST
DIODEDIODE 4 D1,2,3,4 300 40 3.15 12.59DIODE - DUAL MODULEDIODE - DUAL MODULEIGBTIGBTTRANSISTORMOSFET 8 T1,2 200 54 9.62 76.92MOSFETSCRCAP (ALUM) uFCAP (ALUM) 2 C2,3 4500 uF 250 39.04 78.09CAP (ALUM) 4 C1 22000 uF 100 30.56 122.25CAP (ALUM) uFCAP (FILM) uFCAP (FILM) uFCAP (FILM) uFCAP (FILM) uFCAP (FILM) uFCAP (FILM) uFPOWER RESISTOR WPOWER RESISTOR WPOWER RESISTOR WCHOKE 2 L1 300 UH 38 65.09 130.18CHOKE UHTRANSFORMER 1 TR1 400 38 23.01 23.01TRANSFORMERTRANSFORMERCONTACTORSCONTACTORSLOSSES WCONTROL 88.61PACKAGING 66.45OTHER (EXPLAIN) TOTAL 598.09
Table 4: DC-DC Converter Subsystem Costs
Page 22 of 40
2001 FUTURE ENERGY CHALLENGE
UNIVERSITY: Tesax A&M University
NAME OF MAIN CONTACT: Dr. Prasad Enjeti
PROJECT NAME: TAMU Fuel Cell Inverter (10kW)
DATE: 24-Aug-01
VOLT VOLT CUR CUR UNIT EXTENDEDDEVICE QTY DESIG UNIT MEASURE (Vpk) (Vrms) (Avg) (Arms) COST COSTDIODEDIODE - DUAL MODULEDIODE - DUAL MODULEIGBT 4 S1,2,3,4 600 35 8.42 33.68IGBTIGBTMOSFETCAP (ALUM) uFCAP (ALUM) uFCAP (FILM) 2 C4,5 18 uF 200 3.94 7.88CAP (FILM) uFPOWER RESISTOR WPOWER RESISTOR WCHOKE 2 L2,3 123 UH 42 52.81 105.63TRANSFORMERCONTACTORSCONTACTORSLOSSES WCONTROL 29.44PACKAGING 22.08
OTHER (EXPLAIN) TOTAL 198.69
Table 5: DC-AC Inverter Subsystem Costs
77..00 CCoonncclluussiioonnss
This report has discussed the design methodology and cost analysis for the 10kW Texas
A&M Fuel Cell Inverter System. The topology and control strategy for this design has been
adopted keeping in mind the specific objectives of the 2001 Future Energy Challenge Committee.
Keeping the cost of the product low and obtaining the best performance for the given cost have
been the most important objectives that were pursued throughout this design procedure.
However, we believe that with sophisticated manufacturing techniques available today in the
industry it is possible to further reduce the cost of the system.
Page 23 of 40
Appendix A
SCHEMATICS
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
YELLOWNCNCNCRED
GREEN
YELLOW
REDWHITEGREENNCCYAN
UC3825B
4 x 0.01ohm,75W each
1.01 1
Fig. A1: DC-DC CONVERTER - COMPLETE DESIGN SCHEMATIC
A
1 5Friday, August 31, 2001
Title
Size Document Number Rev
Date: Sheet of
- BUS V
+ BUS V
P15
P15A
P15A
P15A
R1050010W
Q254A200V
3
1
2
Q354A200V
3
1
2
Q454A200V
3
1
2R210
R310
R410
CN2
CN2
123456789101112131415
C44700uF100V
C34700uF100V
C710uF100Vdc
C6300uF100Vdc
C510uF100Vdc
C8300uF100Vdc
Q554A200V
31
2R510
R710
R810
C10150pF1000V
D240A300V
D440A300V
D340A300V
D615A1200V
C200.1uF1200V
L6A300uH25A
R856k7W
R9 56k
7W
C34500uF250V
C44500uF250V
D140A300V
THD1
OHD5R13-90M
1 2
R1147K
R1247K
CN1
1234
R2247K
PC1
HCPL-3120
1 87654
32
C220.1uF50V
J2
JUMPER
1 2
PC2
HCPL-3120
1 87654
32
C210.1uF50VR24
47K
L6A300uH25A
J3
JUMPER
1 2
10k
30k30k
4.8nFCT
30k
18k
R
42k120pF
10k
3k RT
100uF
0.1uF
INV1
NI2
EA OUT3
CLOCK4 VC 13
PGND 12
OUTA 11
GND 10
ILIM/SD 9
VREF 16
VCC 15
RT5
CT6
RAMP7
SS8
OUTB 14 0.1uF
Q154A200V
3
1
2R110
R610
Q654A200V
3
1
2
T21
3
42
5
68
7
Q754A200V
3
1
2
Q854A200V
3
1
2
J1
JUMPER
1 2
BUS FB
OH2
DC VREF
-BUS V
+BUS V
SD
OH2
BUS FB
P15N15
SD
A
A
B
B
C
C
D
D
E
E
5 5
4 4
3 3
2 2
1 1
Healthy +200V Indicator
Healthy -200V Indicator
Thermal Protection
Voltage Feedback
***Note: On/Off switchon faceplate.
***Note: Thermalswitch on DCBoost.
-Vbw
+Vbw
***Note: Reset pushbutton ison the faceplate.
Overvoltage Protection
48G
48V
+15V
FBG
SDOT
48V
48G
48G9V
+15V
ON(SW)RST
-200VN
+200V
+15VG15ONOVOT
+200VN
-200V
9V
GND
Power IN
Outputs
LCD
Switches
Voltage Feedback
Shut Down
9V forLCDDisplay
Doc 0
FIG. A2: DC-DC CONVERTER VOLTAGE FEEDBACK AND PROTECTION SCHEMATIC
A4
2 5Friday, August 31, 2001
Title
Size Document Number Rev
Date: Sheet of
+200V
-200V
-15V
+200V
-200V
-15V
+15V
+15V
+15V
+15V+15V
+15V
+15V
+15V
+15V
+15V
15V
R175k,1W
R21.2k
R31.2k
R475k, 1W
C1470pF
+
C2470pF
+ R6 10k
R5 10k
POT1 2k
R241.2kR23
510
R221.2k
R1710k,2W
R1810k, 2W
R1910k, 2W
R2010k, 2W
D3LED
D4LED
U1DLF347
+
-
12
1314
411
D6LED
R14 6.8k
U3
CD4023
1234567 8
91011121314
R1333k
U1CLF347
+
-
10
98
411
SPST SWITCH
R2610k
U1BLF347
+
-
5
67
411
U2LF356
+
-
3
26
7 14 5
R25330 ohm
R162.2k
R11 10k
D11N753
6.2V
R9 470kD2LED
C40.1uF
R10 10k
U1ALF347
+
-
3
21
411
R121.2k
CN3
4 PIN HEADER
1234
CN4
4 PIN HEADER
1234
CN6
4 PIN HEADER
1234
CN5
8 HEADER
12345678
R285101/2W
C40.1uF
+
CN2
6 PIN HEADER
123456
CN1
4 PIN HEADER
1234
U4
CD4011
1234567 8
91011121314
D5LED
OH2 90 deg C make
R211.5k
C3 470pF
+
R15 1k
R7 10K
POT1 2k
POT110k
R10 1k
D11N4733
5.1V
D71N747A3.6V
D81N753A6.2V
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
IGBT600V,35A
IGBT600V,35A
2.01 0
FIG. A3: INVERTER POWER CIRCUIT AND GATE CONTROL
A
3 5Friday, August 31, 2001
Title
Size Document Number Rev
Date: Sheet of
E9 RAILNEG
E10 RAILPOS
+15V
drnI
G+G -
SHUTDOWN
+ 15v
RET
C50.1uF50V
R1
101 2
R1310k
12
FR104
C1410uF50V
12
C70.1uF50V
12
FR104
FR104
C1210uF50V
+
U1
IR2110
VDD9
HIN10
SD11
LIN12
VSS13
HO 7
VB 6
Vs 5
VCC 3
COM 2
LO 1
J1
1 23 45 67 89 1011 1213 14
C90.22uF1600Vdc
C80.22uF1600Vdc
FR104
CR6FR104
C11uF50V
12
R1010k
12
C21uF50V
12
R4
101 2
Q2
Q1
SWT1Thermal switch 90C
G +
SHUTDOWN
G - OUTPUT TO FILTER
A
A
B
B
C
C
D
D
E
E
5 5
4 4
3 3
2 2
1 1
Voltage Sensor 2
Voltage Sensor 1
Current Sensor 1
Current Sensor 2
Optocouplers
2.02
FIG. A4: INVERTER VOLTAGE & CURRENT SENSING AND PROTECTION CIRCUITRY (1 OF 2)
Custom
4 5Friday, August 31, 2001
Title
Size Document Number Rev
Date: Sheet of
Gate Driver 1
Gate Driver 2
Gate Driver 3
Gate Driver 4
ISense2
ISense1
VSENSE1
VSENSE2
PWM3
PWM4
PWM1
PWM2
15V
15V3.3V
3.3V
-15V
-15V
-15V
+15V
-15V+15V
+15V
+15V
3.3V
3.3V
+15V-15V
-15V
-15V+15V+15V
3.3V
3.3V
3.3V
3.3V
-15V
+15V
+5VDSP
+5VDSP
+5VDSP
+5VDSP
+15V2
+15V2
+15V2
+15V2
-15V
+15V+15V
R1
470k
R2
470k
POT1 50k
C10.1uF35V
R6
470k
R7
470k
POT3 50kR8 10k
R9 10k D4
C30.1uF35V
C4 22p35V
D3
50k POT4
R12 10k
T1
LA 55-P
+ 1
- 3
M 2 OPAMP2
+
-
5
67
411OPAMP2
+
-
3
21
411
R13 10k
R14 10k
50k
POT5
ISOAMP1
AD202JN
+IN1 -IN3HI 19
LO 18
-VISO37+15DC 20
PWR RET 22+VISO36IN COM2
FB38
ISOAMP2
AD202JN
+IN1 -IN3HI 19
LO 18
-VISO37+15DC 20
PWR RET 22+VISO36IN COM2
FB38
D5
D6
R1582
T1
LA 55-P
+ 1
- 3
M 2OPAMP2
+
-
10
98
411
R17 10kOPAMP2
+
-
12
1314
411
R18 10k
POT6
50k
D7
D8
C2 22p35V
D1
50k POT2
D2R3 10k
R4 10k
U8A
74LS14
1 2
C90.1uF35V
R19390
ISO1
6N137
7
63
28
5
U8C
74LS14
5 6
R241k
C100.1uF35V
ISO3
6N137
7
63
28
5
ISO2
6N137
7
63
28
5
C70.1uF35V
C80.1uF35V
R201k
R21
390
U8B
74LS14
3 4
C6680p35V
R16 10k
R23390
OPAMP1+
-
10
98
411
R10 10k
R25
390
U8D
74LS14
9 8
ISO4
6N137
7
63
28
5
OPAMP1+
-
5
67
411
R5 10k
OPAMP1+
-
3
21
411
R16680
D0
C5680p35V
R1182
R221k
R261k
+3.3V
Vout1
Vout2
A
A
B
B
C
C
D
D
E
E
5 5
4 4
3 3
2 2
1 1
***Pins 3 and 4 connect to an external NOPB switch on theInverter Box interface. Pins 1 and 2 connect to an LED onthe Inverter Box interface for shutdown notification.
***There is only one SHUTDOWNsignal shared between bothinverter boards.
Doc 0
FIG. A5: INVERTER PROTECTION CIRCUITRY (2 OF 2)
A4
5 5Sunday, September 02, 2001
Title
Size Document Number Rev
Date: Sheet of
+15V
ISense1
ISense2
SHUTDOWN
+15V
Temperature2
Gate Driver 3
Gate Driver 2
Gate Driver 4SHUTDOWN
Temperature1
VSENSE1
VSENSE2
ISENSE1ISENSE2
PWM1PWM2PWM3PWM4
Current sensor1
Current sensor returnCurrent sensor2
Fuel Cell Ready
Gate Driver 1
Fuel cell input
SHUTDOWN
+15V
-15V
+15V
+15V
+15V
+15V
+15V
+15V
+15V
+15V2
+15V
D101N4148
D111N4148
R27 10k R28 10k
D12
1N4148
D91N4148
R31
10k
C12221
C11152
D131N4148
D141N4148
R33
10k
C13152
C14221
OPAMP6CLF347
+
-
10
98
411R37
10k
R4447k
J2
Inverter B Header
1 23 45 67 89 1011 1213 14
J1
Inverter A Header
1 23 45 67 89 1011 1213 14
R29 10kOPAMP6BLF347
+
-
5
67
411
R34
10k
R36
10k
R35 10k
C17104
JP3
DSP Header
12345678910
111213141516171819202122232425262728293031323334
OPAMP6ALF347
+
-
3
21
411
OPAMP6DLF347
+
-
12
1314
411R37
10k
R36
150 ohm
47 ohm
R3210k
C15221
POT50k
U?A
4071
1
23
R19390
ISO1
6N137
7
63
28
5
C70.1uF35V
C70.1uF35V
D131N4148
R2010k
D151N4148
POT50k
R3010k
D?
DIODE ZENERISO1
6N137
7
63
28
5
R19 390
U?B
4071
5
64
U?C
4071
8
910
R2010k
NOR1
MC14001BCP
1234567 8
910
121314
11
R43680
JP?
HEADER 4
1234
C70.1uF35V
ISO1
6N137
7
63
28
5
R192k
R2010k
1 2 3 4
A
B
C
D
4321
D
C
B
ATitle
Number RevisionSize
Letter
Date: 3-Sep-2001 Sheet of File: C:\Mark\ee405\doe_ieee\protel\doe_v2.ddb Drawn By:
pwm1pwm2pwm3pwm4
33V33V33V33V33V33V33V33V33V33V
GNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGND
33V
adc9
C1
6800pF
R110k
33V
R516 ohm
C2.33uF
5V
33V
ADC
VSS0 140
VSS0 125
VSS0 3
VSS0 94
VSS0 76
VSS0 66
VSS0 41
VSS0 128
VSS 85
VSS 49
VSS 28
Power
VDD29
ADCIN00112
ADCIN01110
ADCIN02107
ADCIN03105
ADCIN04103
ADCIN05102
ADCIN06100
ADCIN0799
ADCIN08113
ADCIN09111
ADCIN10 109
ADCIN11 108
ADCIN12 106
ADCIN13 104
ADCIN14 101
ADCIN15 98
VREFHI 115
VREFLO 114
VCCA 116
VSSA 117
VDD50
VDD86
VDD129
VDD04
VDD042
VDD067
VDD077
VDD095
VDD0141
U1A
DSP
D32
D43
D54
D65
D76
D87
D98
D109
D1110
D21
CS*
18
WE
*17
GND 14
VREF 12
VD
D11
D019
D120
AnalogOut 13
LD
AC
*16
PD*
15
U2TLV5619 / 296-1925-5
C3470pF
C40.1uF
rs
R210k
R310k
2
3 4
5 6
7 8
9 10
1
13 14 12 11
H3
Header / s2212-07
tms
tms
tdi
tdi
5V tdo
tdo
tck
tck
emu0 emu1
trst
trst
we
we
R610k
33V
iopc0
adc0adc1adc2adc3
adc8
TAMU Fuel Cell Inverter / DSP Layout
M. Yeary
pwm6pwm5iopc4
iopc5
cap1cap2adc10
adc11 SPISTE* 33
SPISOMI 32
SPISIMO 30
SPICLK 35SCIRXD26 SCITXD25 CANTX72 CANRX70CAN/SCI/SPI
XINT2 21XINT123
PDPINTA*7
RS*133External Interrupts, Clock
XTAL2124 XTAL1123Oscillator, PLL, Flash, Boot, Misc
EMU191 EMU090
BOOTEN*121 IOPF6131 VCCP(5) 58
PLLF2 10
PLLF 11
Emulation and test / JTAG
PKPINTB 137
CLKOUT 73
PLLV12
TCK135
TD1139
TRST*1
TMS236 TMS144
TD0142
TP1 60TP2 63BIO* 119
U1B
DSP
DS*87
IS*82
PS*84
R/W*92
W/R*19
RD*93 WE* 89STRB* 96READY 120MP/MC* 118ENA144 122VIS_OE 97Address, Data, Memory Control
A080
A178
A274
A371
A468
A564
A661
A757
A853
A951
A1048
A1145
A1243
A1339
A1434
A1531
D0 127
D1 130
D2 132
D3 134
D4 136
D5 138
D6 143
D7 5
D8 9
D9 13
cap1 83
cap2 79
cap3 75
pwm1 56
pwm2 54
pwm3 52
pwm4 47pwm544 pwm640 t1pmw16 t2pwm18 tdira14 tclkina37EVA
D15 27D14 24D13 22D12 20D11 17D10 15
PWM10 55
PWM11 46
PWM12 38
T3PWM 8
T4PWM 6
TDIRB 2
TCLKINB 126PWM959 PWM862 PWM765 CAP669 CAP581 CAP488EVB
U1C
DSP
iopa0
clkin
emu0emu1
DACout
2
3
1
J3
C30.1uF
5V 5V
5V
cc1
cc2
cc3
cc4
iopa1
2
3
1
J4
33V
R4
10k
2
3
1
J7
33V
R7
10k
33V
pdpa
L2Fbead
L3Fbead
2
3
1J8
TMS320LF2407, 144 pin device broken into its functional blocks
1 2 3 4 5 6
A
B
C
D
654321
D
C
B
A
Title
Number RevisionSize
B
Date: 3-Sep-2001 Sheet of File: C:\Mark\ee405\doe_ieee\protel\doe_v2.ddb Drawn By:
33V
GND1
EN*2
IN3
IN4 OUT 5
RESET* 8
OUT 6FB/NC 7
U4TPS7333 / 296-8066-5
rs
5V
C160.1uF
C17470pF
C180.1uF
C19470pF
cc2
C200.1uF
C21470pF
cc3
C220.1uF
C23470pF
cc4
cc1
2
1
J9jumper
R81.62k
33V
2
3 4
5 6
7 8
9 10
1
13 14 12 11
16
18
20
22
24
26
28
30
32
34
17
19
21
23
15
27 25
31
33
29
H4
Header
TAMU Fuel Cell Inverter / DSP Layout
M. Yeary
162738495
H5
a23303 / rs232header
c1+1
c1-3
c2+4
c2-5
T1out 14
VCC 16
v- 6v+ 2
R1in13
R2in8
VSS15
T2out 7
R2out 9R1out 12
T1in11
T2in10
U6
max232
C24
0.1uFC25
0.1uF
iopa0iopc0
C26
0.1uF
C27
0.1uF
5V
5VR10
4.7k
Vcc8
nc1 out 5
GND 4
U7
xc263C280.1uF
5VR13
33
5V
R121.62k
C290.1uF
NC1
A02
A13
A24
B0 18
B4 14
BE* 19VCC 20
A57
A68
A79
B1 17
B3 15B2 16
A35
A46
GND10
B7 11B6 12B5 13
U10
PI5C3245
iopa1clkin
5V
33V
D2LM4040AIM3-4.1
1A1
1B2
1Y3
2A4 4Y 11
VCC 14
4A 124B 13
2B5
2Y6
GND7
3B 10
3Y 83A 9
U12
74LCX08
L4Fbead
pwm1pwm2pwm3pwm4pwm5pwm6
DACout
cap1cap2iopc4iopc5
Text pdpa
decoupling caps
Page 31 of 40
Appendix B
SIMULATION RESULTS
Page 32 of 40
Simulation Results for the inverter system on 10kW load are presented here. A. DC-DC Converter Performance
Figure B1: Voltages of the DC-DC converter
Where, Vds1,Vds2 – Drain to Source voltages across the MOSFETs VDC – Output voltage of DC-DC converter
Figure B2: Currents of the DC-DC converter
where, IT1, IT2 – Current through the MOSFETs Iin – Input current to DC-DC converter
Page 33 of 40
Figure B3: Currents of the DC-DC converter (contd.)
where, I(D1) – Current through diode D1 Io+, Io- – Output currents of the DC-DC converter
Figure B4: Inverter output voltages and currents
where, Va,Vb – Phase-A and Phase-B output voltages Ia, Ib – Phase-A and Phase-B load currents
Page 34 of 40
Appendix C
UC3825B DATASHEET
UC1823A,B/1825A,BUC2823A,B/2825A,BUC3823A,B/3825A,B
DESCRIPTIONThe UC3823A & B and the UC3825A & B family of PWM control ICs areimproved versions of the standard UC3823 & UC3825 family. Performanceenhancements have been made to several of the circuit blocks. Error ampli-fier gain bandwidth product is 12MHz while input offset voltage is 2mV. Cur-rent limit threshold is guaranteed to a tolerance of 5%. Oscillator dischargecurrent is specified at 10mA for accurate dead time control. Frequency ac-curacy is improved to 6%. Startup supply current, typically 100µA, is idealfor off-line applications. The output drivers are redesigned to actively sinkcurrent during UVLO at no expense to the startup current specification. Inaddition each output is capable of 2A peak currents during transitions.
Functional improvements have also been implemented in this family. TheUC3825 shutdown comparator is now a high-speed overcurrent comparatorwith a threshold of 1.2V. The overcurrent comparator sets a latch that en-sures full discharge of the soft start capacitor before allowing a restart.While the fault latch is set, the outputs are in the low state. In the event ofcontinuous faults, the soft start capacitor is fully charged before dischargeto insure that the fault frequency does not exceed the designed soft startperiod. The UC3825 Clock pin has become CLK/LEB. This pin combinesthe functions of clock output and leading edge blanking adjustment and hasbeen buffered for easier interfacing.
(continued)
High Speed PWM ControllerFEATURES• Improved versions of the
UC3823/UC3825 PWMs
• Compatible with Voltage orCurrent-Mode Topologies
• Practical Operation at SwitchingFrequencies to 1MHz
• 50ns Propagation Delay to Output
• High Current Dual Totem PoleOutputs (2A Peak)
• Trimmed Oscillator Discharge Current
• Low 100µA Startup Current
• Pulse-by-Pulse Current LimitingComparator
• Latched Overcurrent Comparator WithFull Cycle Restart
SLUS334A - AUGUST 1995 - REVISED NOVEMBER 2000
BLOCK DIAGRAM
UDG-95101* Note: 1823A,B Version Toggles Q and Q are always low
applicationINFOavailable
2
UC1823A,B/1825A,BUC2823A,B/2825A,BUC3823A,B/3825A,B
DIL-16, SOIC-16, (Top View)J or N Package; DW Package
CONNECTION DIAGRAMS
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for TA = –55°C to +125°C forthe UC1823A,B and UC1825A,B; –40°C to +85°C for the UC2823A,B and UC2825A,B; 0°C to +70°C for the UC3823A,B andUC3825A,B; RT = 3.65k, CT = 1nF, VCC = 12V, TA = TJ.
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Reference Section
Output Voltage TJ = 25°C, Io = 1mA 5.05 5.1 5.15 V
Line Regulation 12 < VCC < 20V 2 15 mV
Load Regulation 1mA < IO < 10mA 5 20 mV
Total Output Variation Line, Load, Temp 5.03 5.17 V
Temperature Stability TMIN < TA < TMAX (Note 1) 0.2 0.4 mV/°C
Output Noise Voltage 10Hz < f < 10kHz (Note 1) 50 µVRMS
Long Term Stability TJ = 125°C, 1000 hours (Note 1) 5 25 mV
Short Circuit Current VREF = 0V 30 60 90 mA
The UC3825A,B has dual alternating outputs and thesame pin configuration of the UC3825. The UC3823A,Boutputs operate in phase with duty cycles from zero toless than 100%. The pin configuration of the UC3823A,Bis the same as the UC3823 except pin 11 is now an out-put pin instead of the reference pin to the current limitcomparator. “A” version parts have UVLO thresholdsidentical to the original UC3823/25. The “B” versionshave UVLO thresholds of 16 and 10V, intended for easeof use in off-line applications.
Consult Application Note U-128 for detailed technicaland applications information. Contact the factory for fur-ther packaging and availability information.
DESCRIPTION (cont.) ABSOLUTE MAXIMUM RATINGSSupply Voltage (VC, VCC) . . . . . . . . . . . . . . . . . . . . . . . . . 22VOutput Current, Source or Sink (Pins OUTA, OUTB)
DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5APulse (0.5µs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2A
Power Ground (PGND). . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.2VAnalog Inputs
(INV, NI, RAMP). . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 7V(ILIM, SS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 6V
Clock Output Current (CLK/LEB) . . . . . . . . . . . . . . . . . . . –5mAError Amplifier Output Current (EAOUT) . . . . . . . . . . . . . . 5mASoft Start Sink Current (SS) . . . . . . . . . . . . . . . . . . . . . . . 20mAOscillator Charging Current (RT) . . . . . . . . . . . . . . . . . . . –5mAPower Dissipation at TA = 60°C . . . . . . . . . . . . . . . . . . . . . . 1WStorage Temperature Range . . . . . . . . . . . . . –65°C to +150°CJunction Temperature. . . . . . . . . . . . . . . . . . . –55°C to +150°CLead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . . . 300°C
All currents are positive into, negative out of the specified ter-minal. Consult Packaging Section of Databook for thermal limi-tations and considerations of packages.
PLCC-20, LCC-20, (Top View)Q, L Packages
Device UVLO Dmax
UC3823A 9.2V/8.4V < 100%
UC3823B 16V/10V < 100%
UC3825A 9.2V/8.4V < 50%
UC3825B 16V/10V < 50%
3
UC1823A,B/1825A,BUC2823A,B/2825A,BUC3823A,B/3825A,B
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for TA = –55°C to +125°C forthe UC1823A,B and UC1825A,B; –40°C to +85°C for the UC2823A,B and UC2825A,B; 0°C to +70°C for the UC3823A,B andUC3825A,B; RT = 3.65k, CT = 1nF, VCC = 12V, TA = TJ.
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Oscillator Section
Initial Accuracy TJ = 25°C (Note 1) 375 400 425 kHz
Total Variation Line, Temperature (Note 1) 350 450 kHz
Voltage Stability 12V < VCC < 20V 1 %
Temperature Stability TMIN < TA < TMAX (Note 1) 5 %
Initial Accuracy RT = 6.6k, CT = 220pF, TA = 25°C (Note 1) 0.9 1 1.1 MHz
Total Variation RT = 6.6k, CT = 220pF (Note 1) 0.85 1.15 MHz
Clock Out High 3.7 4 V
Clock Out Low 0 0.2 V
Ramp Peak 2.6 2.8 3 V
Ramp Valley 0.7 1 1.25 V
Ramp Valley to Peak 1.6 1.8 2 V
Oscillator Discharge Current RT = Open, VCT = 2V 9 10 11 mA
Error Amplifier Section
Input Offset Voltage 2 10 mV
Input Bias Current 0.6 3 µA
Input Offset Current 0.1 1 µA
Open Loop Gain 1V < VO < 4V 60 95 dB
CMRR 1.5V < VCM < 5.5V 75 95 dB
PSRR 12V < VCC < 20V 85 110 dB
Output Sink Current VEAOUT = 1V 1 2.5 mA
Output Source Current VEAOUT = 4V –0.5 –1.3 mA
Output High Voltage IEAOUT = –0.5mA 4.5 4.7 5 V
Output Low Voltage IEAOUT = 1mA 0 0.5 1 V
Gain Bandwidth Product F = 200kHz 6 12 MHz
Slew Rate (Note 1) 6 9 V/µs
PWM Comparator
RAMP Bias Current VRAMP = 0V –1 –8 µA
Minimum Duty Cycle 0 %
Maximum Duty Cycle 85 %
Leading Edge Blanking R = 2k, C = 470pF 300 375 450 ns
LEB Resistor VCLK/LEB = 3V 8.5 10 11.5 kohm
EAOUT Zero D.C. Threshold VRAMP = 0V 1.1 1.25 1.4 V
Delay to Output VEAOUT = 2.1V, VRAMP = 0 to 2V Step (Note 1) 50 80 ns
Current Limit/Start Sequence/Fault Section
Soft Start Charge Current VSS = 2.5V 8 14 20 µA
Full Soft Start Threshold 4.3 5 V
Restart Discharge Current VSS = 2.5V 100 250 350 µA
Restart Threshold 0.3 0.5 V
ILIM Bias Current 0 < VILIM < 2V 15 µA
Current Limit Threshold 0.95 1 1.05 V
4
UC1823A,B/1825A,BUC2823A,B/2825A,BUC3823A,B/3825A,B
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for TA = –55°C to +125°C forthe UC1823A,B and UC1825A,B; –40°C to +85°C for the UC2823A,B and UC2825A,B; 0°C to +70°C for the UC3823A,B andUC3825A,B; RT = 3.65k, CT = 1nF, VCC = 12V, TA = TJ.
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Current Limit/Start Sequence/Fault Section (cont.)
Over Current Threshold 1.14 1.2 1.26 V
ILIM Delay to Output VILIM = 0 to 2V Step (Note 1) 50 80 ns
Output Section
Output Low Saturation IOUT = 20mA 0.25 0.4 V
IOUT = 200mA 1.2 2.2 V
Output High Saturation IOUT = 20mA 1.9 2.9 V
IOUT = 200mA 2 3 V
UVLO Output Low Saturation IO = 20mA 0.8 1.2 V
Rise/Fall Time CL = 1nF (Note 1) 20 45 ns
UnderVoltage Lockout
Start Threshold UCX823B and X825B only 16 17 V
Stop Threshold UCX823B and X825B only 9 10 V
UVLO Hysteresis UCX823B and X825B only 5 6 7 V
Start Threshold UCX823A and X825A only 8.4 9.2 9.6 V
UVLO Hysteresis UCX823A and X825A only 0.4 0.8 1.2 V
Supply Current
Startup Current VC = VCC = VTH(start) –0.5V 100 300 µA
Icc 28 36 mA
Note 1:Guaranteed by design. Not 100% tested in production.
OSCILLATOR
The UC3823A,B/3825A,B oscillator is a saw tooth. Therising edge is governed by a current controlled by the RTpin and value of capacitance at the CT pin. The fallingedge of the sawtooth sets dead time for the outputs. Se-lection of RT should be done first, based on desiredmaximum duty cycle. CT can then be chosen based ondesired frequency, RT, and DMAX. The design equationsare:
( )( )RTV
mA DMAX
=3
10 1–
( )( )CT
D
RT FMAX=
••
16.
Recommended values for RT range from 1k to 100k.Control of DMAX less than 70% is not recommended.
Oscillator
APPLICATIONS INFORMATION
UDG-95102
Page 39 of 40
Appendix D
COST INFORMATION ON TEXAS INSTRUMENTS TMS320LF24X DSP
Texas A&M University
2001 Future Energy Design Team Final Report
Texas A&M University Fuel Cell Inverter
Faculty Advisors
Dr. Prasad Enjeti Dr. Mark Yeary Dr. Jo Howze
Dr. Charles Culp
Texas A&M University, College Station, Texas June 15, 2001
ii
TAMU Fuel Cell Inverter Development Team
Student Members
Oscar Montero Samsung Kim
Rajesh Gopinath Eugene Song Randall Jones Mike Spence Gary Tobola Phillip Briggs
David Leschber Matthew Webster
Lori Dalton Douglas Becker
Justin Busse
Nick Denniston Matt Campbell Jared Machala Wes Weibel
Cody Sicking Nick Denniston
Cory Cress Andy Hale
Jon Burghardt Mark Arldt
Phillip Coleman David Payne
Steven Campbell
iii
Faculty Advisors ____________________________________ ___________________________________ Dr. Prasad Enjeti Dr. Mark Yeary Department of Electrical Engineering Department of Electrical Engineering e-mail: [email protected] e-mail: [email protected] _______________________________________ ______________________________________ Dr. Jo Howze Dr. Charles Culp Department of Electrical Engineering Department of Mechanical Engineering e-mail: [email protected] e-mail: [email protected]
iv
Report Authors ___________________________________ ___________________________________ Rajesh Gopinath Matthew Webster Department of Electrical Engineering Department of Electrical Engineering ______________________________________ ______________________________________ Phillip Briggs Douglas Becker Department of Computer Engineering Department of Chemical Engineering ____________________________________ ___________________________________ Steven Campbell Jon Burghardt Department of Electrical Engineering Department of Electrical Engineering ____________________________________ ___________________________________ Samsung Kim Chiranjib Mukherjee Department of Electrical Engineering Department of Electrical Engineering ___________________________________ Justin Busse Department of Electrical Engineering
v
Table of Contents
List of Figures ...........................................................................................................................vii
List of Tables ............................................................................................................................viii
1. Summary..................................................................................................................................1
2. Introduction.............................................................................................................................2
3. Design Rational and Feature Description .......................................................................3
3.1 Fuel Cell Rational and Requirements .........................................................................3 3.2 Inverter Application for a Fuel Cell..............................................................................4 3.3 TAMU Fuel Cell Inverter..................................................................................................6 3.4 DC-DC Converter..............................................................................................................7
3.4.1 Description and Approach......................................................................................7 3.4.2 DC-DC Converter Control Mechanism (Analog) .............................................10 3.4.3 DC-DC Converter Feedback System..................................................................11 3.4.4 DC-DC Converter Protection Circuitry ..............................................................12 3.4.5 Filtering Process (Noise Issues) .........................................................................13 3.4.6 DC-DC Converter Control Signal Conditioning...............................................13 3.4.7 DC-DC Converter DC- Link Design.....................................................................14 3.4.8 DC-DC Converter Design For The 10kW TAMU Fuel Cell Inverter System................................................................................................................................................14 3.4.9 DC-DC Converter Specifications.........................................................................14 3.4.10 Design of the Control Circuit for the DC-DC Converter..............................15
3.5 DC-AC Inverter Design..................................................................................................17 3.5.1 Inverter Design Procedure for the 10kW TAMU Fuel Cell Inverter System................................................................................................................................................18 3.5.2 DC-AC Inverter Subsystem Control ...................................................................20 3.5.3 Voltage Feedback....................................................................................................21 3.5.4 TAMU Fuel Cell Inverter Closed Loop Control Approach ............................22 3.5.5 Over Current Protection & Over Temperature Protection for DC-AC .......25 3.5.6 Output Filtering........................................................................................................25 3.5.7 DC-AC Inverter Output Filter Design Procedure.............................................26 3.5.8 Non-Linear Load ......................................................................................................27 3.5.9 Output Filter Design Example ..............................................................................28 3.5.10 Test Results ............................................................................................................29
3.6 Output: Monitoring and Computer Interface Via RS-232.....................................32 3.6.1 Transfer Protocol.....................................................................................................33 3.6.2 Software Functionality ...........................................................................................34 3.6.3 Testing, Implementation, and Analysis .............................................................35
4. Cost Evaluation ....................................................................................................................36
vi
4.1 Tracking Chart & Budget..............................................................................................36 4.2 DC-DC Converter Costs................................................................................................40 4.3 DC-AC Inverter Costs....................................................................................................41
5. Demonstration of Operational success of the 1.5kW Prototype ............................42
Design of the Battery Backup System: ...........................................................................44
6. Responsibility Matrix & Organizational Approach .....................................................46
6.1 Institutional Commitment and Sources of Added Support ................................47 6.2 Impact on Undergraduate Education........................................................................47
7. Nomenclature .......................................................................................................................50
8. List of Acronyms .................................................................................................................51
9. Bibliography..........................................................................................................................52
10. References ..........................................................................................................................53
11. Appendices .........................................................................................................................54
Appendix A: Schematics for the TAMU Inverter ..........................................................55 Appendix B: Schematics for DSP Control .....................................................................60
Appendix C: DSP code (All .c and .h files) ...................................................................64
vii
LLiisstt ooff FFiigguurreess Figure 1: Block Diagram of the TAMU Fuel Cell Inverter ......................................................... 6
Figure 2: TAMU Fuel Cell Inverter System................................................................................. 7
Figure 3: Push-Pull Converter..................................................................................................... 8
Figure 4: Motorola SG3525A Control chip for the TAMU DC-DC Inverter............................ 10
Figure 5 : Schematic for the Feedback Board......................................................................... 11
Figure 6: Phase Compensation Circuit.................................................................................... 16
Figure 7: Circuit Diagram of the TAMU Inverter and Output Filter....................................... 17
Figure 8: Equivalent Circuit for Single-Phase Inverter Output Filter Stage and Load....... 22
Figure 9: Control block diagram. .............................................................................................. 23
Figure 10: Simulation Result for Linear Load ......................................................................... 24
Figure 11: Simulation result for nonlinear load. ..................................................................... 24
Figure 12: Topology of the DC-AC Output Filter..................................................................... 26
Figure 13: Equivalent Circuit for a Non-Linear Load.............................................................. 27
Figure 14: DC Input into to the DC-AC Inverter and a Single Phase AC Output................. 30
Figure 15: Two PWM Gating Signals Leading to One IGBT................................................... 31
Figure 16: RS-232 Operation..................................................................................................... 32
Figure 17: Display of RS-232 ..................................................................................................... 35
Figure 18: Quantity and Power Schematic and Rating Take-Off Sheet............................... 39
Figure 19: DC-DC Test Results ................................................................................................. 42
Figure 20: DC Input into to the DC-AC Inverter and a Single Phase AC Output................. 43
Figure 21: Two PWM Gating Signals Leading to One IGBT................................................... 44
Figure 22: DC-DC Boost Converter .......................................................................................... 45
Figure 23 Single Phase DC-AC inverter................................................................................... 46
Figure 24: Design Development Teams ................................................................................... 48
viii
LLiisstt ooff TTaabblleess Table 1: 10kW Design Results and Ratings............................................................................. 17
Table 2: Voltage Rating of the IGBTs...................................................................................... 20
Table 3: RS-232 Transfer Protocol Bit Identification.............................................................. 33
Table 4: Budget for the TAMU Fuel Cell Inverter Development............................................ 37
Table 5: DC-DC Converter Costs .............................................................................................. 40
Table 6: DC-AC Inverter Costs .................................................................................................. 41
Table 7: Organizational Gantt Chart......................................................................................... 49
1
11.. SSuummmmaarryy
This report describes the development of a low cost fuel cell inverter with DSP control to meet
the 2001 Future Energy Challenge competition. A one-year project under EE-405 Electrical Design
Laboratory course to address the 2001 Future Energy Challenge was launched with undergraduate student
participation. The Texas A&M team was comprised of competent senior undergraduate students along
with faculty advisors.
The proposal outlines the technical approach to achieve the objectives proposed by the 2001
Future Energy Challenge organizing committee. The Texas A&M team believes it has developed an
efficient and effective inverter system. The team has developed a unique digital signal processor (DSP)
control mechanism for DC-AC control, an efficient push pull topology DC-DC converter and a rigorous
cost reduction approach for the 2001 Energy challenge inverter project.
A low cost Texas Instruments, TMS320F2407, DSP provides the control scheme for the DC-AC
inverter system. The DSP provides closed loop control for the DC-AC converter allowing easy
compliance to the total harmonic distortion (THD) specification of less than 5%. The DSP allows
convenient communication between the fuel cell and the inverter, and, through the RS232 port, allows
communication of information to data collection software or to the Internet. Since the DSP is
programmable, control algorithms are easily updated as opposed to traditional hard wire devices.
The Texas A&M team provides a rigorous cost savings approach by reducing the number of
metal-oxide-semiconductor-field-effect transistors (MOSFETS) and insulated gate bipolar transistors
(IGBT) in the design. Incorporating many small-power rated resistors and fewer power resistors
enhances cost savings. The push-pull DC-DC converter topology provides isolation for safety, suitable
boosting of the fuel cell voltage to 400 volts, reduced cost and reduced size of the energy storage
elements in the converter.
2
22.. IInnttrroodduuccttiioonn
Distributed power systems including fuel cells, microturbines, flywheels and wind turbines offer
a potential increase in energy efficiency by localizing power generation and eliminating the need for line
transmission of electricity [1]. Even though these environmentally friendly, highly efficient energy
resources are promising, several barriers must be overcome. A Department of Energy (DOE) study,
Making Connections, completed in May 2000 addressed the technical, business practice, and regulatory
barriers affecting distributed power systems. Since the barriers have been identified, rapid progress has
been made in removing or overcoming those barriers.
The Future Energy Challenge 2001 has identified the fuel cell as a distributed energy technology
that will soon be affecting the energy market. One of the main barriers for fuel cell technology is the cost
of manufacturing and the cost of power conditioning and control. Currently, fuel cell production costs are
decreasing, and have nearly achieved energy costs that are competitive with local utility rates. To further
assist the reduction of cost, the price of the power-conditioning portion of the fuel cell system must also
decrease, while at the same time increasing efficiency, reliability, and power quality. Lower cost will
enable the fuel cell systems to achieve a production cost at a more competitive rate than that offered by
many local utility companies, thus triggering rapid penetration into the utility market.
The 2001 Future Energy Challenge has resolved that one of the main components in the power
conditioning system is the inversion of direct current (DC) power from the fuel cell to consumer usable
alternating current (AC). The challenge requires the inverter design to be small, efficient, environmentally
compatible and low cost. A low cost inverter approach will help enable small-scale fuel cell system
commercialization and will encourage the development of distributed power systems. The 2001 Energy
Challenge invited participants to design and develop a low cost fuel cell inverter system that will perform
to at least the following specifications.
• Reduce the manufacturing cost to less than $500 for a 10 kW unit
• Achieve minimum efficiency and size and weight requirements
3
• Maintain acceptability in the areas of performance, reliability and safety
33.. DDeessiiggnn RRaattiioonnaall aanndd FFeeaattuurree DDeessccrriippttiioonn
3.1 Fuel Cell Rational and Requirements
Fuel Cells for distributed power have many advantages. Environmental acceptability, efficiency,
distributed capacity; fuel flexibility and cogeneration are reasons why the fuel cell should be promoted as
the next generation of power. The following is a list of advantages of fuel cells:
• Environmental Acceptability - Because fuel cells are so efficient, CO2 emissions are reduced
for a given power output. Fuel cell power plants are projected to decrease CO2 emissions by a significant
amount in the next few years. The fuel cell is quiet, emitting only 60 decibels at 100 feet. Emissions of
SOx and NOx are 0.003 and 0.0004 pounds/megawatt-hour respectively. Fuel cells theoretically can be
designed as water self-sufficient. Since fuel cell exhaust is primarily water and CO2 natural gas fuel cell
power plants have a blanket exemption from regulations in California's South Coast Air Quality
Management District. These emission restrictions are possibly the strictest in the nation.
• Efficiency - Dependent on type and design, the fuel cells direct electric energy efficiency
ranges from 40 to 60 percent low heating value (LHV). The fuel cell operates at near constant efficiency,
independent of size and load. Fuel cell efficiency is not limited by the Carnot Cycle. For the fuel cell/gas
turbine systems, electrical conversion efficiencies are expected to achieve over 70 percent (LHV). When
by-product heat is utilized, the total energy efficiency of the fuel cell systems approach 85 percent.
• Distributed Capacity - Distributed generation reduces capital investment and improves the overall
conversion efficiency of fuel to end use electricity by reducing transmission losses. In high growth, or
remotely located load demands, distributed generation can reduce transmission and distribution problems
by reducing the need for new capacity or siting new lines. Presently, 8-10 percent of the generated
electrical power is lost between the generating station and the end user. Distributed generation will result
4
in many smaller units distributed throughout the United States. Many smaller units are statistically more
reliable since the probability of all distributed units failing at once is negligible.
• Permitting - Permitting and licensing schedules are short due to the ease in siting. In fact, natural
gas fuel cell power plants have been exempt from many of California's environmental regulations.
• Modularity - The fuel cell is inherently modular. The fuel cell power plant can be configured in a
wide range of electrical outputs, ranging from a nominal 0.025W to greater than 50-megawatt (MW) for
the natural gas fuel cell to greater than 100-MW for the coal gas fuel cell.
• Fuel Flexibility - The primary fuel source for the fuel cell is hydrogen, which can be obtained from
natural gas, coal-gas, methanol, landfill gas, and other fuels containing hydrocarbons. This fuel flexibility
means that power generation can be assured even when a primary fuel source is unavailable.
• Cogeneration Capability - High-quality heat is available for cogeneration, heating, and cooling.
Fuel cell exhaust heat is suitable for use in residential, commercial, and industrial cogeneration
applications.
3.2 Inverter Application for a Fuel Cell In order to optimize the inverter design it is important to understand the dynamics of the fuel cell. In
general, fuel cells produce a rectified voltage from an electrochemical reaction between a hydrogen-rich
fuel gas and an oxidant (air or oxygen). The principal by-products are water, carbon dioxide, and heat.
Fuel cells are similar to batteries in that both produce a DC voltage by using an electrochemical process.
Two electrodes separated by an electrolyte make up an anode and a cathode pair called a cell. Groups of
cells are called stacks and produce useable voltage and power output. Unlike batteries, however, fuel cells
do not release stored energy; instead they convert energy from hydrogen-rich fuel directly into electricity.
Fuel cells operate as long as they are supplied with fuel. Further, fuel cells have a large time constant
(several seconds) to respond to an increase or decrease in power output. In view of this, a stand-alone fuel
5
cell power system requires some amount of battery backup to accommodate fluctuating electric loads.
TAMU Fuel Cell inverter incorporates this feature and is detailed in later parts of this report.
The inverter and the fuel cell have some unique interdependencies. The inverter and the fuel cell
must work together to produce AC power and therefore must communicate with each other. For the 2001
Future Energy Challenge, four basic controls were required: A digital, 0-5 volt, on/off request from
inverter to fuel cell, a 0-5V analog signal to the fuel cell requesting power, (5V corresponds to 1500W in
2001 Challenge), a 0-5 volt, analog output proportional to the power available and a digital, ready/trip, 0-
5 volt signal, and a ground.
The amount of energy a fuel cell can produce is dependent on the total potential of the stack and
the current demanded from the stack. The fuel cell will only provide current in the amount available from
the total chemical reaction within the fuel cell stack. This reaction is dependent on the quantity of fuel
and oxidant available to the fuel cell stack. In general, the fuel cell stack must have the fuel and oxidant
available prior to any load increase. The fuel cell controller will control the high fuel utilization and the
low fuel utilization limits. This leading indicator characteristic required by the fuel/oxidant flows
requires a signal of load increase prior to the fuel cell actually seeing the load increase. A decrease in
fuel/oxidant flows is not as critical and can be reduced directly as load reduces. A digital, 0-5 volt, on/off
request from inverter to fuel cell will tell the fuel cell to turn on or off. The TAMU fuel cell inverter
generates a 0-5V signal to the fuel cell requesting power from a minimum condition (idle) to a maximum
level. A 0-5 volt, “power-available”, analog signal from fuel cell to the inverter, as an indicator, is
supplied to the DSP.
The fuel cell must not exceed its maximum allowable limits of heat and load. In the case of over
heating or short circuit seen by to fuel cell a digital, ready/trip, 0-5 volt signal from fuel cell to Inverter
will tell the inverter if the fuel cell is ready. Since the fuel cell response to an increase in power is large
(several seconds), the TAMU fuel cell inverter incorporates battery backup system for sudden load
increases at the output. This feature is further detailed in Section 5.
6
3.3 TAMU Fuel Cell Inverter Figure 1 shows the block diagram for the TAMU fuel cell inverter. In general an inverter system
consists of a DC-DC boost circuit, a DC-AC inverter circuit and a filter. This section will briefly describe
how the boost circuit works, how an inverter creates an AC output from a DC source, what types of
control methods are employed and discuss basic filtering concepts.
DSPTMS 320C2407
Load
Fuel CellEnergySource
+-
+
-48V
Vo*
io
High FrequencyDC-DC
Converter
InverterDC-link &BatteryBackup
OutputFilter
SG3525A
120V/240V,60 Hz
AC output
Figure 1: Block Diagram of the TAMU Fuel Cell Inverter
The DC input from the fuel cell (48 VDC nominal, +50%, -12.5%) is first converted to a regulated
400 VDC using a high frequency DC-DC converter. The DC-DC conversion stage consists of a high-
frequency transformer. Isolated primarily for safety, system protection, and to meet the stringent FCC
Class-A standards. The 400V DC-DC converter output is converted to 120V/240V, 50/60 Hz, single -
phase AC by means of a pulse width modulation (PWM) driven IGBT, inverter stage. An output-LC
filter stage is employed to produce a low THD-AC waveform. Low loss, high switching frequency
MOSFET and IGBT components have been employed to achieve a higher efficiency, lower size and
volume of the fuel cell inverter system. The circuit topology of the TAMU inverter system is shown in
Figure 2 below.
7
42-72V DC48V nom.
48VDC / 400VDC, 40KHz PUSH PULL CONVERTER
+ -
FUEL CELL120/240V , 60 HzIin
C
T+
T-
1:5 L
L
VDC
+
-
C
C
Lb
Lb
VC+
VC -
TA+
TA -
TB+
TB -
LF
CF
LF
CF
ia
ib
A
B
N
Vb
Va
120V, 60Hz
240V, 60Hz
120V/240V, 20kHz PWM INVERTER
AC Output
Vin
D1 D3
D4 D2
N1
N1
N2
N2
IDC
Battery Backup
Vbatt
Vbatt
Figure 2: TAMU Fuel Cell Inverter System
DC-DC converter and inverter topologies were designed to achieve ease of manufacturing and
facilitate production in large volume. Another unique aspect of the design is the use of the
TMS320C2407 DSP to control the inverter. The DSP reduces printed circuit board layout complexity.
Readily programmable, the DSP adds flexibility to implement various control aspects by means of
software. In addition, the DSP incorporates imbedded intelligence into the design.
3.4 DC-DC Converter 3.4.1 Description and Approach
The TAMU fuel cell inverter employs a push-pull type DC-DC converter to suitably boost the
fuel cell voltage from 48V to 400V. Figure 3 shows the topology of the push pull DC-DC converter.
The push-pull, full bridge and flyback converters belong to the family of isolated buck converters.
This family of converters may be used in conjunction with a high frequency transformer to boost the
output voltage with the additional advantage of providing isolation between the input and output stages.
Isolation of the input and output stages provide safety of personnel accessing the output terminals and
enhance short circuit protection for the inverter. The DC-DC converter operates at high switching
frequency (40 kHz), which produces high frequency AC across the isolation transformer. The secondary
output of the transformer is rectified and filtered to produce 400VDC. The design is rated for 10 kW and
8
consists of parallel-connected MOSFETs, a full-bridge rectifier, a Motorola SG3525A control chip for
feedback control, snubber circuitry, a high frequency transformer, a coupled inductor and bulk capacitors.
The output voltage is regulated by means of feedback control employing a low cost Motorola
SG3525A PWM controller. The push-pull converter is shown in Figure 3 below.
Figure 3: Push-Pull Converter
The push-pull converter consists of two forward converters driven by anti-phase inputs. The two
diodes D1 and D2 in the secondary of the transformers act as both forward and flywheel diodes. Ideally,
conduction times of T+ and T- are equal and the transformer is driven symmetrically. The primary side
conduction losses are lower since at any given instant only one transistor is connected in series with the
DC source. Since in the full bridge push-pull converter, both the halves of the secondary winding
conduct, the turn ratio (N2/N1) can be minimized, reducing the transistor currents.
The transistors T+ and T- are switched alternately with a pulse width modulated signal to produce
a high frequency AC at the input of the transformer. A center-tapped secondary is used. The neutral of
the center-tapped secondary is connected to the center point of the bulk capacitor. When T+ is on, D1
and D2 conduct whereas D3 and D4 are reverse biased. This results in voltage
ONDL ttVVNN
v <<−= 012
2 0 (1)
where
T+
T-
PWMCONTROL
N1
N1
N2
N2
D1
D3 D2
D4 C
L
L
C
VO
RL
Vin +
-
1:K>Iin
>IO
<IT
>ID
9
Lv - inductor voltage
1N - primary turns
2N -secondary turns
DV -input voltage
oV - dc output voltage
t - time
and the inductor current increases linearly. During the interval ∆ when both the switches are off, the
current splits equally between the secondary half windings and v0= 0.
∆+<<−= ONONL tttVv 0
The next half cycle consists of tON (during which T- is on) and the interval ∆. The waveforms
repeat with a period of ½ Ts
sON Tt2
1=∆+ (2)
From the above equations,
5.0012
40 <<= DDNN
V
V
D (3)
where D = tON/Ts is the duty ratio of the switches T+ and T- and has the maximum value of 0.5.
The duty ratio D through the controller regulates the output voltage V0. An efficient control scheme will
eliminate the effect of disturbances, i.e. reject the input power supply variations and transient load
changes.
A challenge that arises with the push-pull topology is that the transformer core may saturate if the
characteristics of the forward-voltage drop and conduction times of the transistors are not precisely
matched. Small imbalances can cause the DC component of voltage applied to the transformer-primary to
be nonzero. Consequently, during every switching period, there is a net increase in the magnetizing
10
current. If this imbalance continues, then the magnetizing current can eventually become large enough to
saturate the transformer. Core saturation results in rapid thermal runaway and destruction of one of the
transistors. To ensure that there is no significant imbalance between the two switch currents a coupled
inductor is employed on the secondary of the transformer. The coupled inductor balances the currents in
the two halves of the center-tapped transformer. Additionally, the choke filters out the switching
frequency components off the DC output current and balances the power output of each inverter phase,
(which are specified to be capable of being loaded independently), and helps generate a clean 400VDC
voltage for the inverters.
3.4.2 DC-DC Converter Control Mechanism (Analog)
A low cost Motorola SG3525A Pulse Width Modulator controller is used for the control of the
DC-DC converter. The SG3525A is particularly suited for the push-pull converter application because it
has two output terminals. The two output terminals work perfectly with the two transistors used in this
converter design. The block diagram of the Motorola SG3525A is shown below in Figure 4.
Figure 4: Motorola SG3525A Control chip for the TAMU DC-DC Inverter
11
The Motorola SG3525A provides this design with other features that enhance control and safety.
The SG3525A provides for an input under-voltage lockout that automatically shuts off the chip in case of
low voltage. The modulator has a soft start capability, which allows it to be protected from capacitor
inrush currents.
3.4.3 DC-DC Converter Feedback System
The feedback board is a voltage divider that scales the 400V output to a level that can be
managed by the pulse width modulation (PWM) controller. Since the ground is at the midpoint of the
400V, the output voltage appears as a +200V signal and a -200V signal. Both of these voltages are scaled
down to a few volts by a resistive divider. The parallel combination of the resistors at the +200V divider
is equal to the parallel combination of the resistors at the -200V level. The schematic for the feedback
board is shown below in Figure 5.
Figure 5 : Schematic for the Feedback Board
A small positive signal and a small negative signal are produced. The signals are the same
polarity in order that they can be added together. The added signal is buffered from the resistive divider
so other circuit resistances do not affect the scaling factor. This is achieved by using a unity-gain op-amp
P15
N15
BUS FB
+BUS V
- BUS V
TA75074PU9A
+
-
3
21
411
TA75074PU9B
+
-
5
67
411
TA75074PU9C
+
-
10
98
411
200 K
R2
200 K
R3
200 K
R4 R15
39 K
R12
39 K
R135.1 K
R147.5 K
C23470 pF50V
C34470pF50V
C70.1uF50V
C80.1uF50V
R18
22 K
R19
22 K
R225.2 K
R2022 K
R21
16 K
R17
16 K
R16
16 K
200 K
R1
12
for the positive signal and an inverting unity-gain op-amp for the negative signal. These signals are
mixed and fed into a non-inverting op-amp with a variable gain such that the controller sees a single
ended 6V signal at the feedback input when the output voltage is 400V.
3.4.4 DC-DC Converter Protection Circuitry
The TAMU DC-DC converter provides the capability to detect any over-currents, over-
temperatures or shut down conditions in the circuit to prevent damage to the DC/DC boost stage. A user
signaled shutdown and fuel cell signaled shut down are provided for as well.
Op-amp comparators and sensors are used to monitor operation and provide a shutdown signal to
the controller. The protection circuit uses a reference voltage for each signal to set the maximum limit
and a signal representing the measured quantity. Whenever any of the measured signals exceeds their
reference, the controller SD (shutdown) pin is pulled low which blocks the gating signals to the transistors
and shuts down the converter. Indications for over current, thermal overload and fuel cell interrupt
conditions are provided through light emitting diodes (LED) mounted on the faceplate.
Each signal is fed to a separate comparator with a separate reference voltage. When the measured
quantity exceeds the maximum threshold, the comparator output is pulled high. This forward biases a
series LED, which is mounted on the front of the enclosure as a visual indicator. Each signal has an op-
amp/LED combination, and the cathodes of all the LEDs are connected together to the base of a bipolar
junction transistor (BJT) pull-down transistor. If any signal exceeds the threshold the LED lights and the
base gets a high signal. The collector is pulled to ground, which sends a low voltage to the shutdown
input on the board and turns off the controller.
While the references are obtained with potentiometers connected to the control supply, the signals
need some external circuitry. A DC current sensor is needed on the output line of the converter to provide
a voltage proportional to the current. The over current threshold is set to 110% of the full load current.
Any current above 110% of full current will shut down the converter.
13
A negative temperature coefficient (NTC) thermistor is mounted on the heatsink for thermal
protection of the converter. As the temperature varies, the resistance of the thermistor will change and
force a small differential voltage at the output of the Wheatstone bridge. This voltage needs to be
buffered and converted to a single -ended voltage with amplitude of a few volts. The circuit is designed to
provide a shutdown reference corresponding to 80 degrees (Celsius).
The fuel cell or a user-defined shutdown is simple to accomplish. Because this signal will be a
relatively low voltage (~5V), it will need boosting to properly light its LED. Feeding this signal directly
to a comparator and providing a reference of 1V accomplished the user defined shut down. Whenever the
signal is high, the comparator will provide +15V to light the LED. If the signal is low, the comparator
will provide -15V to keep the LED reverse biased and unlit.
3.4.5 Filtering Process (Noise Issues)
The DC-DC converter output ideally should not contain any noise. However, as a result of the
switching on the DC-DC board, the output of the DC-DC inverter exhibits some switching noise (40kHz).
The noise is present in the signal sent to the DC-DC controller and in the DC voltage sent to the DC-AC
inverter. The Texas A&M team’s design includes filtering of both the control signal and the DC voltage
sent to the inverter.
3.4.6 DC-DC Converter Control Signal Conditioning
Switching noise should be removed from the control signal sent back to the comparator so the
accuracy of the control loop is not compromised. Two ceramic capacitors are included in the circuit prior
to the resistive divider of the feedback board. The capacitors filter out the switching noise from the
feedback circuit. Wire leads that implement the summing of the signal can pick up noise easily, therefore
the wire leads are as short as possible. These features provide a clean DC control signal.
14
3.4.7 DC-DC Converter DC- Link Design
Two high frequency film capacitors rated at 0.22µF capacitors provide the filtering for the DC
voltage sent to the DC-AC inverter. The series capacitors remove the 40 kHz voltage noise and provide
the DC-DC converter with a clean 400 V output. The bulk (electrolytic) capacitors provide additional
conditioning for the DC-AC inverter and serve to balance the ±200V voltages for the single-phase
inverters. In addition, two 47KΩ, 2W resistors are connected across the DC link for safe discharge of the
capacitors upon shut down.
3.4.8 DC-DC Converter Design For The 10kW TAMU Fuel Cell Inverter System
Figure 3 in the beginning of this section shows the circuit diagram of the push-pull DC/DC
converter. Fuel cell output is connected to the DC/DC converter as shown. The operation of the push
pull converter is described in detail in section 3.4.1 above. MOSFETs T+ and T- are turned on and off
alternately under duty ratio control at a switching frequency of 40kHz.
3.4.9 DC-DC Converter Specifications Inverter power output= 10000W
Assuming an overall efficiency of 90%, we have an input power
WW
Pin 111119.0
10000 == (4)
A nominal fuel cell input voltage, Vin= 48VDC-nom., is assumed.
Output voltage, Vo= 400VDC
Switching frequency= 40kHz (duty ratio control)
Designing for the low input line condition (Vin=42VDC), input current from fuel cell,
AV
WI in 265
42
11111 == (5)
The push pull DC/DC converter shown in Figure X. comprises of two switches, T+ and T-. At the
maximum duty ratio of 0.5, rms current rating IT of the switches
15
AI
I inT 188
2== (6)
MOSFETs rated 100V, 100A with 2 devices in parallel in each leg are selected.
High frequency transformer:
For obtaining an output voltage of 400VDC for the push-pull converter, a turns ratio of K=5 is selected
for the transformer. Center taps are available on both the primary and secondary sides as shown in Figure
2 at the beginning section 3.3.
The VA rating of the transformer is defined as the sum of the total primary and secondary
winding VA divided by two,
kVAWIVK
IKV
IVVA inin
inin
ininTr 0.1716695265425.15.122
2221
≅=⋅⋅=⋅=
⋅⋅⋅+⋅⋅= (7)
Voltage ratings of the transformer are selected as: Primary voltage=80V, Secondary voltage=400V
Diode ratings:
The reverse blocking voltage is equal to the DC link voltage 400V,
Current rating is the rms current through the diode, ID,
AK
II in
D 5.372
=⋅
= (8)
3.4.10 Design of the Control Circuit for the DC-DC Converter The PWM controller SG3525A is used for the control of the push-pull DC-DC converter. The block
diagram of the SG3525A is shown in Figure 6. The error amplifier used for implementing the closed loop
voltage control is a part of the SG3525A. The resistors and capacitors shown below are external to the
chip and were selected as follows. Phase compensation is achieved by a type-2 amplifier.
16
+
-Vfdbk R1
Rbias
Vref
Vout
R2 C1
C2
Figure 6: Phase Compensation Circuit
To achieve a phase boost of 82° and dB gain (G) of 2.83 at the center frequency (f) of 455Hz, we select
3.14452180
tan =
+=
boostk
π (9)
Selecting R1=18kΩ, we can determine R2, C1 and C2 as follows:
Ω≅Ω==
≅=−=
≅==
kkCf
kR
FFkCC
pFpFRkGf
C
1.515412
2
1.0092.0)1(21
47045312
12
2
π
µµ
π
(10)
For the oscillator section, a timing resistor RT and capacitor CT are selected to obtain a switching
frequency of 40kHz using the SG3525A datasheet,
RT= 5110 Ω and CT= 3300 pF
The 10kW design was verified by simulation.
17
Component Type Rating Quantity
MOSFET 100V, 100A 4
Input capacitor Electrolytic 4500uF, 250V 2
Transformer High frequency, with
center taps on both sides
17kVA, 400V, 37A 1
Diode 600V, 37.5A 4
Table 1: 10kW Design Results and Ratings
The voltage ripple on the 400VDC bus as obtained by simulation is less than 1%.
3.5 DC-AC Inverter Design
The DC-AC subsystem consists of the circuitry between the DC-DC converter and the load. A
block diagram of the system topology is available in Figure 7.
Figure 7: Circuit Diagram of the TAMU Inverter and Output Filter
120/240V , 60 Hz
VDC
+
-
C
C
VC+
VC -
TA+
TA -
TB+
TB -
LF
CF
LF
CF
ia
ib
B
A
N
Va
Vb120V, 60Hz
240V, 60Hz
AC Output
IDC is
isA isB ioA
ioB
ic
400VDC O
18
Since the DC-DC converter maintains equal ±200V on the dc-link capacitors, two inverter legs are
sufficient to generate 120V/240Vac output. The inverter has two PWM modules, which can each
accomplish a task such as centered and/or edge-aligned PWM generation. The 400 V output of the DC-
DC boost is used across two parallel switching legs. Each leg consists of two IGBT’s connected in series
across the 400 V input. The IGBTs are switched by the DSP. The DSP uses PWM by means of a
software-controlled algorithm to emulate a sine wave to determine when to open and close the gates.
An LC filter is used to filter out harmonics above 60 Hz out of the PWM output. The voltage sensor
senses the output voltage across the external load. This sensed voltage is fed back into the DSP for use in
the PWM algorithm. If the voltage is too high the voltage will be decreased and if the voltage is to low it
will be increased. The current sensor serves as over-current protection for the load. This subsystem can
be broken down into two main components, the control circuitry and the passive output AC filter.
Schematics for the DC-AC subsystem can be found in Appendix A.
3.5.1 Inverter Design Procedure for the 10kW TAMU Fuel Cell Inverter System
The inverter produces two single -phase outputs Phase-A and Phase-B. It is comprised of two half
bridge inverters each supplying separate single -phase loads at 120VAC, 60Hz. Consider the case when
Phase-B is not loaded and Phase-A is on full load (5000W). The peak amplitude of the fundamental
frequency component is the product of ma and ½ VDC, where ma is the modulation index. A modulation
index of 0.9 is assumed for this example.
10)sin(2
)( 11 <<⋅= aDC
aAO mtV
mV ω (11)
The switching function sw1 of the half bridge inverter is
termsfrequency higher tsin 29.0
5.0 11 ++= ωsw (12)
and the Phase-A output current is assumed to contain fundamental and third harmonic component due
to nonlinear load.
19
...)3sin(3)sin(2 313111 +−+−= φωφω tItIioA (13)
The current through the switch TA+ is given by
[ ] [ ] ...)3cos(cos329.0
2cos(cos229.0
...)3sin(23
)sin(22
31331111
313111
1
+−−+−−+
+−+−=
⋅=
φωφφωφ
φωφω
tItI
tItI
iswi oAsA
(14)
If Irms is the rms value of the Phase-A output current, neglecting higher frequency terms, we have
23
21 IIIrms += (15)
Assuming I3=0.7 I1 which is typical of single phase rectifier type nonlinear loads,
122.1 IIrms ⋅=
When supplying full load of 5000W at unity power factor,
AIrms 7.41120
5000==
which gives
AI 3422.1
7.411 == (16)
Therefore, the largest component of the capacitor current ic is the fundamental frequency current, the rms
value of which equals
AIi rmsc 1721
1, =⋅= (17)
For a voltage ripple ∆Vc less than 5% or 10V,
C
iV rmsc
c ω,=∆ (18)
FV
iC
c
rmsc µπω
450060210
17, ≅⋅⋅
=∆
= (19)
Bulk capacitors 4500µF are selected for this design.
20
Inverter switch ratings:
The rms current isA is 41.7A. Thus, rms current rating of each switch is
AIT 302
7.41 == (20)
Voltage rating of the IGBTs is 600V.
Component Rating Quantity
IGBT 600V, 30A 4
Table 2: Voltage Rating of the IGBTs
3.5.2 DC-AC Inverter Subsystem Control
Digital systems are becoming more ubiquitous in industry as a consequence of automated design
tools becoming more prevalent. Also, the accuracy that digital systems offer may be efficiently verified
on a mass production basis.
Unlike analog circuits, sophisticated algorithms can be implemented and updated digitally in a
short period of development time. Furthermore, digital circuits are less likely to be influenced by
temperature, aging, process technology, or chip layout. In contrast, analog circuits typically require
additional tuning circuits. In order to avoid use of tuning circuits and non-linearities associated with
analog circuits, a digital signal processor (DSP) has been utilized.
A Texas Instruments TMS320C2407 DSP platform was implemented to obtain the closed loop
control and PWM functions via software that maximize overall performance of the fuel cell inverter
system, while allowing the low cost objective to be achieved. The TMS 320C240X is a high-speed
processor designed for power electronic control. The DSP has on-chip memory to store and run the
program. Essential to the decision to implement DSP control, the cost of the Texas Instruments
TMS320C2407 is approximately $3.00 in high quantity.
21
The DSP system has a high-speed A/D converter, 9 PWM output channels and serial
communication capabilities. In addition, the TMS 320C240X series contains a 10-bit analog-to-digital
converter (ADC) having a minimum conversion time of 500 ns that offers up to 16 channels of analog
input. The auto sequencing capability of the ADC allows a maximum of 16 conversions to take place in a
single conversion session without any central processing unit (CPU) overhead [2]. This capability is
important for exploring ideas such as sensing outputs and inputs, programmable dead band to prevent
shoot-through faults, and synchronized analog-to-digital conversion [2]. By implementing the control via
DSP, the proposed approach will offer increased flexibility, insensitivity to temperature drifts and will
minimize component cost. Here, control is defined to mean how the DSP is used to: 1) modulate the
firing angles of the IGBT’s that will be used in the inverter stage, 2) provide supervisory protection
against system over-voltage, over-current, and over-temperature conditions, and 3) examine critical fuel
cell integration control parameters, 4) and provide tight output voltage regulation to meet THD
specifications under varying linear and nonlinear loading conditions. Appendix C shows the code
generated to produce the output voltage.
The system involves high-speed feedback loops that force the actual output voltage, Vout, to
follow the reference sinusoidal voltage Vref. Vref is 170V and is internally generated by the DSP
(numerically). The following sections describe the inverter control in detail.
3.5.3 Voltage Feedback
The voltage feedback configuration takes Vo (output of inverter) and divides out sin(ωt). This
gives DC component or the peak voltage for the output. The peak is then compared to the 120√(2)V or
~170V. The error is given to the PI controller where a voltage compensation amount is output into the
summer. The summer adds the correction to the reference and multiplies sin(ωt) back into the DC output
making it an AC signal again. The AC signal is then entered into a voltage limiter, which constrains the
voltage to a range of 0.0 to +3.3V. All intermediate values are linearly scaled into the range +3.3V to 0V.
22
The signal has a DC bias (offset) of 1.65V. This provides a range that covers the whole output spectrum
and limits it to a more manageable range for the DSP. The DSP can handle an input ranging from 0V to
3.3V.
3.5.4 TAMU Fuel Cell Inverter Closed Loop Control Approach
In this section, a closed-loop control strategy to maintain sinusoidal voltage at the output
terminals for varying loads is discussed. According to the specifications the 120V and 240V terminals of
the inverter could be connected to linear and nonlinear loads. In addition, the load can be considerably
unbalanced between the two outputs. Figure 8 shows the equivalent circuit of the output filter (LC) stage
of the inverter. Section 3.5.6 of this report details the output filter selection procedure along with a design
example. Figure 9 on the next page shows the block diagram of the output voltage control.
ov
Li
invv
ci
L
C
oi
Figure 8: Equivalent Circuit for Single -Phase Inverter Output Filter Stage and Load
The output voltage of the inverter is sampled and transformed to the synchronous reference frame
in order to cancel higher harmonic components employing low pass filter (LPF). The transformation
matrices are given by,
−
=θθ
θθθ
sincos
cossin)(T
, (21)
23
−=−
θθ
θθθ
sincos
cossin)( 1T
. (22)
The transformation matrix T can be used for a system which might have two phases with 90° phase shift
to be represented by dc component. Since the output voltage is only available, another phase input is
determined by tv eod ωcos* . As shown in Figure 9, the control system is designed on the synchronous
reference frame to increase the performance for nonlinear loads. Inverter input command is obtained by a
repetitive controller with predicted output voltage. During the fundamental cycle period, PI controller
output is calculated, applied to the next cycle period by integrating all the previous controller output.
ovLPF
LPF
PI
PI)(θT 1)( −θTtvo ωcos*
2120* =eodv
+
+_
_
eodveoqv
0* =eoqv
1* )( −ℜ ninv i ninv i )1(* +ℜ
∫ −+ℜininv dti
0 1* )1(
+
+
tM ωsin
ninv iv )1(* +∫
Figure 9: Control block diagram. Finally, the inverter reference voltage is calculated by
ninvninv itMiv )1(sin)1( ** +ℜ+=+ ω (23)
∫ −ℜ ℜ=+ℜi
ninvninv dttIi0
1** )()1(
(24)
Where, M is the modulation index, n denotes the step of a fundamental period; i represents the sampling
period in the fundamental period, and ℜI is the integral gain factor.
24
Results:
Figure 10 and Figure 11 show the simulation results of the inverter output voltage control
scheme. It is clear from the results that the inverter output voltage maintains a sinusoidal wave shape
during linear and nonlinear loading conditions.
Figure 10: Simulation Result for Linear Load (a) output voltage, (b) control signal, (c) output current(linear)
Figure 11: Simulation result for nonlinear load.
(a) output voltage, (b) control signal, (c) output current(linear)
25
3.5.5 Over Current Protection & Over Temperature Protection for DC-AC
Current and temperature protection are important for the output load and the inverter
itself. High current and high temperature can cause unexpected and serious damage to the fuel
cell and the inverter.
Over-current protection is implemented by using a current transformer that translates 1A
into 1V. A full bridge rectifier and a capacitor are used to obtain a DC level corresponding to the
measured current. The DC voltage proceeds to an op-amp in a voltage follower configuration.
Another op-amp uses the voltage and compares it to a reference voltage by means of a
comparator configuration. If the voltage measured is larger than the reference, then a signal is
sent to the gate driver for shutdown.
Temperature protection is implemented by using a thermistor that is mounted onto one
heat sink per leg of the inverter. The thermistor is used in a Wheatstone bridge. The voltage
difference across the bridge proceeds to an op-amp in a voltage follower configuration. Another
op-amp compares it to a reference voltage. If the voltage measured is larger than the reference, a
signal is sent to the gate driver to shutdown.
A manual push button reset is used to restart the system after the current or the
temperature has reached its limit and the gate driver has shutdown.
3.5.6 Output Filtering
The output filter of the power inverter is used to smooth out the waveforms generated from our
DC-AC stage. If monitored, the pure output of the inverter is a square wave with varying duty cycles.
This signal contains many unwanted frequencies including multiples of the 20kHz pulse width modulation
(PWM) switching frequency. Total harmonic distortion (THD) can be affected by these harmonics,
therefore, the THD of the inverter can be reduced by using an output filter. The THD requirement for this
26
design requires the system to have a THD < 5%. This low-pass filter is designed to meet the THD and
power requirements of this project. The following section will describe the procedure used to find the
appropriate values of the components of the filter.
3.5.7 DC-AC Inverter Output Filter Design Procedure
Figure 12 below shows the topology for the output filter. A transfer function is developed from
the schematic. The assumptions used in the analysis are, the output filter is loss less and the third
current harmonic current is 80% of the fundamental current frequency.
Figure 12: Topology of the DC-AC Output Filter
The transfer function for this type of filter is described by the equation
)( 2,
,
,
,
CLnLCL
nLC
ni
non XXnjZXnX
ZjX
V
VH
−+⋅
−== . (25)
Where
nH - transfer function
noV , - output voltage harmonic
niV , - input voltage harmonic
CX - capacitor component of impedance
LX - inductance component of impedance
jnXL
-jXC
nZL1n
Vi,n Vo,n
27
nLZ , - impedance
n - harmonic
For 11 →H ; or CL XX << , then
11,
1,1 ≅
⋅−⋅−
≤CL
LC
XjZ
ZjXH . (26)
Also, for a no load condition, ∞→1,LZ , therefore equation (25) is
1
12
2
−⋅=
−−=
C
LCL
Cn
X
XnXXn
XH (27)
To satisfy a THD requirement of less than 5%
22
222.23045.0
1
1nX
X
XX
n C
L
C
L
≥=≤−⋅
(28)
3.5.8 Non-Linear Load An equivalent circuit used in finding filter characteristics for a non-linear load is shown in Figure 13.
jhXL
-jXC
h
IhV
h
Figure 13: Equivalent Circuit for a Non-Linear Load The transfer function for this schematic is described by equation
hLC
CLh I
XhX
XjhXV ⋅
−⋅= 2
. (29)
Where
28
hV - equivalent voltage
h - harmonic
hI - current at h harmonic
CX - capacitor component of impedance
LX -inductance component of impedance
equation (29) can then be shown as
h
C
L
Lh I
X
Xh
hXV ⋅
−=
21
. (30)
Here C
L
X
X is very small making 12 <<
C
L
X
Xh ∴
hLh IhXV ⋅≤ (31)
For the third harmonic 3=h ∴
1
3
1
3 3V
IXV
VL ⋅= , where THD is 03.0
1
3 =V
V or %3 . Inductor impedance can be found by
3
1
*303.0
I
VX L
⋅= (32)
3.5.9 Output Filter Design Example
Let sf be defined as the switching frequency and 1f be defined as the fundemental frequency.
Then for kHzf s 20= , Hzf 601 = , and 33.3331
==f
fn s , 41009.2 −≥ x
X
X
C
L the filter resonant
frequency rf can be found with
17.69222.23
2
1
≤≤= n
X
X
f
f
L
Cr . (33)
Hzfr 4150≈
29
The 10 KW inverter (5 KW per Phase) with VV 1201 = , produces AI rms 67.41= , AI 95.253 = . Use
equation (32) to find 046.0=LX . Then, using
12 f
XL L
π= (34)
Where
L - inductance
1f - fundemental frequency
LX - inductance component of impedance
where Hzf 601 = , the inductance will be HL µ123= .
To find the capacitor impedance use the equation (28), to get 26.221=CX , then using
CXfC
⋅=
121
π (35)
where
C - capacitance
CX - capacitor component of impedance
1f -fundemental frequency
and Hzf 601 = , capacitance will be FC µ12= .
3.5.10 Test Results
Figure 14 below shows the DC input into to the DC-AC inverter and a single phase AC output of
the inverter stage of the 1.5kW prototype. With the DC input voltage at 390V, the voltage that appears
across the drain and source of the IGBT S1 is shown above. The ACRMS waveform shown is the
sinusoidal output voltage VAO after the filter stage. This voltage equal to 121 volts RMS, which meets
30
the required specification of 120 ± 6% volts. This output is realized with a modulation index (M) equal to
0.88. The measured frequency of the AC output is within the 60 ± 0.1 Hz requirement.
Figure 14: DC Input into to the DC-AC Inverter and a Single Phase AC Output
Figure 15 below shows the two PWM gating signals driving the IGBT of one phase of the
inverter. Channel 1 shows the PWM output from the DSP and Channel 2 shows the same PWM output
from an isolation opto-coupler. This image highlights clean PWM switching of the IGBT via the opto-
isolators controlled by the DSP. This clean switching translates to a cleaner output signal, which is
necessary to meet the THD < 5% specification. Please note that both Figure 14 and Figure 15 were
captured during same test.
31
Figure 15: Two PWM Gating Signals Leading to One IGBT
32
3.6 Output: Monitoring and Computer Interface Via RS-232
The inverter uses an RS-232 cable to link the DSP’s serial port to a Windows PC. This interface
is used to transfer voltage and current values from the inverter to the PC so they can be displayed for real
time viewing. Data is also stored into text files for data processing. An overview is given in Figure 16
below.
Figure 16: RS-232 Operation
Data is output from the DSP in a predefined transfer protocol that can be recognized by the PC.
In the DSP, the data is coded according to the protocol, and then transferred out of the SCI pin of the chip.
After the data reaches the other end of the cable, the software on the PC reads the correct serial port and
inputs the data into the computer’s software. The data is stored into a temporary 32 bit buffer. The
software reads the buffer and collects the data before the next piece of data is transferred. When new data
is transferred, it is stored in the same buffer as the old data, and the old data is destroyed. After the
software reads and stores the data, it must decode the data in order to know what it is and how it is to be
used. This is done with algorithms that are written based on the transfer protocol that is discussed in the
next section. When all of the needed data values are coded, transferred, read into the computer port, and
decoded, then the data can be processed.
33
3.6.1 Transfer Protocol
The protocol that is used to transfer the data is designed to use as few data transfers as necessary,
but enough to accurately monitor the data. The data to be transferred is the Leg A voltage and current,
as well as the Leg B voltage and current.
The voltages on Leg A and B will almost always be about 120 V, it was decided that the range of
measurable values that could be represented were from 0 to 180. Likewise, the currents of each leg will
almost always be between 0 and 12.5 A. It was decided to use a range of 0 to 55 to represent the current.
If physical values go beyond this range, only the upper values, (55 for current and 180 for voltage) will be
processed.
The RS-232 transfer protocol has a maximum data transfer of 8 bits per transfer. This does not
including the other start, stop, and parity bits. Within these 8 bits is the information that will be used to
identify the data as well as the actual value of the data. This can be more clearly seen in Table 3 below.
Data Bits Value
00XXXXX Upper 5 bits of Leg A Voltage
001XXXXX Lower 5 bits of Leg A Voltage
010XXXXX Upper 5 bits of Leg B Voltage
011XXXXX Lower 5 bits of Leg B Voltage
100XXXXX Upper 5 bits of Leg A Current
101XXXXX Lower 5 bits of Leg A Current
110XXXXX Upper 5 bits of Leg B Current
111XXXXX Lower 5 bits of Leg B Current
Table 3: RS-232 Transfer Protocol Bit Identification
34
Using this method, each of the four values that are transferred has 10 total bits worth of data. The
10 bits are enough to approximate the actual current and voltage values. The formula’s used to code and
decode the data are given below.
Coding
coded value = ( uncoded value * max size)/ upper range
where uncoded value = the value that the sensors pick up
max size = (2^10 –1) =1023
upper range = 180 for voltage values and 55 for current values
Decoding
decoded value = (coded value * upper range)/max size
Approximately every .5 to 1 second, the DSP will code all 4 data values and then break up the
coded values according to the table above. The extra bits that represent what the actual data is will also
be added to the 8-bit transfer block. Then all 8 of the 8 bit blocks will be sent to the computer to be
decoded. This process then repeats itself every .5 to 1 second.
3.6.2 Software Functionality Once all of the data values are transferred and decoded, it is up to the software to display the data,
write the data to files, and perform all of the computations that are on the display. Given the four data
values that are transferred from the DSP, the display software also computes the maximum and average
values that were seen for the current, voltage, and power, and also computes the current power. This can
be seen more clearly in Figure 17 below which illustrates the TAMU Fuel Cell Inverter system under
non-operating conditions.
35
Figure 17: Display of RS-232
As the DSP keeps updating the display, the inverter’s operators can see real time data of its
performance. There are also limit arrows placed on the Current and Voltage data fields. These limits are
set to give an up or down arrow if the current value falls out of the range of the limits. Currently the
current limit is set to go off if the value goes above 12.5 A or equals zero, and the voltage limits will go
off if the voltage falls out of the range of 120 V plus or minus 6%. These limits can also be interpreted
and an overall status of the inverter given at the lower right of the display. The software has the ability to
periodically write data to output text files. These files can later be used to import into other data
processing programs. For example, data can be imported into Excel and the data plotted in graphs.
3.6.3 Testing, Implementation, and Analysis
Test software had to be written, before the interface could be implemented. Software modules
were written using a Microsoft Visual C compiler. Software was written to simulate the DSP coding the
data and then the Display software was written.
36
44.. CCoosstt EEvvaalluuaattiioonn 4.1 Tracking Chart & Budget The cost evaluation of the Texas A&M Fuel Cell Inverter considers two types of costs. First, the
cost of the development process and second the cost evaluation based on the normalized system cost
projection worksheet provided for by the 2001 Future Energy Committee. The development budget
helped guide the design team in organizing and prioritizing time and resources for optimum use. The
working budget allowed team members to make the best cost-design decisions by showing the team
actual costs of the specific components for the fuel cell inverter.
The development budget, in Table 4 on the next page, was prepared at the initiation of the Texas
A&M 2001 Future Energy Challenge team. The budget takes in consideration a team of nine
undergraduate students and three graduate students who designed the inverter system. Funds and supplies
were provided from the Department of Electrical Engineering at Texas A&M, Texas Instruments, 3M,
Toshiba, Lucent Technologies, and Reliant Energy. The chart outlines how time was spent. Hours have
been estimated.
With the practical experience gained by the working budget, the team’s industry partners and the
faculty advisors the team was able to make well-informed design decisions to aggressively lower the cost
of the final 10kW design and 1.5kW prototype. The TAMU fuel cell inverter team’s approach to reducing
the cost of the inverter by reducing the number a high cost switching devices by adopting push-pull
technology, using a low cost Motorola SG3525A PWM DC-DC controller and including an efficient DSP
DC-AC control board.
37
MaterialsHours @ $35/hr
LaborResearch $0 8 0 0 $28,000Design $0 5000 $175,000Debugg ing $0 1900 $66,500Prototype Testing $0 2 0 0 $7,000Final Assembly $0 1 0 0 $3,500
Equ ipmentComputer $2,000 0 $0Software $1,000 0 $0DSP Bundle $3,990 0 $0Books/References $1,000 0 $0
PartsInverter (DSP Design) $200 0 $0DSP Chip $100 0 $0Board $500 0 $0Inverter Electronic Components $500 0 $0Energy Source (Fuel Cel l ) $4,000 0 $0
TravelCompany Presentat ions $1,000 2 0 0 $7,000Orlando, Flor ida $5,000 30 $1,050West VA $10,000 70 $2,450
Miscel laneousMaterials $750 0 0
SubTotals $30,040 8300 $290,500$320,540
Overhead -44% $141,038Tota l Expendi tures: $461,578
Est imated Labor
Table 4: Budget for the TAMU Fuel Cell Inverter Development
By use of the push–pull topology the number of MOSFETs was minimized to half needed by a
full bridge topology. IGBT’s were reduced in the inverter by use of the half bridge topology opposed to
the full bridge topology. The Motorola SG3525A PWM controller provided a low cost solution to control
of the DC-DC converter. It provides a single chip control solution opposed to complex discrete analog
hardware. DSP control of the DC-AC inverter provides efficiency of time and control. Readily
programmable, the DSP enables easy design changes to account for differing power applications.
Program capability translates into efficiency in human capital reducing costs of analysis, troubleshooting,
development and manufacturing of the fuel cell inverter. The use of the DSP allows a seamless interface
with other components of a power management system, saving integration time and human recourses. The
topology of the TAMU Fuel cell Inverter System employs a high voltage battery floating on the on the
DC-link. This approach does not add any additional power processing cost for sudden load management.
38
The cost for the power components of the TAMU Fuel Cell Inverter system were calculated by
developing the cost of the DC-DC converter and the DC-AC inverter and adding the two components
together. The Costs were based on the schematic and the quantity and power ratings take-off sheet shown
in Figure 18. The results of the cost analysis for the DC-DC converter are seen on the normalized
spreadsheet Table 5 and the results of the DC-AC costs are seen in Table 6.
The cost of the DC-DC converter was $290.51. The cost of the DC-AC inverter $206.79. The
total cost of the TAMU Fuel Cell System was $497.30. Following the cost analysis guild and spreadsheet
provided by the 2001 Future Energy Committee, the TAMU Fuel cell Inverter Team believes the power
processing components proposed by this design can be produced for less than the required $500.00
39
Figure 18: Power Schematic and Rating Take-Off Sheet
Com
pone
nt
Des
igna
tion
R
atin
g
Q
uant
ity
MO
SFE
T
T1,
T2
100V
, 100
A
4
Inpu
t cap
acit
or
C1
1000
uF,1
00V
1
Bul
k ca
paci
tor
C2,
C3
4500
uF, 2
50V
2
Tra
nsfo
rmer
T
R1
17kV
A, 4
00V
, 38A
1
Dio
de
D1,
D2,
D3,
D4
600V
, 38A
4
Cho
ke
L1
250µ
H, 3
8A
1
IGB
T
S1,S
2,S3
,S4
600V
, 30A
4
Out
put f
ilte
r cap
acit
or
C4,
C5
12µF
, 200
V
2
Out
put f
ilte
r ind
ucto
r L2
,L3
123µ
H, 4
2A
2
Con
tact
or
K1,
K2
120V
, 42A
2
48VD
C / 4
00VD
C, 4
0KHz
PUS
H PU
LL C
ONV
ERTE
R
+
-
Fuel
Cel
l Inp
ut48
VDC
120/
240V
, 60
Hz
I in C1
T1 T2
TR1
1:5
L1
VD
C+ -
C2
C3
Lb
Lb
S1 S2
S3
S4
L2C
4
L3C
5
i a i b
A BN
120V
/240
VAC,
20K
Hz P
WM
INVE
RTER
AC O
utpu
tV
in
D1
D3
D4
D2
N1 N1
N2
N2
I DC
Bat
tery
Bac
kup
Vba
tt
Vba
tt
Not
e: C
ompo
nent
s sh
own
in d
otte
d bo
xes
are
not c
onsid
ered
for c
ost e
valu
atio
n
3 3N
K1
K2
40
4.2 DC-DC Converter Costs
Table 5: DC-DC Converter Costs
2001 FUTURE ENERGY CHALLENGE
UNIVERSITY: Texas A&M University
NAME OF MAIN CONTACT: Dr. Prasad Enjeti
PROJECT NAME: TAMU Fuel Cell Inverter
DATE: June, 15 2001
VOLT VOLT CUR CUR UNIT EXTENDEDQTY DESIG UNIT MEASURE (Vpk) (Vrms) (Avg) (Arms) COST COST
DIODEDIODE 4 D1,2,3,4 600 38 4.13 16.50DIODE - DUAL MODULEDIODE - DUAL MODULEIGBTIGBTTRANSISTORMOSFET 4 Q1,2,3,4 100 100 9.18 36.74MOSFETSCRCAP (ALUM) uFCAP (ALUM) 2 C3,4 4500 uF 250 39.04 78.09CAP (ALUM) 1 1000 uF 100 1.49 1.49CAP (ALUM) uFCAP (FILM) uFCAP (FILM) uFCAP (FILM) uFCAP (FILM) uFCAP (FILM) uFCAP (FILM) uFPOWER RESISTOR WPOWER RESISTOR WPOWER RESISTOR WCHOKE 1 L6A 250 UH 38 60.99 60.99CHOKE UHTRANSFORMER 1 T2 400 38 23.01 23.01TRANSFORMERTRANSFORMERCONTACTORSCONTACTORSLOSSES WCONTROL 43.36PACKAGING 32.52OTHER (EXPLAIN) TOTAL 292.69
41
4.3 DC-AC Inverter Costs
2001 FUTURE ENERGY CHALLENGE
UNIVERSITY: Tesax A&M University
NAME OF MAIN CONTACT: Dr. Prasad Enjeti
PROJECT NAME: TAMU Fuel Cell Inverter
DATE: June, 15 2001
VOLT VOLT CUR CUR UNIT EXTENDEDDEVICE QTY DESIG UNIT MEASURE (Vpk) (Vrms) (Avg) (Arms) COST COSTDIODEDIODE - DUAL MODULEDIODE - DUAL MODULEIGBT 4 600 30 7.23 28.93IGBTIGBTMOSFETCAP (ALUM) uFCAP (ALUM) uFCAP (FILM) 2 12 uF 200 2.84 5.67CAP (FILM) uFPOWER RESISTOR WPOWER RESISTOR WCHOKE 2 123 UH 42 52.81 105.63TRANSFORMERCONTACTORS 2 120 42 6.48 12.95CONTACTORSLOSSES WCONTROL 30.64PACKAGING 22.98
OTHER (EXPLAIN) TOTAL 206.79
Table 6: DC-AC Inverter Costs
42
55.. DDeemmoonnssttrraattiioonn ooff OOppeerraattiioonnaall ssuucccceessss ooff tthhee 11..55kkWW PPrroottoottyyppee
In this section an overall summary of the preliminary results obtained for our 1.5kW inverter
prototype is presented.
Figure 19: DC-DC Test Results
DC-DC converter: Figure 3. shows the DC-DC converter topology. Figure 19 shows the test
results and the input & output waveforms. The 42VDC input from the high current DC power supply is
at 49V. Figure 19 shows the DC-DC converter output voltage Vd1 and Vd2 obtained during the
experiment. It is clear that the DC-DC converter output is ±200V.
DC-AC Inverter: Figure 20 below shows the DC input into to the DC-AC inverter and a single
phase AC output of the inverter stage of the 1.5kW prototype. With the DC input voltage at 390V, the
43
voltage that appears across the drain and source of the IGBT S1 is shown above. The ACRMS waveform
shown is the sinusoidal output voltage VAO after the filter stage. This voltage equal to 121 volts RMS,
which meets the required specification of 120 ± 6% volts. This output is realized with a modulation index
(M) equal to 0.88. The measured frequency of the AC output is within the 60 ± 0.1 Hz requirement.
Figure 20: DC Input into to the DC-AC Inverter and a Single Phase AC Output
Figure 21 below shows the two PWM gating signals driving one IGBT of one phase of the
inverter. Channel 1 shows the PWM output from the DSP and Channel 2 shows the same PWM output
from an isolation opto-coupler. This image highlights clean PWM switching of the IGBT via the opto-
isolators controlled by the DSP. This clean switching translates to a cleaner output signal, which is
necessary to meet the THD < 5% specification. Please note that both Figure 20 and Figure 21 were
captured during same test
44
Figure 21: Two PWM Gating Signals Leading to One IGBT
Design of the Battery Backup System: As specified in the Fuel Cell inverter design guidelines, a battery backup system is essential to
manage sudden load changes at the inverter output. Figure18 shows the TAMU Fuel Cell inverter
integrated with battery backup system on the DC-link. The TAMU Fuel Cell inverter employs a ±192V
battery backup system connected to the DC-link. A string of sixteen (16), 12V, 1.2Ah YUASA sealed
rechargeable lead-acid batteries are employed to form +192V. Another string of sixteen batteries of the
same rating form –192V. The entire string of 32 batteries are connected to the 400V DC-link via two
inductors (Figure. X). The string of 32 batteries provides 460.8Wh capacity in the DC-link to support
load increases. The purpose of the inductors is to block the DC-AC inverter ripple current from flowing
into the battery circuit. Since the DC-DC converter stage regulates the inverter to ±200V, ±192V battery
45
bank will essentially float on the DC-bus. In the event of sudden load increase, the ±192V battery bank
will supply the additional required power.
Below are photographs of the experimental setup. Figure 22 is of the DC-DC boost converter. Figure 23
is the single phase DC-AC inverter module.
Figure 22: DC-DC Boost Converter
46
Figure 23: Single Phas e DC-AC inverter
6. Responsibility Matrix & Organizational Approach
The Texas A&M Fuel Cell Inverter was a combined effort of undergraduate, graduate, faculty
and industry personnel primarily organized by Texas A&M faculty advisors; Drs. Enjeti, Yeary, Howze
and Culp. The team approach to the design solutions was implemented over several semesters. A wide
range disciplines including electrical engineering, computer engineering, chemical engineering and
mechanical engineering were utilized. A substantial commitment from all members of the design team
was required and a thank-you is forwarded to all those who committed funding, resources and time.
47
6.1 Institutional Commitment and Sources of Added Support
The Texas A&M team was fortunate to have secured the sponsorship and commitment from a
variety of corporations for the project. The resources and technical direction from industry professionals
proved useful in determining the feasibility, manufacturability, and cost factors involved in the teams
decisions. Several companies such as Toshiba, Texas Instruments, Reliant Energy, 3M, were helpful in
their support.
6.2 Impact on Undergraduate Education
The undergraduate students involved in the challenge were participants by virtue of enrollment in
the required electrical engineering senior design course at Texas A&M University. Students taking
electrical engineering directed studies course that involves research have also participated. The students
in the electrical engineering directed studies course earned three hours of course credit towards the their
undergraduate degrees. The students received an enriched experience of the engineering project process
including exposure to practical research, design, and manufacturing issues and techniques. The
opportunity to present their ideas and designs to industry was a valuable experience for all the students.
Undergraduate students worked in tandem with graduate students throughout the project. The
teams were lead by the graduate students under the supervision of the faculty advisors. The design
development teams are shown below in Figure 24 (the names of graduate level students are in Italics).
48
DSP/Inverter Team Phillip Briggs
David Leschberg Matthew Webster
Lori Dalton Oscar Montero Sansung Kim
Integration Team: Matt Campbell Jared Machala Wes Weibel Cody Sicking
Douglas Becker Rajesh Gopinath
Controls/DC-DC Converter Team: Nick Denniston
Cory Cress Andy Hale
Jon Burghardt Mark Arldt
Rajesh Gopinath Eugene Song
Figure 24: Design Development Teams
49
A plan for the work over the duration of the project was written in the form of a Gantt chart. Gantt Chart
Date Activity September 2000
Formation of Fall Student Team (consisting of an Inverter and DSP Design Teams) Commence Industrial Presentations for company sponsorship Commence Proposal Preparation Begin Research and Planning Phase
October Submit Proposal on Oct 2nd Continue seeking further industry sponsorship DSP Team will train on new TI DSP and begin testing DSP with Off-the-Shelf 2.5 kW Inverter Inverter Team completes design simulations Commence prototype construction and testing
November The Student Team attends Springboard Meeting in Orlando, FL Inverter Team – Commence Final Buildout of the Inverter Prototype DSP Team – incorporate DSP into Prototype
December 1.5 kW prototype completed Prototype Engineering report completed
January 2001
Turnover to spring student team Organization of project sub-teams Familiarization with project
February Familiarization with previous DSP code and PWM theory Open-loop testing of control chip Transformer characterization and testing Design of sensing/isolation and conditioning circuits Choose and order hardware/bus bars Decide on methodology of chip power supply circuits Setup XDRIVE and listserv for communication among team members Investigate current spike problem and possible solutions
March Finish design of sensing/isolation and conditioning circuits Layout of control circuit boards Modify DSP control code to incorporate sensing and PWM requirements Construct and test converter and inverter in open-loop Test converter and inverter with control circuitry Learn code for RS232 interface Begin final report
April
Continued evaluation and modification of prototype Complete packaging and RS232 interfacing requirements Write Final report including design and cost analysis Peer review of package and report
May Project Completed June July
Final Report Submitted All Texas A&M Team members attend Final Competition in Morgantown, W. Va.
Table 7: Organizational Gantt Chart
50
77.. NNoommeennccllaattuurree
Lv - inductor voltage
N1 - primary turns
N2 -secondary turns
DV -input voltage
oV - dc output voltage
t - time
nH - transfer function
noV , -output voltage harmonic
niV , -input voltage harmonic
CX -capacitor component of impedance
LX -inductance component of impedance
nLZ , -impedance
n -harmonic
hV - equivalent voltage
h - harmonic
hI - current at h harmonic
L - inductance
Iin - input current
VATr -Transformer VA rating
K -Turns ratio of transformer
ID -bridge rectifier diode current
RT -timing resistor
CT -timing capacitor
VAO -Fundamental component of output
voltage
ma - modulation index
VDC -DC link voltage
Sw1 -switching function of inverter leg
IsA -current through inverter switch
IoA -output current of phase A
Irms -DC link current in rms
Ic,rms -Capacitor current in rms
∆Vc -Voltage ripple on capacitor
IT -Current through the MOSFET
Vref -reference voltage
T -transfer function
C - capacitance
1f - fundamental frequency
Pin - power input
Vin - voltage input
51
88.. LLiisstt ooff AAccrroonnyymmss
AC - alternating current
ADC - analog-to-digital converter
BJT - bipolar junction transistor
CPU - central processing unit
DC - direct current
DOE - Department of Energy
DSP - digital signal processor
EVM - evaluation module
IGBT - insulated gate bipolar transistors
LED - light emitting diodes
LPF - low pass filter
LHV - low heating value
MOSFET - metal oxide semiconductor field effect transistors
MW - megawatt
NTC - negative temperature coefficient
PWM - pulse width modulation
TAMU - Texas A&M University
THD - total harmonic distortion
52
99.. BBiibblliiooggrraapphhyy National Fuel Cell Research Center at the University of California, Irvine. Fuel Cell Technology Comes of Age.
Available: http://www.nfcrc.uci.edu/journal/article/fcarticleE.htm.
Texas Instruments web site. http://dspvillage.ti.com/docs/prod/productfolder.jhtml?genericPartNumber=TMS320LF2407
2001 Future Energy Challenge. http://www.energychallenge.org
53
10. References [1] Jiang, H.J., Qin, Y., Du, S.S., Yu, Z.Y., Choudhury, S., DSP based Implementation of a Digitally-Controlled Single Phase PWM Inverter for UPS, Telecommunications Energy Conference, 1998, INTELEC. Twentieth International, 1999, Page(s): 221 -224 [2] Abdel-Rahim, N., Quaicoe, J.E. Multiple feedback loop control strategy for single-phase voltage source UPS inverter, Power Electronics Specialists Conference, PESC '94 Record., 25th Annual IEEE , 1994 , Page(s): 958 -964 vol.2 [3] Abdel-Rahim, N.M., Quaicoe, J.E. Analysis and Design of a Multiple Feedback Loop Control Strategy for Single-Phase Voltage-Source UPS Inverters, Power Electronics, IEEE Transactions on Volume: 11 4 , July 1996 , Page(s): 532 -541 [4] Shih-Liang Jung, Hsiang-Sung Huang, Meng-Yueh Chang, Ying-Yu Tzou, DSP-based Muliple-Loop Control Strategy for Single-Phase Inverters Used in AC Power Sources, Power Electronics Specialists Conference, 1997. PESC '97 Record., 28th Annual IEEE Volume: 1 , 1997 , Page(s): 706 -712 vol.1 [5] Robert W. Erickson, Dragon Maksimovic, Fundamentals of Power Electronics, Kluwer Academic Publishers, 2001 [6] Ned Mohan, Tore M. Undeland, William P. Robbins, Power Electronics, Converter Applications and Design John Wiley and Sons, 1995
54
1111.. AAppppeennddiicceess
55
Appendix A: Schematics for the TAMU Inverter
56
57
58
59
60
Appendix B: Schematics for DSP Control
61
62
63
64
Appendix C: DSP code (All .c and .h files) evmgr2407.c /*----------------------------------------------------------------------| | | | File: evmgr2407.c | | Target Processor: TMS320LF2407 | | Compiler Version: 6.6 | | Assembler Version: 6.6 | | Date: 11/2/00 | | Programmer: SSKIM | |---------------------------------------------------------------------|*/ #include "LF2407.h" #define PS2 0x0800 #define PS1 0x0400 #define PS0 0x0200 #define FREQIN4 ( 0 ) #define FREQIN2 ( ( PS0 ) ) #define FREQIN1_33 ( ( PS1 ) ) #define FREQIN1 ( ( PS1 ) | ( PS0 ) ) #define FREQIN_8 ( ( PS2) ) #define FREQIN_66 ( ( PS2) | ( PS0) ) #define FREQIN_57 ( ( PS2) | ( PS1) ) #define FREQIN_50 ( ( PS2) | ( PS1) | ( PS0) ) #define SCSR1 0x7018 #define SCSR1_PTR ((unsigned int*)SCSR1) volatile unsigned int configdata; #define IOWSB0 0x0048 #define IOWSB1 0x0080 #define IOWSB2 0x0100 #define ADC_CLKEN 0x0080 #define SCI_CLKEN 0x0040 #define SPI_CLKEN 0x0020 #define CAN_CLKEN 0x0010 #define EVB_CLKEN 0x0008 #define EVA_CLKEN 0x0004 #define MS_TIME_LOOP 0x0900 ioport unsigned port0ffff;
Continued
Thank You !
And our Sponsors:
2001 Future Energy Challenge Competition
Undergraduate Student Team Members
Matt Campbell Andy Hale Cory Cress Jon Burghardt David Leschber Cody SickingPhillip Briggs Wes Weibel Gary Tobola Matthew Webster Nick Denniston David Payne Jared Machala Matt Campbell David LeschberWes Weibel Nick Denniston Dao LeDouglas Becker Justin Busse Randall JonesSteven Campbell Lori Dalton Mike Spence
Mark Arldt
2001 Future Energy Challenge Competition
Graduate Student Team Members
Oscar Montero
Sangsun Kim
Jaehong Hahn
Rajesh Gopinath
Leonardo Palma
2001 Future Energy Challenge Competition
2001 Future Energy Challenge Competition
Faculty Advisors
Dr. Prasad EnjetiEmail: [email protected] Tel: 979-845-7466
Dr. Mark Yeary
Dr. Jo Howze
Dr. Charles Culp
Department of Electrical Engineering
September 2000 - August 2001
Development of a Low Cost Fuel Cell Inverter with DSP Based Control
Inverter Packaging
DC-DC Converter DC – AC
Inverter
DSP Control Board
Cooling FansHeat Sinks
Inverter Performance
Inverter Output Voltage(linear load)
THD < 1%Vol. Reg.= ±1%
Collector to Emitter Voltage
Single Phase on 500 W Resistive Load
Linear Load, Phase A Voltage
Non-Linear Load Phase B Voltage
Non-Linear Load Current
THD = 2.5%Vol. Reg.= ±3%
Phase A on Resistive Load, Phase B on Non-Linear Load
Inverter Performance
TAMU Inverter Undergoing Testing on NETL Fuel Cell 8/14/01
TAMU Inverter Powering 900W Load on NETL Fuel Cell 8/14/01
Data Collected from NETL Fuel Cell 8/14/01
• THD=1.2%
• 450W/phase
Texas A&M University2001 Future Energy Challenge Team
You have reached the endof this final report.
Use the button below toreturn to the Main Document
