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DFM Guidelines

PG-001 Rev 5 - 2/11/2016 Confidential Page 1

Design For Manufacturability Guidelines 2016

DFM Guidelines


Introduction

This DFM manual was written by Streamline Circuit’s management team to assist our customers towards designing their Printed Circuit Boards for manufacturability. Please follow these guidelines, which will help reduce your overall fabrication costs and get your product to market faster than the competition. Thank you for allowing Streamline to support your complex, time-critical prototype through production printed circuit board requirements. This has enabled Streamline Circuits Corporation to be the fastest growing company in our industry!

Certification and Qualifications and capabilities

Underwriters Laboratories ISO 9001:2000 Certified: Issued since February 2004 File #A12757 Flammability Rating UL : 94 V-O RoHS and Lead Free Products (compliant)

Military

Full Qualification for Mil- PRF - 55110 - Qualification for GF Qualification for GI-(polyimide) AS-9100 Certification (Score 95) Mil – PRF 31032 In Progress

Other ITAR Certified RoHs Compliant IPC-6012B Class 2, 3 & Aerospace

Design Guidelines

The following Streamline Circuits design guidelines are separated by technology into three categories (Standard, Advanced and Emerging).

DFM Guidelines


To achieve the lower cost for your project, your design should stay within the “Standard” category. We know this isn’t always possible with today’s advanced components & advanced packaging. Therefore, we offer two additional technology categories.

The next category is “Advanced”, which Streamline Circuits is building in production quantities every day. This is the major reason that Streamline continues to invest in cutting edge equipment to help customers keep cost down as they move into more advanced products. Streamline’s superior equipment minimizes our customer’s technology cost adders and keeps them within project budgets. The “Emerging” category is technology our engineering team is currently perfecting, which in most cases will need extra engineering surveillance throughout the process.

Rigid PCB Design Guidelines

Standard Advanced Emerging

Panel Size 18" X 24" & 19" X 25" 21" X 24" & 24" X 30" 21" X 24" & 24" X 30"

Layer Count 2 to 36 48+ 60+

Laminate Materials

FR4 Tg 140 Yes Yes Yes

FR4 Tg 170 Yes Yes Yes

GETEK Yes Yes Yes

Rogers Yes Yes Yes

Polyimide Yes Yes Yes

Duroid Yes Yes Yes

RoHs Materials Yes Yes Yes

DFM Guidelines


Polyclad 370 HR Yes Yes Yes

Isola 410 Yes Yes Yes

TUC Yes Yes Yes

Halogen Free Yes Yes Yes

Stablcor Yes Yes Yes

Exotic Material Types Yes 35+ 40+

Finished Thickness [Multilayer] .005" to .220" .220"-.250" Greater than .250"

Minimum Core Thickness .002" .002" .001"

Finished Thickness Tolerance [+/-] 10% 7% 5%

Multiple Laminations 5 9 12+

Copper Foil Weights Internal 1/4 to 2 Up to 6 ounce Up to 6 ounce

Copper Foil Weights External 1/4 to 3 Up to 4 ounce Greater than 6 ounce

Lines, Spaces, & Pad Diameters

Internal Line Width .0035" .002” Less than .002"

Internal Spacing .0035" .002" Less than .002"

External Line Width .0035" .002" Less than .002"

External Spacing .0035" .002" Less than .002"

Int. Pad Size-A/R Per Side (Fin.-.001) .005" .004" Less than .004"

DFM Guidelines


Ext. Pad Size-A/R Per Side (Fin.-.002) .003" .003" Less than .003"

SMT Pitch .010" .010" Less than .010"

Impedance 10% 5% Greater than 5%

Electroplating

Tin Lead Plating Thickness .0003"-.0005" Greater than .0005" Greater than .0005"

Tin Nickel Plating Thickness 150Microinches 250 Microinches Greater than 250 Microinches

Low Stress Nickel 100 Microinches 250 Microinches Greater than 250 Microinches

Gold Plating Thickness 30 Microinches As Specified As Specified

Minimum Drilled Hole Size 0.012 .0098" Less than .0059"

Hole Aspect Ratio 10 to 1 15 to 1 Less than 20 to 1

Conductor Finishes

HASL Yes Yes Yes

Solder with Reflow Yes Yes Yes

White Tin Yes Yes Yes

Carbon Ink Yes Yes Yes

Lead Free Finishes

Electroless Nickel/Paladium/Gold Yes Yes Yes

Electroless Nickel/Immersion Gold Yes Yes Yes

DFM Guidelines


Immersion Silver Yes Yes Yes

Entek Plus HT Yes Yes Yes

HASL Yes Yes Yes

Tolerances

Drilled Hole To Copper .008" .007" .006"

Non Plated Hole Tolerances [+/-] .001" .001" Less than .001"

Fabrication Tolerances [+/-] .005" .003" Less than .003"

Via Capabilities

Laser Micro Vias .004" .002" Less than .002"

Blind/Buried Vias .004" .002" Less than .002"

Via Under PAD Yes Yes Yes

Back Drill Yes Yes .008" larger than Primary Drill

Back drill Antipad Yes Yes .020" larger than Primary Drill

Castellation Yes Yes Yes

Laser Drill .004 .002 Less than .002

Mechanical Vias .0059 .0047 Less than .0047

Tented LPI Coated With LPI Coated/plugged Coated/plugged

Plugged UV Curable [no solvent] Maximum .020" Yes Yes

DFM Guidelines


Silver Conductive Via Fill Yes Yes Yes

Non-Conductive ViaFill Yes Yes Yes

Soldermask and Legend

Minimum Mask Clearance [LPI] .003" .002" Less than .002"

MinimumSoldermask Thickness 0.0004" 0.0004" 0.0004"

Gasketed Chip Scale Packaging .002" .001" Less than .001"

Soldermask Type LPI Dry Film As required

Soldermask Color Green Any Color Any Color

Soldermask Web Minimum .004" .003" Less than .003"

Legend Color White Any Color Any Color

Legend Feature Size .008" wide x .030" high .006" wide x .03" high min LPI Legend .003" x .02"

Flatness (Symmetrical construction) IPC Standard Review Required Review Required

Flex PCB Design Guidelines

Standard Advanced

Single-Side Flexible Panel Size 12” X 18” & 18" X 24" 21" X 24" & 24" X 36"

Double-Side Flexible Panel Size 12” X 18” 24” X 36”

DFM Guidelines


Multi-Layer Flex Panel Size 12” X 18” 18” X 24” and Up

Layer Count 3 to 12 13+

Rigid Flex Panel Size 12” X 18” 18” X 24” and Up

Layer Count 2 to 12 13+

Multiple Lamination

Copper Foil Weights Internal/External ¼ to 2 ounce Up to 3 ounce

Kapton Polyimide Stiffener .001” to .007” .008” and Up

FR4 Stiffener .003” to .062” .063” and Up

Polyimide Rigid Stiffener .003” to .062” .063” and Up

Lines, Spaces & Pad Diameters

Internal Line Width .0035" .002”

Internal Spacing .0035" .002"

External Line Width .0035" .002"

External Spacing .0035" .002"

SMT Pitch .010" .010"

Impedance 10% 5%

Via Hole Finish

Laser Micro Vias .004” .002”

DFM Guidelines


Blind/Buried Vias .004” .002”

Laser Drill .004” .002”

Minimum Drilled Hole Size .012” .0079”

Drilled Hole to Copper .008” .007”

Castellation Yes Yes

Surface Finish

Tin Lead Plating Thickness .0003” to .0005” Less than .0005”

Tin Nickel Plating Thickness 150 Micro Inches 250 Micro Inches

Low Stress Nickel 100 Micro Inches 250 Micro Inches

Gold Plating Thickness 30 Micro Inches As Specified

Electroless Nickel/Immersion Gold Yes Yes

Electroless Nickel/Palladium/Gold Yes Yes

Immersion Silver Yes Yes

Entek Plus HT Yes Yes

HASL Yes Yes

Tolerances

Plated Hole Tolerances [+/-] .002" .001"

Non Plated Hole Tolerances [+/-] .001" .001"

DFM Guidelines


Fabrication Tolerances [+/-] .005" .003"

Vision Rout [+/-] .003" .002"

Laser Rout [+/-] .002” .001"

D o u b l e S i d e d & M u l t i l a y e r F l o w C h a r t

P r e - P r o d u c t i o n E n g i n e e r i n gE n g i n e e r i n g / C A M / P h o t o

M a t e r i a l I s s u e

I n n e r L a y e rC o a t / E x p o s e / D e v e l o p

A O I

M u l t i L a y e r

A l t e r a t i v e O x i d e

L a y - u p

L a m i n a t i o n

D r i l l

M o n i t o r

M o n i t o r


D o u b l e - S i d e d


E l e c t r o l e s s P l a t e

O u t e r L a y e rC o a t / E x p o s e / D e v e l o p

M o n i t o r

M o n i t o r

M o n i t o r

M o n i t o r

P a t t e r n P l a t e

E t c h / S t r i p / E t c h

A O I

S i l k s c r e e nL P I / L e g e n d I n k

M o n i t o r

M o n i t o r

G o l d F i n g e r P l a t i n g S u r f a c e C o a t i n ge . g . H A L , A U I m m e r s i o n & e t c .

N C R o u t i n g / 2 n d D r i l l

F i n a l C l e a n

O p e n / S h o r t T e s t i n g

F i n a l I n s p e c t i o n

A u d i t

E N T E K

P a c k i n g

S h i p t o C u s t o m e rE N D

R e j e c t e d

A c c e p t e d

M o n i t o r

M o n i t o r

M o n i t o r

M o n i t o r

M o n i t o r

DFM Guidelines


B l i n d & B u r i e d V i a F l o w C h a r t



D r i l l

P T H & P a n e l P l a t e

I n n e r L a y e r s

A O I

A l t e r a t i v e O x i d e

M o n i t o r

M o n i t o r


L a m i n a t i o n

D r i l l

M o n i t o r

M o n i t o r

M o n i t o r

M o n i t o r

P a t t e r n P l a t e

E t c h / S t r i p / E t c h

A O I

S i l k s c r e e nL P I / L e g e n d I n k

M o n i t o r

M o n i t o r

N C R o u t i n g / 2 n d D r i l l

F i n a l C l e a n

O p e n / S h o r t T e s t i n g

F i n a l I n s p e c t i o n

A u d i t

E N T E K

P a c k i n g

S h i p t o C u s t o m e rE N D

R e j e c t e d

A c c e p t e d

M o n i t o r

M o n i t o r

M o n i t o r

M o n i t o r

I n n e r L a y e r s

G o l d F i n g e r P l a t i n g S u r f a c e C o a t i n ge . g . H A L , A U I m m e r s i o n & e t c .

M o n i t o r

Pre – Production Engineering

Data Requirements Accurate PCB data is critical to the tooling process. Two types of issues are frequently encountered: Critical and Non-critical issues. Critical issues can be

substantial enough to stop the tooling process which will leave us no choice but to put the job on hold. Anytime a build is on hold (waiting for customer resolution for more than 4 hours) the delivery due date will be moved out day for day. If customers can follow the instructions below, it will assure that all design requirements has been met.

FTP Instructions

Zip files to reduce data size Call Streamline sales to obtain a secure ftp site Log into ftp [email protected] Password streamline Place file in the “Streamline” Download directory Call Streamline or send e-mail notification stating that files have been placed for retrieval. Email: [email protected]

Key Items required

1) readme file: Describing all files. Information such as file format. It’s advisable to “stack” the files in the order of the build.

mailto:[email protected]

DFM Guidelines


I.e.: L1 = layer 1, L2 = Layer 2 etc. 2) Fabrication print with all dimensions and requirements 3) NC Drill file with all the drill sizes 4) Aperture list if 274 D (Preference is 274 X) 5) All Gerber files 6) CAD Net list Data (IPC D 356A) Streamline will perform a netlist Gerber compare verification if an IPC 356D netlist is provided by you the customer. If there is not an IPC netlist provided with the released data package our cam department will extract a netlist from the gerber (This extracted netlist will not allow us to ensure that the gerbers are correct before we start our process). The ideal situation would be for Streamline to compare the netlist that the customer provides to the incoming data and then test the physical boards to that customer netlist.

Acceptable data formats As you all are aware that the is many data formats with Gerber being the most common. Streamline can accept most data formats. 1) ODB ++ 2) Gerber 274d 3) Gerber 274x 4) Autocad (not preferred) 5) All drawing formats (HPGL, .dxf, .dwg etc) If you have a format that is not listed feel free to call Streamline Pre-Production area And we would be glad to discuss alternative formats. [email protected] Or 408-579-5534

Technical Contact There are two ways to give Streamline Circuits the technical contacts, which will help our Engineering department, commutate effectively with your team. This is very important because Streamline provides a custom Design Rule Check on every prototype build, which will offer valued product benefits. Streamline will try to find ways to improve the product for manufacturability and fix any issues we might find before the release of the build. The goal here is to help reduce the amount of revisions for the customer in any given product life cycle. Thus, saving long term cost on all projects. It is also critical to give us a 24 hour contact on all quick turns to ensure success on all deliveries. Most customers will give us a readme file that is incorporated in the gerber data. This file will give us the names, titles, work numbers, and cell numbers of the key people involved in the design. This will allow us to contact the appropriate people based on the question. Customers can also give this contact information to Streamline’s customer service person, which will incorporate the names and numbers on the sales order. This will allow us to contact you or your team in a timely manner with all product improvements or technical issue.

Common Data Issues

Inconsistent data formats: Data where the format is different in each file. Incomplete Fabrication Information: Including a readme.txt file is highly recommended, a fab drawing is also useful if it can be generated from software.

mailto:[email protected]

DFM Guidelines


No Board Outline: We need either a board outline or a (0, 0) reference with measurements. Otherwise we will have to contact you to get it. Base the board edge from a hole. If board outline is provided on the silkscreen layer, please isolate its aperture size from other elements on the layer - a one mil outline is a good choice. Mask Expansion: We recommend you do not expand your pads for the solder mask file (i.e. 01:1 with the outer layer mil expansion). Our CAM department would prefer to deal with the expansion themselves. You can spec a maximum expansion. Use a Gerber Viewer: Every now and then we get a board with layers that do not seem to go together, or some feature that doesn't look right. If you have any doubts about what your design package is going to out put. Please take the time to look over your output. We recommend you use a third party Gerber viewer. Call Streamline and we can supply you with one. Inner Layer Clearance: Plated through-holes on multilayer boards need to be cleared from internal planes by at least 20 mils, 30 mils is better. There are several reasons for this, all to do with inner layer heat expansion and layer to layer mis-registration. Board edge clearance should be min of .015

Unneeded Tool Sizes: The tolerance on hole size is generally +/-2 mil, so there is no point is putting 37 mil and 38 mil holes on the same board - might as well make them the same size. Remember that for standard 0.062" material the standard via hole size is 13.5 mil. If you put 008 mil holes on that board, there will be an added cost. Keep to just one size via hole unless the design requires more.

Gerber Format: The preferred data format is ODB++ for valor genesis tools - most recent layout packages support it. Also, using the same data precision for both Gerber and drill data is recommended. Please generate gerber data with enough precision - if the precision is too low, round-off errors will occur and object placement can be off by a few mils.

Drawn SMT Pads: Flashing, as opposed to drawing all SMT pads is highly recommended. Drawn pads usually have to be converted to flash in CAM, which takes extra time and introduces the possibility of operator error. Try to keep to regular pads like round and square - oblongs and teardrops are possible, but introduce more potential errors. Only use irregular pads when necessary for design reasons. Doughnuts - round pads with a clearance in the middle for the drill hole - are never helpful. Also, only one flash is needed. There is no advantage to building a square pad out of 4 smaller squares, or making a 100 mil round pad by superimposing a couple of hundred 40 mil pads.

Silkscreen on Pads: Generally silkscreen on pads is not needed. We clip silkscreen off the pads as standard practice. .003 away from the solder mask. Also, silkscreen on SMT pads will make soldering more difficult. Min width should be .006 and .050 high/wide Data Intensive Ground & Power Planes: When generating a ground plane, using inefficient parameters like 0.5 mil steps will create large Gerber files, which increase DRC times, etc... without any advantage to the design. Use a reasonable line width and step size, comparable to your chosen design rules Negative planes should be provided with flashed anti pads and thermals.

Acid Trap: Keep to the minimum trace/space parameters, even if two close elements are electrically connected elsewhere. A 1 or 2 mil air gap can result in a piece of photo resist film tearing off, and falling across the design, possibly creating opens or shorts.

Thermals for Vias: Thermal relief’s on inner layers are needed only for soldering purposes, so they serve no purpose on a via hole. A direct connection makes CAM work easier.

DFM Guidelines


Tooling Holes: (2 x 0.062") the holes need to be on opposite corners of the board for routing. If we cannot add any holes to the board for design reasons, we need to be told.

Logo and Date Code: Due to ISO/UL requirements, we need a 0.5" x 0.3" space to put our logo and date code. This is usually in the copper on the solder side. If any extra copper might cause a problem with the design, we need to be informed we can put our logo and date code in the silkscreen.

UL Markings: If UL markings are required, we need a 0.5" x 0.3" space. We can leave all mfg markings off the boards, but this must be explicitly requested. Also, remember that if we omit our markings, it cannot be proven we manufactured the boards.

Labels on Gerber Layers: It is a good idea to put some text on each Gerber layer. This will make it obvious which way is right reading. The text can even be placed off the edge of the board if no text is wanted on the board itself. Excessive text on a copper layer causes interference with the design rule checking (e.g. un-terminated traces, tight gaps, etc.).

Zero mil Apertures: Never use 0 mil aperture sizes. They are not defined, so different pieces of software tend to interpret them in different ways.

Drawing with Non-Round Shapes: The only shape to draw with are rounds, or squares if you want sharp corners - never draw with rectangles or any other shape.

Special Shapes: If your forced to use a special shape be sure you describe it fully. Or draw the shape and let us convert to flash.

Multiple Gerber Layers: Avoid multiple Gerber layers for one single physical layer if possible. Using a mix of positive, negative, and clipping layers introduces opportunity for errors.

Overlapping Drill Holes: If the board requires routed slots, specify them completely, including whether or not they are plated through.

Net list compare: This allows the CAD netlist generated from your original PCB design file, to be compared to a net list generated from the Gerber and NC drill manufacturing data. This will ensure your Gerber file has been created accurately. For best result an IPC356A netlist supplied with the data will be used to verify electrical integrity of the design against the customer supplied Gerber. Please also make sure you keep your netlist under 14 characters per net name. Any discrepancies can be rectified prior to expensive tooling, circuit board production and component placement. Without `Netlist Compare', Gerber faults can only be identified by chance or after board production.

Isolated thermals: Over-sizing clearance pads at the post-processing stage can cause some power connections to be isolated from the main power net.

Un-routed connections: Connections or part connections that have not been completely routed as required. Stub routes (where a route stops short of its destination) are common errors.

Split planes: Ground and power planes are often split using post-processing `tricks'. The data does not reflect the true electrical connectivity of the design.

Design considerations: All inner layer pads should be .010 larger than the drilled hole size. To maintain .001 A/R (Ipc Std) . This would mean that if your requirement is for a finished hole of .050 hole. Streamline must drill the hole appox .004 larger to accommodate for plating. Your pad should be appox .064 in diameter.

DFM Guidelines


Recommendations: (If Possible)

Keep the pad .010” larger than the drilled hole size (FHS +4-5mils).

Remove non functional pads if possible Tear dropping is recommended

Line width: The minimum line width currently running in production is .002 of an inch on inner layers, and .004 on outer layers. Remember the fabricator must increase line width for manufacturing. Don’t design a .004 line and space on 2 oz copper.

Recommendations 1) Keep line widths consistent 2) Keep line centered between pads 3) Try to balance the traces and pads on the PCB distribute traces evenly on all layers Keep features at least .008 away from drilled hole. (Streamline can do as advanced as 4.8 mils) Less than .006 mils requires a engineering review

Trace Routing: Use 45 degree angle. Whenever possible, use 45 degree angles instead of improve plating uniformity. This will minimize the amount of chemistry puddling during the etch process. A designer should never have 90 degree.

Trace to non-plated hole spacing should be .min .008. This will allow tenting of the non-plated hole and will also allow the hole to be drilled on the primary program. Drilling on the primary program will increase True Position accuracy.

Trace to board edge should be .010 minimum.

DFM Guidelines


Balance circuit design across the board. This is especially important on the outer layers to achieve uniform plating None Conductive Thieving: Used for CU distribution

Plane Layer Design Guidelines

Plane relief for all holes should be .020 larger than the drilled hole size. This would mean that if your requirement is for a finished hole of .050 hole. Streamline must drill the hole appox .004 larger to accommodate for plating. Your pad should be appox .074 in diameter.

Tips:

Watch that you don’t isolate the thermal connects. Keep you thermal inner diameter the same as the outer diameter of the signal layer pad. Avoid using “donuts” on Plane Layers Make split plane gaps at least .008 mils If using a positive fill use the largest aperture possible

DFM Guidelines


Copper to the edge of the Board There should be at least 0.010" between copper and the edge of the board. If copper runs to the edge of the board, the solder mask will begin to flake off the edges during the routing stage. Exposed copper on the board edge will oxidize, and can lead to shorts.

Impedance Control

Relief from plane should be .008 min.

Hole Hole

Relief area should be .010 min Thermal Tie Should be min .008 mils

DFM Guidelines


Design dielectrics and trace widths as reference only. Streamline can assist in identifying the construction & trace widths to insure adherence to the specified impedance requirements. If a TDR test trace is designed inside the board, identify the test points on the blue print. Allow a +\- 10% tolerance or + /- 5 ohms minimum on impedance requirements. Streamline also offers differential pair impedance control. Streamline also offers +/- 5% and 28 ohm product

DFM Guidelines


Controlled Impedance Coupons

Printed circuit boards with controlled impedance technology are processed with test coupons as part of the lay-up. When a +/- 10 ohms or +/- 20% of nominal impedance tolerance is specified, we recommend using controlled geometry to control impedance .This will free area on the panel for parts since the coupons will not be needed. The coupon size and location is dependant on the number of layers and number of impedance lines that require TDR readings and reports. Streamline will supply a report of all values with every order.

Controlled Impedance Coupon

PCB

1.00”

0.100” MIN

COUPON

COUPON

PCB

PCB

PCB

+\- 5% or less is available but premium charges may apply

Appox .5 x 7.0 The coupon overall size will vary based on the number of Layers with Impedance requirements Note: Lead Free RoHs materials electrical characteristics may require remodeling to meet CI requirements. Small adjustments in Line width usually can meet CI characteristics.

DFM Guidelines


Standard Material Tolerances

THICKNESS TOLERANCE CLASS

0.0030” ± 0.0007” B

0.0040” ± 0.0007” B

0.0050” ± 0.0010” B

0.0060” ± 0.0010” B

0.0075” ± 0.0015” B

0.0080” ± 0.0015” B

0.0100” ± 0.0015” B

0.0120” ± 0.0015” B

0.0140” ± 0.0020” B

0.0210” ± 0.0020” C

0.0280” ± 0.0020” C

0.0470” ± 0.0030” C

0.0590” ± 0.0030” C

Purchased Specifications (IPC 4101)

0.0030” – 0.0075” single ply construction laminate

Laminate (Core) Tolerances

AVAILABLE B-STAGE THICKNESS RANGE

106 0.0015” – 0.002” 1080 0.0025” – 0.0035” 2113 0.0035” – 0.0045” 2116 0.0045” – 0.0055” 7628 0.0065” – 0.0075”

7628 (high resin) 0.0075” – 0.008”

Purchased Specifications.

Prepreg Styles

GLASS STYLES

0106 1080 2113 2116 7628

DFM Guidelines


Copper Specifications

COPPER WEIGHT (ounce)

* THICKNESS (mils)

0.25 **0.375

0.5

0.35 0.525 0.70

1 1.40 2 2.80

Purchased specifications. Tolerance per IPC-MF-150F.

** Non standard stock

Copper Foil

Material Type FR4 Transition Temperature

Standard 130 C High Tg 170 C

Suppliers

Rogers Corp Exotic material Arlon Corp Exotic Material - Polyimide

Nelco Corp FR4 - Polyimide - BT Polyclad Corp FR4 – GeTek

Isola Corp FR4 - Polyimide - BT

Matshuta FR4 – Megtron (Getek equivalent)

Taconic Exotic material

Multilayer Construction Guidelines

When designing multilayer constructions for boards that do not have controlled impedance requirements or other distinct specifications, Please following the design guidelines below.

Design balanced constructions that are symmetrical from the lay-up’s center outward. Whenever possible, only one core thickness should be used. The maximum B-Stage opening between C-Stages is 0.021”.fillers required Note: Each outer layer is typically a signal layer built on 0.5 ounce copper. If B-Stage opening is greater than 0.021” use filler cores. Use even # of layers Avoid signal on thin cores if possible Design plane layers in symmetrical locations. Minimize the risk of warpage. 6 layers or more should have a plane layer on the same core as a signal layer (see diagram). This

will help control the amount of material shrinkage experienced during the manufacturing process. Half ounce copper base external & internal is preferred. (2 ounce copper layers could add as much

as 10-15% to material costs). .005 Or less trace width should be processed on ¼ or ½ oz. copper. Balance copper distribution. Signal layers should have even distribution whenever possible.

DFM Guidelines


Preferred Constructions

The following examples are STREAMLINE CIRCUITS preferred most cost-effective constructions.

High TG material mandatory on constructions > .080 or > 10 layer Key: F = Foil P = Power G = Ground S = Signal

Two Layer

Four Layers

DFM Guidelines


Six Layer

Eight Layer

DFM Guidelines


Ten Layers

DFM Guidelines


Twelve Layers

Fourteen Layers

DFM Guidelines


Sixteen Layer

DFM Guidelines


Eighteen Layer

DFM Guidelines


Twenty Layer

DFM Guidelines


Twenty-Two Layer

DFM Guidelines


Twenty-Four Layer

Additional Stack ups can be furnished upon request. Please just give Streamline Circuit’s Pre-Production Department a call for assistance. 408-579-5534. We will be more than happy to work with you to achieve the results you require. Industry standard panel size is 18” x24”. It’s important to understand our manufacturing useable area, which is 16” x 22” for multi-layers (2 layers 17 x 23) to allow for our tooling holes. Dimensioning your PCB accordingly is imperative to material utilization and cost efficiencies. See your sales rep for more info on reducing costs.

DFM Guidelines


Panel Utilization

Use the following table to determine the maximum, single 1-up PCB that can fit into a panel. Panel sizes are sub-divided into “Double sided and multi layer. 12 X 18 – 16 X 18 – 18 X 24 – 21 X 24 – 24 X 24 – 24 X 30 - 26 x 36

Panel Sizes & Useable Area

There are three general modifications to a panel, which will reduce the available useable area. These modifications include: (1) Step-and-repeat requirements, (2) Provisions for electroplating edge connectors, (3) Coupon requirements. (4) Design Tolerances

Step-and-Repeat

The term ‘step-and-repeat’ describes the process of reproducing successive images onto a panel. For printed circuit boards without gold-plated edge contacts, the standard step-and-repeat spacing between parts is normally 0.100”. A typical lay-up is shown

Lay-up without Edge Connectors

0 .750 18.00

COUPONS 55110

17.250 .100

SPACING (STD)

0

.750

23.250

24.00

.100 SPACING (STD)

USABLE AREA

Peel Strength Coupon

DFM Guidelines


Gold-Electroplated Edge Connectors

For printed circuit boards with gold-plated edge connectors (a.k.a. tips, fingers, tabs), parts are usually arranged such that the edge connectors are either facing each other or opposite each other as in When the edge connectors are facing each other, the spacing between the part outlines needs to be at least 0.100” minimum. This allows space for extenders to interconnect to the connectors for electroplating and to allow room for a shearing operation to separate the pieces. When the edges opposite the edge connectors are facing each other, the space between the parts can be 0.150” (minimum 0.100”) since there is no gold plating required in this area. Selective plating is available for internal tips.

It is also recommended to build the board with gold flash when gold emersion and tips are called out.

Maximum distance between buss bar connections: 24” Minimum PCB thickness: 0.005” Maximum PCB thickness: 0.300” Streamline is always available to work with our customers to achieve their goals

Extenders Plating Bar

Plating Frame used for Brush Contact

Maximum Distance = 24”

- or -

PCB

PCB PCB

Maximum Distance = 24”

Gold Plating Interconnection Components

DFM Guidelines


Lay-up with Edge Connectors For printed circuit board with recessed gold-plated edge connectors, the same rules apply as those

without recessed edge connectors with one exception.

PCB

0.100” MIN

2.500” TYP

Useable Area Perimeter

0.100” MIN

PCB

DFM Guidelines


Array Layouts

General Rule Keep the array simple. Don’t design an array with multiple cut outs or complicated

patterns. Detail the print from a hole or a pad or feature to feature. Please supply an outline of the array.

TOOLING HOLE, X 3 MIN

STANDARD SCORE DETAIL

SCORE WEB .015 +/- .003

CONTINUOUS SCORE LINES

30 DEGREE ANGLE

.040

.100

.100

STANDARD BREAK-AWAY DETAIL

.020 HOLE SIZE TYPICAL

DFM Guidelines


Drilled Hole to Copper Tolerance: Please remember as the technology continues to advance (high density) and we try to help reduce cost by putting more parts up on a manufacturing panel. The most critical tolerance becomes the drilled hole to copper spacing because of the registration. The good news is that Streamline Circuits is capable of manufacturing .04.8 mills hole to copper, but there is a huge yield factor which drives overall cost. Streamline recommends .08 mils hole to copper for cost savings if at all possible

10 mil via

.03937

4 mil track4 mil track

4 mil space

.01937

20 mil pad

3.6 mil3.6 mil

DFM Guidelines


Plating Options Electroless NI / Immersion AU Alternate (RoHs Compliant for lead free assembly) surface finish used

for its co planarity and solder ability characteristics. Also ensures that gold content in the solder joint is less than 3%. Greater than 3% will could cause solder joint embitterment. This process has 200 micro inches of electrical nickel and 2-8 micro inches of immersion gold.

Entek 106A HT: (RoHs Compliant for lead free assembly) Entek Plus Cu-106A is an organic solder ability

preservative (OSP) used when planarity across the board surface is critical. No solder will be present on the board prior to assembly. Thickness requirements for Entek 106 should be .2 to .5 microns.

Hot Air Solder Level: (This process can also be lead free) Hot air solder leveled boards will have a solder

thickness of .00003 to .0015. IPC-6012 (supersedes IPC-RB-276) only specifies good solder ability and does not specify thickness.

Immersion Silver: Alternate surface finish used for its co planarity, ICT and solder ability characteristics.

(RoHs Compliant for lead free assembly) Gold Immersion: Nickel / Gold Plating: (Gold connectors usually 30 micro inches) Hard Gold is Standard process at Streamline Gold Body Plate:

For gold wire bond applications, soft gold (60-90 Knoop Hardness) should be used (refer to Mil-G-45204). Although the above mentioned specification calls out a thickness of 50 - 100 micro inches, thickness requirements are typically in the 20 to 60 micro inches range with 200 micro inches nickel.

Aluminum wire bonding applications typically require 2 to 7 micro inches of soft gold over 150 - 200

micro inches nickel. Electroless (immersion) plating process. 60 to 90 knoop Gold wire bonding applications typically require 20 to 60 micro inches of soft gold over 200 micro inches

nickel. 60 to 90 knoop Electroless Nickel / Electroless Palladium / Immersion Gold is also used for gold wire bond

applications.

DFM Guidelines


Soldermask and Silkscreen If possible, please supply your artwork with pads clearances 0 larger than the outer layer feature that

will be relieved. Let us do the work. If you want your fiducials cleared more than standard soldermask clearance, relieve them to your requirement. The additional manufacturing requirement typically will not affect the clearance.

Non Plated holes For none plated holes provide .010 mil larger clearances than the barrel of the hole.

Legend: Std Character size should be a min .05 high with a diameter 0f .006 Streamline has advanced Ink Jet printing. Character size can be .025 with Diameter of .003

.005 per side

Non Plated thru hole

Clear Soldermask ( Individual Webs )

Green Soldermask ( Individual Webs )

0.0035” S/M Web

0.003” Clearance

0.003”

S/M Web

0.003”

Clearance

Fine Pitch SMD Pads

0.002” Clearance

Gang Relief ( Clear or Green Soldermask )

DFM Guidelines


When is it time to go with more advanced Drilling? Laser drilling geometries are as follows: .004 laser drill (finish .002-.0027) = capture pad of .010-.014 .003 laser drill (finish .001-.0017) = capture pad of .009-.012

Micro Mechanical holes: .0047 and .0059 and .008 mils are now available Nominally pad sizes need to be .010 over drill size (not finished hole, we typically drill .004 - .005 over finished nominal) for tangency, if you have a .5mm BGA you will need to drill with a .0059 drill and a .014 pad and also allow breakout. Via plug types are summarized:

4

Via Options• Via located next to Pad and Via with .008” separation

Via in Pad Via w/Pad Bump Dog Bone Via

DFM Guidelines


Solder Mask Fill This technology is used to prevent solder wicking or air flow from front to back, do not use this

technology in .5 mm or less, it mainly is used for caps and resistor locations which have offset plugs. NON- Conductive Ceramic Epoxy: recommend San Ei for Lead free application.

Conductive Epoxy: Tatsuta for lead free applications Copper fill of Micro via (laser or controlled depth)

These technologies are used for via under pad applications where you are mounting direct over the hole.

You can include technologies together with the exception that only one type of epoxy should be used in your test vehicles. We can build with multiple epoxies in single products, but it is very expensive.

Benefits include:

• No solder wicking down hole • Flat Solderable surface for BGA, Micro BGA, or Nano BGA • Socket application for fine pitch BGA or LGA packages • Wire Bond application for high density routing requirements

• Thermal heat sinking characteristics for conductive Vias

• Conductive material – Material TG CTE under TG CTE over

TG – CB-100 115C 34 ppm 147 ppm – AE-1125 177C 34 ppm 98 ppm

• Non-conductive materials – Material TG CTE under TG CTE over

TG – PP2795 140C 40 ppm 150 ppm – IR10F 160C 32 ppm 83 ppm

• Table III – Solid Copper Via Plate (1+1, 2+2, or Greater, including

stacked vias)

DFM Guidelines


6

Conductive Filled Via

DFM Guidelines


Copper Filled Vias

DFM Guidelines


Available test types: Dual access, net list test is a Streamline standard procedure TTI Dual Access Test Area: 14” x 19”

SMD Pitch: .0197 or greater Voltage: 10 - 250 VDC Short / Isolation: 1ohm - 100 meg ohms Open Circuit: 10 ohm or greater

2 Microcraft Flying Probe Tester Test Area: 18” x 24”

SMD Pitch: .009 or greater Voltage: 30 - 250 VDC Short / Isolation: 10 - 100 meg ohms Open Circuit: 10 ohm or greater

1 ATG A2 Test Area 19.2” X 25” 2 Systems Universal Grid 1 Single Density 1 Double density

1 ATG A6 Test Area 19.2” X 25” 2 Systems Universal Grid 1 Single Density 1 Double density IS8000 Impedance modeling system (Polar)

Polar cits 500s32 TDR (200ps rise time)

Hi Pot test capabilities.

Ionic contamination testing

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