Electronics Circuits II Lab Manual_2

8/12/2019 Electronics Circuits II Lab Manual_2

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DEPARTMENT OF ELECTRONICS ANDCOMMUNICATION ENGINEERING

EC2257 ELECTRONICS CIRCUITS II

AND SIMULATION LABORATORY

Prepared by

B. Arul Murugan Assistant Professor

ECE


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EC2257 ELECTRONIC CIRCUITS II AND SIMULATION LAB

Cycle I

1. Current Series feedback amplifier: Frequency response, Input and output impedance

calculation

2. Voltage Shunt feedback amplifier: Frequency response, Input and output impedance

calculation

3. RC Phase shift oscillator

4. Hartley Oscillator

5. Colpitts Oscillator

6. CMOS Inverter, NAND and NOR using PSPICE

7. Active filter: Butterworth II order LPF using PSPICE

8. Differential amplifier using PSPICE

Cycle II

9. Frequency Response of Single Tuned Amplifier

10. Astable multivibrator

11. Monostable multivibrator

12. Bistable multivibrator

13. Wave Shaping Circuits (Integrator, Differentiator, Clippers and Clampers)

14. D/A converter using PSPICE

15. Astable multivibrator using PSPICE

16. Monostable multivibrator using PSPICE

17. Wein Bridge oscillator


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LIST OF EXPERIMENTS

S. NO DATE NAME OF THE EXPERIMENTPAGE

NO MARKS SIGNATURE

1 CURRENT-SERIES FEEDBACKAMPLIFIER 2

2 VOLTAGE SHUNT FEEDBACKAMPLIFIER 6

3 RC PHASE SHIFT OSCILLATOR 10

4 HARTELY OSCILLATOR 13

5 COLPITTS OSCILLATOR 16

6 CMOS Inverter, NAND and NOR usingPSPICE 19

7 SECOND ORDER BUTTERWORTH -LOW PASS FILTER 24

8 DIFFERENTIAL AMPLIFIER 26

9 FREQUENCY RESPONSE OFSINGLE TUNED AMPLIFIER 28

10 ASTABLE MULTIVIBRATOR 31

11 MONOSTABLE MULTIVIBRATOR 34

12 BISTABLE MULTIVIBRATOR 37

13WAVE SHAPING CIRCUITS(Differentiator, Integrator, Clipper andClamper)

40

14 D/A CONVERTER (R 2R LADDERTYPE) 51

15 ASTABLE MULTIVIBRATOR(PSPICE) 53

16 MONOSTABLE MULTIVIBRATOR(PSPICE) 55

17 WEIN BRIDGE OSCILLATOR 57


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Expt No: 1 CURRENT-SERIES FEEDBACK AMPLIFIER

Aim:To design and test the current-series feedback amplifier and to calculate the

following parameters with and without feedback.

1. Mid band gain.2. Bandwidth and cut-off frequencies.3. Input and output impedance.

Components & Equipment required:

Sl. No. Components / Equipment Range /Specifications Quantity

1 Power supply (0-30)V 12 Function generator (0-20M)Hz 13 CRO 1

4 Transistor BC107 15 Resistors6 Capacitors7 Connecting wires Accordingly

Circuit diagram:

(i) Without feedback:

0

C in

C E RE

C out

R1

R2

RC

RL BC107 B

C

E

Vin=50mV

Vcc = +12V

CRO

f=(1-3M)Hz


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(ii) With feedback:

0

C in

RE

C out

R1

R2

RC

RL BC107 B

C

E

Vin=50mV

Vcc = +12V

f=(1-3M)Hz

CRO

Theory:

The current series feedback amplifier is characterized by having shunt samplingand series mixing. In amplifiers, there is a sampling network, which samples the outputand gives to the feedback network. The feedback signal is mixed with input signal byeither shunt or series mixing technique. Due to shunt sampling the output resistanceincreases by a factor of D and the input resistance is also increased by the same factordue to series mixing. This is basically transconductance amplifier. Its input is voltagewhich is amplified as current.

Design:

(i) Without feedback:

VCC = 12V; I C = 1mA; f L = 50Hz; S = 2; R L = 4.7K ; h fe =

r e = 26mV / I C = 26 ;

hie = h fe r e =

VCE= Vcc/2 (transistor Active) =

VE = I ER E = Vcc/10

Applying KVL to output loop, we get

VCC = I CR C + V CE + I ER E


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R C =

Since I B is very small when compare with I C,

IC IE

R E = V E / IE =

S = 1+ R B / R E = 2

R B =

VB = V CC R 2 / (R 1 + R 2)

R B = R 1 || R 2

R 1 = R 2 =

XCi = Z i / 10 = (h ie || R B) / 10 =

C i = 1 / (2 f X Ci) =

Xco = (R C || R L)/10 =

Co = 1 / (2 f X Co) =

XCE = R E/10 =

CE = 1 / (2 f X CE) =

(ii) With feedback (Remove the Emitter Capacitor, C E):

Feedback factor, = -R E =

Gm = -h fe / (h ie + R E) =

Desensitivity factor, D = 1 + Gm =

Transconductance with feedback, G mf = G m / D =

Input impedance with feedback, Z if = Z i D

Output impedance with feedback, Z 0f = Z 0 D

Procedure:

1. Connect the circuit as per the circuit diagram.

2. Keeping the input voltage constant, vary the frequency from 50Hz to 3MHz inregular steps and note down the corresponding output voltage.

3. Plot the graph: Gain (dB) Vs Frequency4. Calculate the bandwidth from the graph.5. Calculate the input and output impedance.6. Remove Emitter Capacitance, and follow the same procedures (1 to 5).


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Tabular column:

(i) Without feedback:Vi =

Sl. No Frequency

(Hz)

Output Voltage

(V0) (volts)Gain = V 0/V i

Gain = 20 log(V 0/V i)

(dB)

(ii) With feedback:Vi =

Sl. No Frequency(Hz)Output Voltage

(V0) (volts)Gain = V 0/V i

Gain = 20 log(V 0/V i)(dB)

Model graph: (frequency response)

Gain in dB

Without feedback

With feedback

Frequency in Hz

Result:Thus the current series feedback amplifier is designed and constructed and the

following parameters are calculated.

Theoretical PracticalWith feedback Without feedback With feedback Without feedback

Inputimpedance

OutputimpedanceGain(midband)Bandwidth


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Expt. No. 2 VOLTAGE SHUNT FEEDBACK AMPLIFIER

Aim:To design and test the voltage-shunt feedback amplifier and to calculate the

following parameters with and without feedback.

1. Mid band gain.2. Bandwidth and cut-off frequencies.3. Input and output impedance.



1 Power supply (0-30)V 12 Function generator (0-20M)Hz 13 CRO 1

4 Transistor BC107 15 Resistors6 Capacitors7 Connecting wires

Circuit Diagram:

(i) Without Feedback:

0

C in

C E RE

C out

R1

R2

RC

BC107 B

C

E

Vin=50mV

Vcc = +12V

f=(1-3M)Hz

CRO


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(ii) With Feedback:

0

C E

Cout Rf

R2

RC R1

Vin=50mV

BC107 B

C

E

Cin

Cf

RE

Vcc = +12V

CRO

f=(1-3M)Hz

Theory:

In voltage shunt feedback amplifier, the feedback signal voltage is given to

the base of the transistor in shunt through the base resistor R B. This shunt connectiontends to decrease the input resistance and the voltage feedback tends to decrease theoutput resistance. In the circuit R B appears directly across the input base terminal andoutput collector terminal. A part of output is feedback to input through R B and increase inIC decreases I B. Thus negative feedback exists in the circuit. So this circuit is also calledvoltage feedback bias circuit. This feedback amplifier is known an transresistanceamplifier. It amplifies the input current to required voltage levels. The feedback pathconsists of a resistor and a capacitor.

Design


VCC = 12V; I C = 1mA; A V = 30; R f = 2.5K ; S = 2; h fe = ; =1/ R f = 0.0004

r e = 26mV / I C = 26 ;

hie = h fe r e =


VE = I ER E = Vcc/10 =


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Applying KVL to output loop, we get V CC = I CR C + V CE + I ER E

R C =

Since I B is very small when compare with I C, IC IE

R E = V E / IE =

S = 1+ R B / R E

R B =

VB = V CC R 2 / (R 1 + R 2)

R B = R 1 || R 2

R 1 = R 2 =

(ii) With feedback:

R O = R C || R f =

R i = (R B || h ie ) R f =

R m = -(h fe (R B || R f ) (R C || R f )) / ((R B || R f ) + h ie) =

Desensitivity factor, D = 1 + R m

R if = R i / D =

R of = R o / D =

R mf = R m / D =

XCi = R if /10 =

C i = 1 / (2 f X Ci) =

Xco = R of /10 =

Co = 1 / (2 f X Co) =

R E = R E || ((R B + h ie) / (1+h fe))

XCE = R E/10 =

CE = 1 / (2 f X CE) =

XCf = R f /10

Cf = 1 / (2 f X Cf ) = Procedure:

1. Connect the circuit as per the circuit diagram.2. Keeping the input voltage constant, vary the frequency from 50Hz to 3MHz in

regular steps and note down the corresponding output voltage.3. Plot the graph: Gain (dB) Vs Frequency


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4. Calculate the bandwidth from the graph.5. Calculate the input and output impedance.6. Remove Emitter Capacitance, and follow the same procedures (1 to 5).

Tabular Column:


Vi = 10 mVFrequency V 0

(volts)Gain = V 0/V i Gain (dB) = 20 log(V 0/V i)

(ii) With Feedback:Vi = 10 mV

Frequency V 0 (volts)

Gain = V 0/V i Gain (dB) = 20 log(V 0/V i)

Model graph: (frequency response)

Gain in dB

Without feedback

With feedback

Frequency in Hz

Result:Thus the current series feedback amplifier is designed and constructed and the

following parameters are calculated.Theoretical Practical

With feedback Without feedback With feedback Without feedbackInputimpedanceOutputimpedanceGain(midband)Bandwidth


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Expt. No. 3 RC PHASE SHIFT OSCILLATOR

Aim:To design and construct a RC phase shift oscillator for the given frequency (f 0).



1 Power supply (0-30)V 12 Function generator (0-20M)Hz 13 CRO 14 Transistor BC107 15 Resistors6 Capacitors7 Connecting wires Accordingly

Circuit Diagram:

0

0

R2 CE

C

BC107 B

C

E

C C

Cin

Cout

R R

RE

R1

R

RL

RC

Vcc = +12V

CRO


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Theory:

In the RC phase shift oscillator, the required phase shift of 180 in the feedbackloop from the output to input is obtained by using R and C components, instead of tankcircuit. Here a common emitter amplifier is used in forward path followed by three

sections of RC phase network in the reverse path with the output of the last section beingreturned to the input of the amplifier. The phase shift is given by each RC section=tan1 (1/rc). In practice R -value is adjusted such that becomes 60. If the valueof R and C are chosen such that the given frequency for the phase shift of each RCsection is 60. Therefore at a specific frequency the total phase shift from base totransistors around circuit and back to base is exactly 360 or 0. Thus the Barkhausencriterion for oscillation is satisfied

Design :

VCC = 12V; I C = 1mA; C = 0.01 F; f o = ; S = 2; h fe =

r e = 26mV / I C = 26 ;

hie = h fe r e =





R C =

Since I B is very small when compare with I C,IC IE

R E = V E / IE =

S = 1+ R B / R E = 2

R B =

VB = V BE + V E =

VB = V CC R 2 / (R 1 + R 2)

R B = R 1 || R 2

R 1 = R 2 =

Gain formula is given by,

AV =ie

Leff fe

h

R h (A v = -29, design given)

Effective load resistance is given by, R leff = Rc || R L

R L =


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XCi = {[h ie+(1+h fe)R E] || R B}/10 =

C i = 1 / (2 f X Ci) =

Xco = R leff /10 =

Co = 1 / (2 f X Co) =

XCE = R E/10 =

CE = 1 / (2 f X CE) =

Feedback Network:

f 0 = ; C = 0.01 f;

f o =RC62

1

R =

Procedure:

1. Connections are made as per the circuit diagram.2. Switch on the power supply and observe the output on the CRO (sine wave).3. Note down the practical frequency and compare with its theoretical frequency.

Model Graph:

Vout (Voltage)

Time(ms)

Result:

Thus RC phase shift oscillator is designed and constructed and the output sinewave frequency is calculated as

Theoretical Practical

Frequency


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Expt. No.4 HARTELY OSCILLATOR

Aim :To design and construct the given oscillator for the given frequency (f O).

Components & Equipment required:Sl. No. Components / Equipment

Range /Specifications Quantity

1 Power supply (0-30)V 12 Function generator (0-20M)Hz 13 CRO 14 Transistor BC107 15 Resistors6 Capacitors7 DIB8 DCB

9 Connecting wires Accordingly

Circuit Diagram:

0

0

Cin

C E RE

Cout

R1

C

R2

RC

RL

BC107 B

C

E

L1 L2

Vcc = +12V

CRO


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Theory:

Hartley oscillator is a type of sine wave generator. The oscillator derives itsinitial output from the noise signals present in the circuit. After considerable time, itgains strength and thereby producing sustained oscillations. Hartley Oscillator have two

major parts namely amplifier part and feedback part. The amplifier part has a typicallyCE amplifier with voltage divider bias. In the feedback path, there is a LCL network.The feedback network generally provides a fraction of output as feedback.

Design:

VCC = 12V; I C = 1mA; f o = ; S = 2; h fe =

r e = 26mV / I C = 26 ;

hie = h fe r e =





R C =


R E = V E / IE =

S = 1+ R B / R E = 2

R B =

VB = V BE + V E =

VB = V CC R 2 / (R 1 + R 2)

R B = R 1 || R 2

R 1 = R 2 =


AV =ie

Leff fe

h



R L =

XCi = {[h ie+(1+h fe)R E] || R B}/10 =

C i = 1 / (2 f X Ci) =

Xco = R leff /10 =


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Co = 1 / (2 f X Co) =

XCE = R E/10 =

CE = 1 / (2 f X CE) =

Feedback Network:

f 0 = ; L 1 = 1mH; L 2 = 10mH

A =

1 =

2

1

L

L

f = CLL21

21

C =

Procedure:

1. Connections are made as per the circuit diagram.2. Switch on the power supply and observe the output on the CRO (sine wave).3. Note down the practical frequency and compare with its theoretical frequency.

Model Graph:

Vout (Voltage)

Time(ms)

Result: Thus Hartley oscillator is designed and constructed and the output sine wavefrequency is calculated as


Frequency


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Expt. No.5 COLPITTS OSCILLATOR

Aim : To design and construct the given oscillator at the given operating frequency .

Equipments required:

Sl. No. Components / EquipmentRange /

Specifications Quantity

1 Power supply (0-30)V 12 Function generator (0-20M)Hz 13 CRO 14 Transistor BC107 15 Resistors6 Capacitors7 DIB8 DCB

9 Connecting wires

Circuit Diagram:

0

0

Cin

C E RE

Cout

R1

R2

RC

RL

BC107 B

C

E

C 1 C 2

Vcc =

L

CRO


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Theory:

A Colpitts oscillator is the electrical dual of a Hartley oscillator. In the Colpittscircuit, two capacitors and one inductor determine the frequency of oscillation. Theoscillator derives its initial output from the noise signals present in the circuit. After

considerable time, it gains strength and thereby producing sustained oscillations. It hastwo major parts namely amplifier part and feedback part. The amplifier part has atypically CE amplifier with voltage divider bias. In the feedback path, there is a CLCnetwork. The feedback network generally provides a fraction of output as feedback.

Design:

VCC = 12V; I C = 1mA; f o = ; S = 2; h fe =

r e = 26mV / I C = 26 ;

hie = h fe r e =





R C =


R E = V E / IE =

S = 1+ R B / R E = 2R B =

VB = V BE + V E =

VB = V CC R 2 / (R 1 + R 2)

R B = R 1 || R 2

R 1 = R 2 =


AV =ie

Leff fe

h



R L =

XCi = {[h ie+(1+h fe)R E] || R B}/10 =

C i = 1 / (2 f X Ci) =

Xco = R leff /10 =
http://en.wikipedia.org/wiki/Hartley_oscillatorhttp://en.wikipedia.org/wiki/Capacitorhttp://en.wikipedia.org/wiki/Inductorhttp://en.wikipedia.org/wiki/Frequencyhttp://en.wikipedia.org/wiki/Frequencyhttp://en.wikipedia.org/wiki/Inductorhttp://en.wikipedia.org/wiki/Capacitorhttp://en.wikipedia.org/wiki/Hartley_oscillator


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Co = 1 / (2 f X Co) =

XCE = R E/10 =

CE = 1 / (2 f X CE) =

Feedback Network:

f 0 = ; C 1 = ; C 2 =

A =

1 =

1

2

C

C

f = 2

1

21

21

C LC

C C

L =

Procedure:1. Rig up the circuit as per the circuit diagrams (both oscillators).2. Switches on the power supply and observe the output on the CRO (sine wave).3. Note down the practical frequency and compare with its theoretical frequency.

Model Graph:

Vout (Voltage)

Time(ms)

Result:Thus Colpitts oscillator is designed and constructed and the output sine wave

frequency is calculated as


Frequency


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Expt. No. 6 CMOS Inverter, NAND and NOR using PSPICE

Aim:To plot the transient characteristics of output voltage for the given CMOS inverter,

NAND and NOR from 0 to 80 s in steps of 1 s. To calculate the voltage gain, input

impedance and output impedance for the input voltage of 5V.

Parameter Table:Parameters PMOS NMOS

L 1 1 W 20 5 VTO -2 2KP 4.5E-4 2CBD 5p 5pCBS 2p 2pRD 5 5RS 2 2RB 0 0RG 0 0RDS 1Meg 1MegCGSO 1p 1pCGDO 1p 1pCGBO 1p 1p

Circuit Diagram:

(i) Inverter:

Vin

VDD = +5V

Vout

Q2

G

D

S

RL = 100K

Q1 G

D

S

2

3

1

0


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(ii) NAND

Vout

Vin1

Q1 G

D

S

Q2 G

D

S

Vin2

VDD = +5V

RL = 100K

Q4 G

D

S

Q3 G

D

S 1

3

2

4

(iii) NOR

VDD = +5V

Q2 G

D

S

RL = 100K

Vin2

Q1

G

D

S

Vout

Vin1

Q3 G

D

S

Q4 G

D

S

4

3

2

1


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Theory:

(i) InverterCMOS is widely used in digital ICs because of their high speed, low power

dissipation and it can be operated at high voltages resulting in improved noise immunity.

The inverter consists of two MOSFETs. The source of p-channel device is connected to+VDD and that of n-channel device is connected to ground. The gates of two devices areconnected as common input.

(ii) NANDIt consists of two p-channel MOSFETs connected in parallel and two n-channel

MOSFETs connected in series. P-channel MOSFET is ON when gate is negative and N-channel MOSFET is ON when gate is positive. Thus when both input is low and wheneither of input is low, the output is high.

(iii) NOR

It consists of two p-channel MOSFETs connected in series and two n-channelMOSFETs connected in parallel. P-channel MOSFET is ON when gate is negative and

N-channel MOSFET is ON when gate is positive. Thus when both inputs are high andwhen either of input is high, the output is low. When both the inputs are low, the outputis high.

Truth Table:

(i) InverterInput Output

0 11 0

(ii) NANDV1 V2 Output0 0 10 1 11 0 11 1 0

(iii) NOR

V1 V2 Output0 0 10 1 01 0 01 1 0


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Model Graph:(i) Inverter

Voltage

Input Waveform5V

time ( s)0 10 20 30 40 50 60 70 80

Output Waveform5V

time ( s)0 10 20 30 40 50 60 70 80

(ii) NAND

Voltage

Input Waveform

time ( s)0 10 20 30 40 50 60 70 80

Output Waveform

time ( s)0 10 20 30 40 50 60 70 80

time ( s)0 10 20 30 40 50 60 70 80


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(iii) NORVoltage

Input Waveform

time ( s)0 10 20 30 40 50 60 70 80

Output Waveform

0 10 20 30 40 50 60 70 80 time ( s)

time ( s)0 10 20 30 40 50 60 70 80

Output:(i) Inverter

Gain = V(2)/Vin =

Input Resistance at Vin =Output Resistance at V(2) =

(ii) NANDGain = V(4)/Vin1 = V(4)/Vin2 =Input Resistance at Vin1 =Input Resistance at Vin2 =Output Resistance at V(4) =

(iii) NORGain = V(4)/Vin1 = V(4)/Vin2 =

Input Resistance at Vin1 =Input Resistance at Vin2 =Output Resistance at V(4) =

Result:Thus the transient characteristics of output voltage for the given CMOS inverter,

NAND and NOR is plotted and the voltage gain, input impedance and output impedanceare calculated.


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Expt. No.7 SECOND ORDER BUTTERWORTH - LOW PASS FILTER

Aim:

To design and implement the second order butterworth Low pass filter usingPSPICE.

Circuit Diagram:

-

+ LM741

2 3

4

6

7

1V

RL

10K VIN

(100 - 10K)Hz

V+

RIN 1K RF 586 ohm

R2

1.59K

C2 0.1u

R1

1.59K

V-

C1 0.1u

1

0

3 5

0

2

6 VOUT

Theory:

A Low pass filter has a constant gain from 0 to f H. Hence the bandwidth of thefilter is f H. The range of frequency from 0 to f H is called pass band. The range offrequencies beyond f H is completely attenuated and it is called as stop band.

Design:

f H = 1000H Z C1= C2 =0.1 F R IN=1000

f H = 1 / 2 RC

R = 1 / 2 Cf H

R = R 1 = R 2 = 1592


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Gain = 1.586

1.586 = 1 + (R F / RIN)

R F = 586

Model Graph:

Gain (dB)

3dB

Frequency (H Z)f H

Result:

Thus Low pass filter is designed and implemented using PSPICE.


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Expt. No.8 DIFFERENTIAL AMPLIFIER

Aim:

To implement the differential amplifier using PSPICE.

Circuit Diagram:

V+

R2 10K VIN

-

+

LM741

2

3

4

6 7

V-

VIN

RIN 10K

RF 10K

RCOMP 10K

Vout 6

1 2

3 5

Theory:

A differential amplifier amplifies the difference between two voltages V 1 and V 2.The output of the differential amplifier is dependent on the difference between twosignals and the common mode signal since it finds the difference between two inputs itcan be used as a subtractor. The output of differential amplifier is

R FVO = (V 2 V 1)

R 1


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Model Graph:

Voltage

V1 time

V2

time

V3

time

Calculation:

V1 = 5V V2 = 10V

R F 10KVO = (V 2 V1) = (10 5)

R 1 10K

VO

= 5V

Output:

VO = 5V

Result:Thus a differential amplifier is implemented using operational amplifier.


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Expt. No.9 FREQUENCY RESPONSE OF SINGLE TUNED AMPLIFIER

Aim: To design and construct a single tuned amplifier and to plot the frequency

response.

Equipment Required:


1 Power supply (0-30)V 12 Function generator (0-20M)Hz 13 CRO 14 Transistor BC107 15 Resistors6 Capacitors

7 DIB8 DCB9 Connecting wires

Circuit Diagram:

BC107 B

C

E

R1

RL

V=50mV

f=(1-3M)Hz

R2

Cin

C

RE

L

CE

Cout

VCC = +10V

CRO


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Design:VCC = 12V; I C = 1mA; f o = ; S = 2; h fe =

Q = 5; L = 1mH

r e = 26mV / I C = 26 ;

hie = h fe r e =





R C =


R E = V E / IE =S = 1+ R B / R E = 2

R B =

VB = V BE + V E =

VB = V CC R 2 / (R 1 + R 2)

R B = R 1 || R 2

R 1 = R 2 =

R L =

XCi = {[h ie+(1+h fe)R E] || R B}/10 =

C i = 1 / (2 f X Ci) =

Xco = (R C ||R L) /10 =

Co = 1 / (2 f X Co) =

XCE = R E/10 =

CE = 1 / (2 f X CE) =

Q = R L / L

R L =

f 0 = LC 2

1

C =


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Procedure:1. Connect the circuit as per the circuit diagram.2. Set Vi = 50 mV (say), using the signal generator.3. Keeping the input voltage constant, vary the frequency from 0Hz to3MHz in

regular steps and note down the corresponding output voltage.

4. Plot the graph: Gain (dB) Vs Frequency

Tabular Column:

Vi = 50 mVFrequency V 0 (volts) Gain (dB) = 20 log(V 0/V i)

Model Graph: (Frequency Response)

Result:Thus single tuned amplifier is designed and constructed for the given

operating frequency and the frequency response is plotted.

GAIN(dB)

fc FREQUENCY

|A|(dB)


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Expt. No.10 ASTABLE MULTIVIBRATOR

Aim:

To design and construct an astable multivibrator using transistor and to plot theoutput waveform.

Components / Equipments Required:

Sl. No. Item name Range /Specification Quantity

1 Transistor BC107 22 Resistors 4.9K , 1.6M 2 each3 Capacitors 0.45nF 24 CRO (0-20M)Hz 1

5 Power Supply (0-30)V 16 Connecting Wires Accordingly

Circuit Diagram:

0

BC107

B

C

E

BC107 B C

E

RC R RC R

C C

Vcc = +12V

Vo1 Vo2

1.5M 1.5M 5.9K 5.9K

0.48nF 0.48nF


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Theory:

Astable multivibrator is also known as free running multivibrator. It isrectangular wave shaping circuit having non-stable states. This circuit does not need anexternal trigger to change state. It consists of two similar NPN transistors. They are

capacitor coupled. It has 2 quasi-stable states. It switches between the two states withoutany applications of input trigger pulses. Thus it produces a square wave output withoutany input trigger. The time period of the output square wave is given by, T = 1.38RC.

Design Procedure:

VCC = 10V; I C = 2mA; V CE (sat) = 0.2V; f = 1KHz; h fe =

VCC - V CE (sat) 12 0.2R C = = = 5.9K

IC 0.002

R hfe R C = 315 * 5.9 * 10 3 = 1.85M

R = 1.5M

T = 1.38RC

C = T / (1.38R) = (1 * 10 -3) / (1.38 * 1.5 * 10 6)= 0.48nF

Procedure:

1. Connections are made as per the circuit diagram.2. Switch on the power supply.3. Note down the output T ON , TOFF and output voltage from CRO.4. Plot the output waveform in the graph.

Tabular Column:

Amplitude(in volts)

TON (ms)

TOFF (ms)

Frequency(in Hz)

Vo1

Vo2


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Model Graph:

Vo1 (Volts)

Time (ms)

Vo2 (Volts)

Time (ms)

RESULT:

Thus the astable multivibrator is designed and constructed using transistor and itsoutput waveform is plotted.


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Expt. No.11 MONOSTABLE MULTIVIBRATOR

Aim:To design and construct monostable multivibrator using transistor and to plot the

output waveform.


Sl. No. Item name Range / Specification Quantity1 Transistor BC107 22 Resistors 4.9K , 1.6M 2 each3 Capacitors 0.45nF 24 CRO (0-20M)Hz 15 Power Supply (0-30)V 16 Connecting Wires Accordingly

Circuit Diagram:

BC107 B

C

E BC107

B

C

E

D1

1N4007

VCC = +12V

C

1.28nF

R1 10K

VBB = -2V

R C

5.9K

R2 100K

C1

25nF

R

1.13M

R C 5.9K

Vo1

Vo2

0


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Theory:

Monostable multivibrator has two states which are (i) quasi-stable state and (ii)stable state. When a trigger input is given to the monostable multivibrator, it switches

between two states. It has resistor coupling with one transistor. The other transistor has

capacitive coupling. The capacitor is used to increase the speed of switching. Theresistor R2 is used to provide negative voltage to the base so that Q1 is OFF and Q2 isON. Thus an output square wave is obtained from monostable multivibrator.

Design Procedure:

VCC = 12V; V BB = -2V; I C = 2mA; V CE (sat) = 0.2V; f = 1KHz; h fe =

VCC - V CE (sat) 12 0.2R C = = = 5.9K

IC 0.002

IB2(min) = I C2 / h fe =Select I B2 > I B2(min)IB2 =

VCC V BE (sat)R = =

I B2

T = 0.69RCC = T / 0.69R =

-VBBR 1 VCE (sat) R 2 VB1 = +

R 1 + R 2 R 1 + R 2

VBBR 1 VCE (sat) R 2 = (since, V B1 is very less)

R 1 + R 2 R 1 + R 2

VBBR 1 = V CE (sat) R 2R

2 =10R

1(since, V

BB= 2V and V

CE (sat) = 0.2V)

Let R 1 = 10K , then R 2 = 100K Choose C 1 = 25pF.

Procedure:

1. Connections are made as per the circuit diagram.2. Switch on the power supply.


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3. Observe the output at collector terminals.4. Trigger Monostable with pulse and note down the output T ON , TOFF and voltage

from CRO.5. Plot the waveform in the graph.

Tabular Column:

Width(ms)

Input OutputTON (ms)

TOFF(ms)

Voltage(Volts)

TON (ms)

TOFF(ms)

Voltage(Volts)

Model Graph:

Vo1 (Volts)

Time (ms)

Vo2 (Volts)

Time (ms)

Result:

Thus the monostable multivibrator is designed and constructed using transistorand its output waveform is plotted.


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Expt. No.12 BISTABLE MULTIVIBRATOR

Aim:

To design a bistable multivibrator and to plot its output waveform.


Sl. No. Item name Range / Specification Quantity1 Transistor BC107 22 Resistors 4.9K , 1.6M 2 each3 Capacitors 0.45nF 24 CRO (0-20M)Hz 15 Power Supply (0-30)V 16 Connecting Wires Accordingly

Circuit Diagram:

0

RC

BC107 B

C

E

BC107 B

C

E

C C

RC

R2

R1

R2

R1

D1 1N4007 D2 1N4007

VCC = +10V

Vo1 Vo2

VBB=-2V

Pulse Trigger (VT < VCC)

1.8M 1.8M

10K 10K

50pF 50pF

5.9K 5.9K


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Theory:

The bistable multivibrator has two stable states. The multivibrator can existindefinitely in either of the twostable states. It requires an external trigger pulse tochange from one stable state to another. The circuit remains in one stable state until an

external trigger pulse is applied. The bistable multivibrator is used for the performanceof many digital operations such as counting and storing of binary information. Themultivibrator also finds an applications in generation and pulse type waveform.

Design:

VCC =12V; V BB = -12V; I C = 2mA; V CE (sat) = 0.2V; V BE (sat) = 0.7V

VCC - V CE (sat) 12 0.2R C = = = 5.9K

IC 0.002

R 2 hfe R C = 315 * 5.9 * 10 3 = 1.85M

R 2 = 1.8M

Let R 1 = 10K , C 1 = C 2 = 50pF

Procedure:

1. Connections are made as per the circuit diagram.

2. Set the input trigger using trigger pulse generator.3. Note the output waveform from CRO and plot the graph.

Tabular Column:

InputVoltage(Volts)

Width(ms)

Input OutputTON (ms)

TOFF(ms)

Voltage(Volts)

TON (ms)

TOFF(ms)

Voltage(Volts)


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Model Graph:

Vo1 (Volts)

Time (ms)

Vo2 (Volts)

Time (ms)

Result:

Thus bistable multivibrator has been constructed and its output waveforms arestudied.


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Expt. No. 13 WAVE SHAPING CIRCUITS(Differentiator, Integrator, Clipper and Clamper)

Aim: To design and implement different wave shaping circuits (Differentiator,Integrator, Clipper and Clamper).



1 Function / Pulse generator (0 3M)Hz 12 CRO (0-20M)Hz 1

3 Resistor 1K / 100K 14 Capacitor 0.1 F 15 Connecting wires Accordingly

Circuit Diagram:

(i) Differentiator:

0

0.1uF

1K /100K

Vin=5V

CRO

R

C

f= 1KHz

(ii) Integrator:

0

1K / 100K

0.1uF

Vin=5V

CRO f= 1KHz

R

C


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(iii) Clipper:

(a) Series Positive Clipper:

0

Vin=5V R 1N4007

f=1KHz

D

10K

CRO

(b) Shunt Positive Clipper:

0

Vin=5V

1N4007

R

f=1KHz

10K

CRO

D

(c) Series Negative Clipper:

0

Vin=5V R 1N4007

f=1KHz

D

10K

CRO

(d) Shunt Negative Clipper:

0

Vin=5V

1N4007

R

f=1KHz

10K

CRO D


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(e) Positive Biased Series Positive Clipper:

0

Vin=5V

R 1N4007

2V

f=1KHz

D

10K CRO

VB

(f) Positive Biased Shunt Positive Clipper:

0

2V

Vin=5V

1N4007

R

f=1KHz VB

CRO

10K

D

(g) Positive Biased Series Negative Clipper:

0

Vin=5V

R 1N4007

2V

f=1KHz

D

10K CRO

VB


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(h) Positive Biased Shunt Negative Clipper:

0

2V

Vin=5V

1N4007

R

f=1KHz VB

CRO

10K

D

(i) Negative Biased Series Positive Clipper:

0

Vin=5V

R 1N4007

2V f=1KHz

D

10K CRO

VB

(j) Negative Biased Shunt Positive Clipper:

0

2V

Vin=5V

1N4007

R

f=1KHz VB CRO

10K

D


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(k) Negative Biased Series Negative Clipper:

0

Vin=5V

R 1N4007

2V

f=1KHz

D

10K CRO

VB

(l) Negative Biased Shunt Negative Clipper:

0

2V

Vin=5V

1N4007

R

f=1KHz VB

CRO

10K

D

(m) Combinational Clipper

0

Vin=5V

1N4007

R

2V 2V

1N4007

f=1KHz

CRO

10K

D

VB VB

D


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(iv) Clamper:

(a) Positive Clamper:

0

Vin=5V 1N4007

R

0.1uF

10K f=1KHz

D CRO

C

(b) Negative Clamper:

0

Vin=5V 1N4007

R

0.1uF

10K f=1KHz

D CRO

C

Theory:

(i) Differentiator:

The high pass RC network acts as a differentiator whose output voltage dependsupon the differential of input voltage. Its output voltage of the differentiator can beexpressed as,

dVout = Vin

dt


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(ii) Integrator:

The low pass RC network acts as an integrator whose output voltage dependsupon the integration of input voltage. Its output voltage of the integrator can beexpressed as,

Vout = Vin dt

(iii) Clipper:

This circuit is basically a rectifier circuit, which clips the input waveformaccording to the required specification. The diode acts as a clipper. There are severalclippers like positive clipper, negative clipper, etc. Depending upon the connection ofdiode it can be classified as series and shunt.

(iv) Clamper:

The clamper circuit is a type of wave shaping circuit in which the DC level of theinput signal is altered. The DC voltage is varied accordingly and it is classified as

positive clamper or negative clamper accordingly.

Design:

(i) Differentiator:

f = 1KHz = RC = 1ms

If C = 0.1 FThen R = 10K For T > , Choose R = 100K

(ii) Integrator:

f = 1KHz = RC = 1ms

If C = 0.1 FThen R = 10K

For T > , Choose R = 100K

Procedure:

1. Connect the circuit as per the circuit diagram.2. Set Vin = 5V and f = 1KHz.3. Observe the Output waveform and plot the graph.


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Model Graph:

(i) Differentiator

Vin (Volts)

Time (ms)

Vout (Volts)

Time (ms)

Time (ms)

(ii) Integrator

Vin (Volts)

Time (ms)

Vout (Volts)

Time (ms)

Time (ms)


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(iii) Clipper:

Vin (Volts)

Time (ms)

Vout (Volts)Series Positive Clipper

Time (ms)

Shunt Positive Clipper

Time (ms)

Series Negative Clipper

Time (ms)

Shunt Negative Clipper

Time (ms)

Positive Biased Series Positive Clipper

2VTime (ms)


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Positive Biased Shunt Positive Clipper

2VTime (ms)

Positive Biased Series Negative Clipper

2VTime (ms)

Positive Biased Shunt Negative Clipper

2VTime (ms)

Negative Biased Series Positive Clipper

Time (ms)-2V

Negative Biased Shunt Positive Clipper

Time (ms)-2V

Negative Biased Series Negative Clipper

Time (ms)-2V


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Negative Biased Shunt Negative Clipper

Time (ms)-2V

Combinational Clipper

2V

Time (ms)-2V

(iv) Clamper:

Positive Clamper:

Time (ms)

Negative Clamper:Time (ms)

Result:

Thus different wave shaping circuits are studied and their output waveforms are plotted.


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EXPT NO.14 DIGITAL TO ANALOG CONVERTER(R 2R LADDER TYPE)

Aim:

To construct a 8 bit digital to analog converter using R 2R ladder type.

Circuit Diagram:

10K

20K

V-

20K

-

+ LM741

4

5

8

6

7 10K 10K

V+

VOUT

20K

20K 20K

-10V

1

0

0 0 0

2 3

0

9

Theory:

A DAC accepts an n bit input word b1, b2, , bn in binary and produces ananalog signal that is proportional to the input. In this type of DAC, reference voltage isapplied to one switch and the other switches are grounded. It is easier to build andnumber of bits can be expanded by adding more R 2R sections. The circuit slow downdue to stray capacitance.

Observation:

d1 (MSB) d2 d3 (LSB) Output VoltageVO (Volts)0 0 0 00 0 1 1.250 1 0 2.50 1 1 3.751 0 0 51 0 1 6.251 1 0 7.51 1 1 8.75


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Calculation:

Output Voltage, V O = V R (d12-1 + d 22

-2 + d 32-3 )

For 100, V O = 5V

Output:

VO = 5V

Model Graph:

Voltage

5V

time

Result:Thus R 2R ladder type digital to analog converter is implemented.


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EXPT NO.15 ASTABLE MULTIVIBRATOR

Aim:To plot the transient response of voltages at collector terminals of the two

transistors Q1 and Q2. Initial node voltages at collector and base are zero.

Circuit Diagram:

C2

0.9nF

Q1 BC107

B C

E

R4 4.9K

R2 4.9K

R1 850K

VCC = +10V

R3 850K

C1

0.9nF

Q2 BC107

B

C

E

Vo1 Vo2

0

5

4 1 3 2

Theory:

It has two quasi stable states. The transition between the two states occursautomatically due to charging and discharging of the capacitors and not due to anyexternal trigger. Thus none of the transistor is allowed to remain in ON or OFF state.

Design:

VCC = 10V; I C = 2mA; V CE = 0.2V; C = 0.9nF

VCC V CE (sat) 10 0.2R C = = = 4.9K

IC 0.002

R hfe R C = 850K


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T = 1.38 R CT = 1msC = T / (1.38R) = 0.9nF

Model Graph:

Voltage

V01

Time (ms)0 0.5 1 1.5

V02

Time (ms)0 0.5 1 1.5

Result:

Thus astable multivibrator is designed and transient response is plotted.


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EXPT NO. 16 MONOSTABLE MULTIVIBRATOR

Aim:To plot the transient response of voltages at collector terminals of Q1 and Q2.

Initial voltages of base and collector of Q1 transistor is zero.

Circuit Diagram:

Q2 BC107

B C

E

Q1 BC107

B C

E

D1

1N4007

VCC = +12V

C1

3.2nF

R5 10K

VBB = -2V

R2 5.9K

R1 100K

C2

25nF

R3 452K

R4 5.9K

6

3 7 2

5

4 1

Vo1

Vo2

0

Theory:

Monostable multivibrator has two states which are (i) quasi-stable state and (ii)stable state. When a trigger input is given to the monostable multivibrator, it switches

between two states. It has resistor coupling with one transistor. The other transistor hascapacitive coupling. The capacitor is used to increase the speed of switching. Theresistor R2 is used to provide negative voltage to the base so that Q1 is OFF and Q2 isON. Thus an output square wave is obtained from monostable multivibrator.


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Model Graph:

Vo1 (Volts)

Time (ms)

Vo2 (Volts)

Time (ms)

Result:

Thus monostable multivibrator is designed and transient response is plotted.


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RESULT:

The frequency of the wein bridge oscillator is calculated and is verified

VIVA QUESTIONS:

1. Give the formula for frequency of oscillations?

2. What is the condition for wien bridge oscillator to generate oscillations?

3. What is the total phase shift provided by the oscillator?

4. What is the function of lead-lag network in Wein bridge oscillator?

5. which type of feedback is used in Wein bridge oscillator

6. What is gain of Wein bridge oscillator?

7. what are the application of Wein bridge oscillator8. What is the condition for oscillations?

9. What is the difference between damped oscillations undamped

Oscillations?

Wein bridge oscillator is either LC or RC oscillator.

Documents

Electronics Circuits II Lab Manual_2