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ELEN 248 – Intro to Digital Systems Design (200, 504, 505 & 506) Prof Weiping “Peter” Shi

ELEN 248 – Intro to Digital Systems Design (200, 504, 505 & 506)

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ELEN 248 – Intro to Digital Systems Design (200, 504, 505 & 506). Prof Weiping “Peter” Shi. Why Digital Circuits?. The entire electronic age is based digital circuits!. Applications & Services. Electronics Industry. Digital circuit Industry. Integrated Digital Circuits. - PowerPoint PPT Presentation

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Page 1: ELEN 248 – Intro to Digital Systems Design (200, 504, 505 & 506)

ELEN 248 – Intro to Digital Systems Design (200, 504, 505 & 506)

Prof Weiping “Peter” Shi

Page 2: ELEN 248 – Intro to Digital Systems Design (200, 504, 505 & 506)

Jan 18, 2007 ELEN 248 2 of 28

Why Digital Circuits?

• The entire electronic age is based digital circuits!

Digital circuit

Industry

Electronics Industry

Applications & Services

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Integrated Digital Circuits

• Jack Kirby, a former professor of this department, invented Integrated Circuits in 1959 at Texas Instruments.

• He argued that by putting all electronic components into a single die, performance would increase and cost would decrease.

• Moore’s Law states the density doubles every 18 months– Today, the price of a transistor is less than a grain of rice– Had the transportation industry grow as fast, flight from

JFK to LAX would take a few seconds and cost a few cents!

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What is Logic Design?

• Given a specification, derive a solution using available electronic components

• Meeting criteria for performance, cost, power, reliability, etc

• Design verification checks if the design is correct in terms of function and performance

• Design optimization transforms a lousy design to one with better quality

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Boolean Algebra

• Number systems: Unary, binary, decimal, dozenal, bidecimal, …

• Binary system: 0 and 1– 800BC: Oldest record of binary number system by Indian

mathematician Pingala– 1854: British mathematician George Boole published a

landmark paper, establishing Boolean Algebra– 1937: MIT student Claude Shannon did his master thesis,

using Boolean algebra to build the first digital electronic circuit

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Boolean Algebra

• Variables and Functions

B&V: Figure 2.1. A binary switch.

x 1 = x 0 =

(a) Two states of a switch

S

x (b) Symbol for a switch

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Variables and Functions cont’d…

B&V: Figure 2.2. A light controlled by a switch.

(a) Simple connection to a battery

S

Battery Light x

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On and Off

Switch is off (A=0)

Light is off (L=0)

A L

Switch is on (A=1)

Light is on (L=1)

L A

AL

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Variables and Functions cont’d…

B&V Figure 2.3. Two basic functions.

(a) The logical AND function (series)

S

Power supply

S

S

Power supply S

(b) The logical OR function (parallel)

Light

Light x1 x2

x1

x2

B&V: Figure 2.5. An inverting circuit.

S Light Power supply

R

x

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Embedded Quiz: Control a light with two switches

• Your living room leads to the front door in one direction and your bedroom in the other direction.

• You want to install two switches, one near the front door and one near the bedroom, so that at night you can turn on the light when entering your home, and turn it off on the way to the bedroom.

• How to do it?• What about three switches for one light? Four?

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Variables and Functions cont’d…

• Notation

Buffer L(x) = xAND gate L(x1,x2) = x1 • x2 = x1x2

OR gate L(x1,x2) = x1 + x2

NOT gate L(x) = x’ = !x = ~x = x

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Variables and Functions cont’d…• Symbols

x •x2 1

(a) AND gates

(b) OR gates

(c) NOT gate

x1 x2

x1 x2

xn

x •x2• … • xn1

x1 x2

x +x2 1

x1 x2

xn

x +x2+ … + xn1

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Boolean Algebra

• Truth Tables of Functions

Variables Functions

All possible values of variables

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Embedded Quiz: Truth Tables

• If a function f(x1, x2, …, xn) has n variables, how many rows are there in the truth table? How many columns?

• Two functions are different, if their truth tables are different. How many different n-variable Boolean functions are there?

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Exercise: Boolean Functions on 1 and 2 variables

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Boolean Algebra

Axioms1a. 0•0 = 01b. 1+1 = 12a. 1•1 = 12b. 0+0 = 03a. 0•1 = 1•0 = 03b. 1+0 = 0+1 = 14a. If x=0, then x’ =

14b. If x=1, then x’ =

0

Theorems (via perfect induction)5a. x•0 = 05b. x+1 = 16a. x•1 = x6b. x+0 = x7a. x•x = x7b. x+x = x8a. x •x’ =08b. x+x’ = 19. x’’ = x

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Boolean AlgebraTwo- and Three- Variable Properties

Commutative10a. x•y = y•x10b. x+y = y+x

Associative11a. x•(y•z) = (x•y) •z11b. x+(y+z) = (x+y)+zDistributive12a. x•(y+z) = x•y + x•z12b. x+y•z = (x+y)•(x+z)Absoption13a. x+x•y = x13b. x•(x+y) = x

Combining

14a. x•y + x•y’ = x14b. (x+y)•(x+y’) = xDeMorgan’s theorem15a. (x•y)’ = x’ + y’15b. (x+y)’ = x’ • y’

16a. x+x’•y = x+y16b. x•(x’+y) = x•y

Consensus17a. x•y+y•z+x’•z = x•y + x’•z17b. (x+y)•(y+z)•(x’+z) = (x+y)•(x’+z)

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Boolean Algebra

Proof techniques(a) Truth Table (b) Venn Diagram

B&V: Figure 2.11. Proof of DeMorgan’s theorem in 15a.

B&V: Figure 2.12. The Venn diagram representation.

x y

z x

x y x y

x x’ x’

(a) Constant 1 (b) Constant 0

(c) Variable x (d) x’

(e) x•y (f) x+y

(g) x•y’ (h) z+x•yy

x

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Venn Diagram Proof Example

B&V: Figure 2.14. Verification of x•y + y•z + x’•z = x•y + x’•z

x y

z

y x

z

x y

z

x•y

y•z

x’•z

x y

z

x•y

x y

z

x’•z

y

z

x

y

z

x

x•y + y•z + x’•z

x•y + x’•z

Page 20: ELEN 248 – Intro to Digital Systems Design (200, 504, 505 & 506)

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Exercise: Prove or disprove

• (x1+x3)*(x1’+x3’) = x1*x3’ + x1’*x3’

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Combinational vs. Sequential Logic

General form of a sequential circuit.

Combinational

circuit … …N inputs M outputs Outputs depend ONLY upon inputs

General form of a combination logic circuit

Outputs depend upon inputs and previous inputs

Combinational

circuit … …N inputs M outputs

KStorage

Clock

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2-Level Combinational Logic Synthesis and Optimization

B&V: Figure 2.15. A function to be synthesized.

f

(a) Canonical sum-of-products

f

(b) Minimal-cost realization

x 2

x 1

x 1 x 2

B&V: Figure 2.16. Two implementations of a function in

Figure 2.15.

Example Problem Desired: low cost solution

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2-Level Combinational Logic Synthesis and Optimization Sum-of-Products/Product-of-

Sums

B&V: Figure 2.17 Three-variable minterms and maxterms.

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2-Level Combinational Logic Synthesis and Optimization Example

f = m1+m4+m5+m6

f = M0•M2•M3•M7

B&V: Figure 2.18. A three-variable function.

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2-Level Combinational Logic Synthesis and Optimization Example cont’d…

B&V: Figure 2.19. Two realizations of a function in Figure 2.18.

f

(a) A minimal sum-of-products realization

f

(b) A minimal product-of-sums realization

x1

x 2

x3

x2

x1x3

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Aside: NAND and NOR realizations

B&V: Figure 2.22. Using NAND gates to implement a sum-of-products.

x1 x2 x3 x4 x5

x1 x2 x3 x4 x5

x1 x2 x3 x4 x5

B&V: Figure 2.23. Using NOR gates to implement a product-of sums.

x1 x2 x3 x4 x5

x1 x2 x3 x4 x5

x1 x2 x3 x4 x5

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2-Level Combinational Logic Synthesis and Optimization

Karnaugh Maps recall min terms

B&V: Figure 4.7. Examples of four-variable Karnaugh maps.

x 1 x

2 x 3 x

4

1

00 01 11 10

0 0 1

0 0 0 0

1 1 1 0

1 1 0 1

00

01

11

10

x 1 x

2 x 3 x 4

1

00 01 11 10

1 1 0

1 1 1 0

0 0 1 1

0 0 1 1

00

01

11

10

x 1 x

2 x 3 x

4

0

00 01 11 10

0 0 0

0 0 1 1

1 0 0 1

1 0 0 1

00

01

11

10

x 1 x

2 x 3 x

4

0

00 01 11 10

0 0 0

0 0 1 1

1 1 1 1

1 1 1 1

00

01

11

10

f 1 x 2 x

3 x 1 x 3 x 4 + = f 2 x

3 x 1 x

4 + =

f 3 x 2 x 4 x 1 x

3 x 2 x

3 x 4 + + = f

4 x 1 x 3 x 1 x

3 + + = x 1 x

2

x 2 x 3 or

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Design Flow

B&V: Figure 2.29. A typical CAD system.

VerilogSchematic capture

DESIGN ENTRY

Design correct?

Functional simulation

No

Yes

No

Synthesis

Physical design

Chip configuration

Timing requirements met?

Timing simulation

Step 1: Describe System (e.g. “flow chart”, “requirements”)

Step 2: Think about the hardware you want to build! Building blocks.

Step 3: Only then, write Verilog

Hardware Description Languages

CHALLENGE: If you do step 3 without or before the other two, you are (very likely) going to end up with a poor quality circuit. This isn’t a programming course!

Design Spec

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Verilog Example

module LogicFunc(f, x1, x2, x3); input x1, x2, x3; output f; assign f = (x1 & x2) | ((~x2) &

x3);

endmodule

B&V: Figure 2.30. A simple logic function.

f

x3

x1x2

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Jan 18, 2007 ELEN 248 30 of 28

Suggested Reading

• Brown and Vranesic – Chapter 2

• Next week (Jan 23 & Jan 25), I will attend a conference in Japan. Dr. Choi will teach for me.

• On Jan 30, please bring a sheet of paper with your name, email address, phone number and a photo on it. It’s for me to know who is who. No one else will get it.