6
 Indian Journal of Science and Technology Vol.2 No 4 (Mar. 2009) ISSN: 0974- 6846 Research article “Reed-Solomon coding” Pasricha & Sharma Indian Society for Education and Environment (iSee) http://www.indjst.org  Indian J.Sci.Technol. 48  Fig.1. General block diagram of c ommunication syst em FPGA based design of Reed Solomon codes ShivaniPasrichaandSanjaySharma 1 ECE,AmitySchoolofEngg.&Technol.Bijwasan,NewDelhi-110061; 1 ThaparUniversity,Patiala,India. [email protected];[email protected] 1 Abstract :Thispaperpresentsanovelarchitecturedesign for forwar d er ror corr ecti on techni que based on RS codingschemeforwirelessapplications.Thedesignwas creat edusingSyste mGenerat orforDSPtoolfromXili nx andwassimulatedonMatlab/Simulinkenvironment.The hardware descr iptio n langua ge source codefor diffe rent blocks was generated and the desi gn was subjec ted to seve re functi onal and timi ng constr aints usin g Xilinx FoundationseriesandModelSimtools.SynplifyProtool wasfinallyusedtosynthesizethecompletedesign.The overall architecture for RS Coder-Decoder was impl emented on Xilinx Virtex-II XC2v25 0 de vi ce and consumed slices 1429 for the CODEC at a clock fr equency of 90 MHz. The ar chitecture desi gn pow er consumptionanalysiswasdoneusingtheXilinxXpower toolanditcameouttobeabout783mW. Keywords :FPGA,Reed-Solomoncoding. Introduction Reed-Solomon codes are block-based error correcti ng codes wi th a wi de range of appl icat ions in di gi ta l commun ic at ions an d storage (Ma rti n 19 98 ]. Encoding data using an RS code is relatively straightforward,butdecodingistime-consuming.Despite major effic iencyimproveme nts made by Berl ekamp and others du ri ng the 1960 's (Berlekamp 19 68) Re ed - Solomon co de s are used to correct error s in ma ny systems including Wir ele ss or mobile communications (i ncludi ng cellular telepho nes, micr owave links, et c) , Satellitecommunications,High-speedmodems,Storage device s (incl uding tape, Comp act Disk, DVD, barcodes, etc).AtypicalsystemisshownhereinFig.1 Digital source R-S Encoder Communication channel R-S Decoder Digital sink Noise TheReed-Solomonencodertakesablockofdigitaldata and adds extra "r edunda nt " bi ts . Er rors oc cur du ri ng transmissi on or stor age for a number of reasons (f or examp le noiseor inter feren ce, scrat cheson a CD,etc). The Ree d-Solo mon decoder processes each block and attempts to corre ct error s and recov er the origi nal data. The number and type of er rors that can be corr ected depends on the characteri st ics of the Reed-Sol omon code. AnRScodediffers fromaHamming codeinthatit encodesgroupsofbitsinsteadofonebitatatime.We will call these groups digits (or symbols or “coeff icients”). Adigit iserror free ifandonlyifall ofits bi ts are er ror- fr ee. For instance, if a di gi t is an 8-bit character,andthreebitsofthesamesinglecharacterare inerror,wewillcountthatasonecorrupteddigit.There ar e two corrupted di gi ts (but more than two corrupted bits) int hefol lowi ngex ample . Original: 10110001 1101 1111 01001011 0 1011100 Received: 10110101110111110111000101011100 Corrupted: yes no yes no Ifwe wan t to send a k dig itplaint ext message,RS will send n = k + 2s di gi ts, and gua rant ee that the corr ect mes sage can bereconstr uct edat the otherend ifthere are fewer than s corrupted digits. An example of commonlyusedparameters:k=223,s=16,n=k+2s= 255,givingtheabilitytocorrect16corrupteddigitsoutof eve ry 255-di git tra nsmission. In general, the number of bit s in a digitand the par ameter s n and s are tun ed to optimizeforyourapplication. Constructing the field We intr oduce her e the basi c al gebr ai c defi ni ti ons whichwillbeusedinthissection. Groups  A group is a tuple (G; *;  ε), wh er e G is a set of el ements, * is a bi nary operat or on G, and e ε G is a design ated iden tit y ele ment G must have the fol lowing properties: 1.*isclosed. For all a;bεG,a*b εG. 2. * i s asso ci at iv e. For all a ; b; c εG,(a*b)*c =a*(b*c). 3.a εG,a*ε=ε*a=a. 4.Foreacha εGthereisanelementa -1 εGsuchthat a -1 *aa -1 =a -1 *a=ε Fields A fi el d is a tupl e (F, +, *, 0, 1), where F is the set of elements, + is the addition operator, * is the multiplicationoperator,0 εFistheadditiveidentity,and 1  ε F is th e mu lt ipli cati ve id enti ty . F mu st have the followingproperties: 1.(F;+;0)formsagroup. 2.*isassociativeanddistributesover+. 3.(F\{0};*;1)formsagroup. Note:``thefieldF''meansthefieldwhosesetisF,with the stan da rd operators for that se t. Fiel ds th at we commonly wo rk wi th in cl ude th e re al , comple x, and rational numbers. The set of integers is not a fi eld. It satisfiesthefirsttwoproperties,butfailsthethirdproperty because not all int egers hav e mul tip licative inverses. A set like the integers which sati sf ies the first two fi el d propertiesiscalleda“ring”.  Galoisfields Wenowturntothequestionofconstructingthefield Ffromwhichthecoefficientsofm(x)aredrawn.Abasic resultfromnumbertheoryisthatifpisprime,thentheset ofintegersmodulop(denotedZ p )isafield.Soifthereare aprimenumberpofpossibledigits,wecanuseZ p asour field(Azaleah2003).However,thatistrueifandonlyifp is prime. Unfor tunat ely,in compu terapplicati ons we are

FPGA Based Design of Reed Solomon Codes

Embed Size (px)

Citation preview

7/21/2019 FPGA Based Design of Reed Solomon Codes

http://slidepdf.com/reader/full/fpga-based-design-of-reed-solomon-codes 1/5

Indian Journal of Science and Technology Vol.2 No 4 (Mar. 2009) ISSN: 0974- 6846

Research article “Reed-Solomon coding” Pasricha & SharmaIndian Society for Education and Environment (iSee) http://www.indjst.org Indian J.Sci.Technol

48

Fig.1. General block diagram of communication system

FPGA based design of Reed Solomon codesShivaniPasrichaandSanjaySharma

1

ECE,AmitySchoolofEngg.&Technol.Bijwasan,NewDelhi-110061;1 ThaparUniversity,Patiala,India.

[email protected];[email protected]

Abstract:Thispaperpresentsanovelarchitecturedesignfor forward error correction technique based on RS

codingschemeforwirelessapplications.ThedesignwascreatedusingSystemGeneratorforDSPtoolfromXilinxandwassimulatedonMatlab/Simulinkenvironment.Thehardwaredescription languagesource codefor differentblocks was generated and the designwas subjected tosevere functional and timing constraints using XilinxFoundationseriesandModelSimtools.SynplifyProtoolwasfinallyusedtosynthesizethecompletedesign.Theoverall architecture for RS Coder-Decoder wasimplemented on Xilinx Virtex-II XC2v250 device andconsumed slices 1429 for the CODEC at a clockfrequency of 90 MHz. The architecture design powerconsumptionanalysiswasdoneusingtheXilinxXpower

toolanditcameouttobeabout783mW.Keywords :FPGA,Reed-Solomoncoding.Introduction

Reed-Solomon codes are block-based errorcorrecting codes with a wide range of applications indigital communications and storage (Martin 1998].Encoding data using an RS code is relativelystraightforward,butdecodingistime-consuming.Despitemajor efficiencyimprovementsmadebyBerlekamp andothers during the 1960's (Berlekamp 1968) Reed-Solomon codes are used to correct errors in manysystems including Wireless or mobile communications(including cellular telephones, microwave links, etc),Satellitecommunications,High-speedmodems,Storage

devices (includingtape,CompactDisk, DVD, barcodes,etc).AtypicalsystemisshownhereinFig.1

Digital sourceR-S Encoder

Communication

channelR-S Decoder

Digital sink

Noise

TheReed-Solomonencodertakesablockofdigitaldata

and adds extra "redundant" bits. Errors occur duringtransmission or storage for a number of reasons (forexamplenoiseor interference,scratcheson aCD,etc).

The Reed-Solomon decoder processes each blockandattempts tocorrecterrors and recover theoriginaldata.The number and type of errors that can be correcteddepends on the characteristics of the Reed-Solomoncode.AnRScodediffersfromaHammingcodeinthatitencodesgroupsofbitsinsteadofonebitatatime.Wewill call these groups “digits” (or “symbols” or“coefficients”).Adigit iserror free ifandonlyifallofitsbits are error-free. For instance, if a digit is an 8-bitcharacter,andthreebitsofthesamesinglecharacterareinerror,wewillcountthatasonecorrupteddigit.There

are two corrupted digits (but more than two corruptedbits)inthefollowingexample.

Original:1011000111011111 0100101101011100Received:10110101110111110111000101011100Corrupted: yes no yes noIfwe want tosenda k digitplaintextmessage,RSwilsend n = k + 2s digits, and guarantee that the correcmessagecan bereconstructedat theotherend ifthereare fewer than s corrupted digits. An example ocommonlyusedparameters:k=223,s=16,n=k+2s=255,givingtheabilitytocorrect16corrupteddigitsoutofevery255-digit transmission. In general, the number obits ina digitand the parametersnand s are tuned tooptimizeforyourapplication.Constructing the field

We introduce here the basic algebraic definitionswhichwillbeusedinthissection.Groups

A group is a tuple (G; *; ε), where G is a set oelements, * is abinary operator onG, and eεGisadesignated identity element G must have the followingproperties:1.*isclosed. Forall a;bεG,a*bεG.2.*isassociative. Forall a;b;cεG,(a*b)*c=a*(b*c).3.aεG,a*ε=ε*a=a.4.ForeachaεGthereisanelementa

-1εGsuchtha

a-1*aa

-1=a

-1*a=ε

Fields

Afieldisatuple(F,+,*,0,1),whereFisthesetoelements, + is the addition operator, * is themultiplicationoperator,0 εFistheadditiveidentity,and1 ε F is the multiplicative identity. F must have thefollowingproperties:1.(F;+;0)formsagroup.2.*isassociativeanddistributesover+.3.(F\0;*;1)formsagroup.Note:``thefieldF''meansthefieldwhosesetisF,withthe standard operators for that set. Fields that wecommonly work with include the real, complex, andrational numbers. The set of integers is not a field. Isatisfiesthefirsttwoproperties,butfailsthethirdpropert

because not all integershavemultiplicative inverses. Aset like the integers which satisfies the first two fieldpropertiesiscalleda“ring”. Galoisfields

WenowturntothequestionofconstructingthefieldFfromwhichthecoefficientsofm(x)aredrawn.Abasicresultfromnumbertheoryisthatifpisprime,thentheseofintegersmodulop(denotedZp)isafield.Soifthereareaprimenumberpofpossibledigits,wecanuseZpasoufield(Azaleah2003).However,thatistrueifandonlyifpisprime.Unfortunately,in computerapplicationsweare

7/21/2019 FPGA Based Design of Reed Solomon Codes

http://slidepdf.com/reader/full/fpga-based-design-of-reed-solomon-codes 2/5

Indian Journal of Science and Technology Vol.2 No 4 (Mar. 2009) ISSN: 0974- 6846

Research article “Reed-Solomon coding” Pasricha & SharmaIndian Society for Education and Environment (iSee) http://www.indjst.org Indian J.Sci.Technol

49

likelytowantdigitsthatwecanencodewithr>1bits;forinstance, 8-bit characters. This means we have anon-prime number 2

r of possible digits. Fortunately, it

can be proven that for any prime p and any naturalnumberrthereexistsafinitefieldwithprnumbers.(Infactthereverseisalsotrue---everyfinitefieldhasprnumbers,

where p is prime). There is a way to generate such afield.ItiscalledaGaloisfield,anditcanbeshownthatany finite fieldof sizepr isisomorphicto aGalois field.Galois fieldsare constructedwiththehelpofZp [x], thesetofpolynomialswithcoefficientsin Zp.We'reusedtodealing with polynomials with real coefficients(polynomialsinR[x]),sothearithmeticofpolynomialsinZp[x] may seem counterintuitive. Take F = Z2, forinstance. Arefresheronhowarithmeticmodulo2works:0+0=00+1=11+0=1

1+1=0Nowforexample,leta;bεZ2[x],a(x)=x

2+x,b(x)=x.

Thenwecandotheadditiona(x)=x

2+1x

b(x)=0x2+1x

a(x)+b(x)=1x2+0x=x

2

whichisofcourseadifferentresultthanwewouldhavegottenifa(x);b(x)εR[x];inthatcasewewouldhavehad (x

2 + x) + (x) = x

2 + 2x. Now to define modulo

arithmetic for polynomials: a(x) modulo g(x) is anotherpolynomial r(x) with degree strictly less than g(x), andsatisfyinga(x)=g(x)q(x)+r(x)forsomepolynomialq(x).Exercise: Prove that the polynomial r(x) with those

properties exists, is unique, and is the same as theremainderofpolynomiallongdivisionwhendividinga(x)byg(x).Considerthe set Zp [x] ofpolynomialsoverthefieldZpandanirreduciblepolynomialg(x)ofdegreer.Anirreduciblepolynomialisonethatcannotbefactoredintoaproductoflower-degreepolynomialsoverZp.NowletFbethesetofallpolynomialsinZp[x]withdegreeatmostr- 1, with the operations of polynomial additional andpolynomial multiplication modulo g(x). Obviously therearepr suchpolynomials(each ofr coefficients cantakeoneofpossiblevalues).WewilldenotethefieldGF(p r)(recall that r isthedegreeofpolynomialg(x)).Thuswenow have amethod of constructing finite fields with pr

elements.Notethatwedon'tneedg(x)toenumeratetheelementsofGF(pr).Theelementsareallthepolynomialswith degree at most r - 1. However, we need g(x) todefineoperationsinthisfield(i.e.,themultiplicationofthefields' elements will be taken modulo g(x)) 1.Unfortunately,thereisnosimplemethodofobtaininganirreduciblepolynomial(therearecomplicatedprobabilisticalgorithms that can do that,butwewon'tdescribe themhere).However,irreduciblepolynomialsformostcommonfinite fields have been found and published (Christian1989). Also, it can be proven that an irreducible

polynomialofdegree roverZpexists for everypositiveintegerr.LetusconsideranexampleoftheGaloisfieldGF(ε3).Asstatedabovewecanconstructsuchafieldbyenumeratingthepossiblepolynomialresiduesmodulosomeirreduciblepolynomialofdegree3overZ ε.Itcanbe shown that 1 + x + x 3 is irreducible over Z ε

Thereforethefieldweseekis0,1,x,1+x,x 2;1+x2;x+x2 ; 1 +x+ x

2 g. That is a simple example. The mos

commonly used Galois field is GF(28), since we are

usually interested in bytes as information units. Finitefields(recallthatanyfinitefieldofsizep risisomorphictoaGaloisfield)havesomeniceproperties(Arshadet.A2004).One ofthemis that themultiplicativegroupof afinite fieldF iscyclic. Itmeansthata groupcontainsanelement α such that every a ε G equals α

i for some

integeri.αiscalledagenerator(oraprimitiveelement)ofthegroup.Thefiniteorderof αisthesmallestintegerk>0suchthatα

k=1(where1istheidentityofthegroup).It

iseasytoshowthatthefiniteorderofgeneratorofGF(pr

ispr

-1.Reed-Solomon Encoder Reed Solomon encoding is a block-encoding

scheme. The system implemented inthisstudywas a(219,201) system, in which (n, k ) denotes an outputcodewordlengthofn andaninputwordoflengthk ,asshowninFig.2.1.Ithasasymbolsize, s ,andequalto8.Thedecoderhasacorrectingcapabilityoft symbolerrorsinthecodeword,withn–k=2t,inthiscase,t=9.

Data Parity

n

k n-k

Fig.2.1.TypicalRScodeword

Theencoderformsacodeword x

n-k m(x)+r(x) bymeans

ofthefollowingequation:

)(

)()(

)(

)(

x g

xr xq

x g

xm x k n

+=

(1)

(From here on, the term “polynomial” shall pertain topolynomials withGF element coefficients.)Thedivisor,g(x) is known as the generator polynomial. It is apolynomialofdegree(n-k) andwhichisafactorof(x

n +1) .

Tomaximizetheminimumdistancebetweencodes,the

rootsofthispolynomialshouldallbeconsecutive.Thisisa direct consequence of the BCH bound, which statesthat the minimum distance is always larger than thenumberofconsecutivefactorsofg(x) .ThesystemUsed

adapted a generator polynomial with roots from α 1 to

α 32 .Eq.1alsoimpliesthatthegeneratorpolynomial g(x)

isafactorofallpossiblecodewords.Indigitalhardware,the encoder is an LFSR with internal feedbackconnections corresponding to g(x) , as seen inFigure2 .2. The operations involved are GF addition andmultiplication,aspreviouslydefinedinthistext.

7/21/2019 FPGA Based Design of Reed Solomon Codes

http://slidepdf.com/reader/full/fpga-based-design-of-reed-solomon-codes 3/5

Indian Journal of Science and Technology Vol.2 No 4 (Mar. 2009) ISSN: 0974- 6846

Research article “Reed-Solomon coding” Pasricha & SharmaIndian Society for Education and Environment (iSee) http://www.indjst.org Indian J.Sci.Technol

50

Thecomputationoftheremainderisimplementedondigital hardware using a linear feedback shift registerconfigurationasshowninFig.2.2.Notethatthissetupresembles the iterative method of polynomial division.The final contentsof the shift registers will contain theremainder.

Fig.2.2.EncoderLFSR

Sincetheinputandoutputdatafortheencoderareserialstreams, appropriate serial-parallel converters wereimplemented for both the encoder and decoder. A

systematicencodingalgorithmforan(n ,k )cycliccodeis(Parhi1998)Step1.Multiplythemessagepolynomialm (x )byx n –k .Step 2. Divide the result of Step 1 by the generatorpolynomialg(x ).Letd(x )istheremainder.Step3.Setc (x )=x n –km (x )–d (x ).Summarizingabove,thefollowingencodingprocedureforRScodesisestablished.TheRSencodingprocedureToconstructat -errorcorrectingq -aryRScodeoflengthn (n =q –1):1.Findaprimitiven throotofunityαinGF(q )2.Select2t consecutivepowersofα,startingwithαb (Ifb = 1, the code is narrow-sense RS). Obtain the

generatorpolynomialg (x )asin(1.1)3. Follow the 3 steps shown above for systematicencoding of a message given bym (x ) RS codes arespectrally efficient in the sense that they introduce lessamount of redundancy, i.e., r = n – k , than usual BCHcodes.TheredundancyintroducedbyRSisdeterminedbythedegreeofg (x ),i.e., r = 2t .BCHcodes,however, usually have cyclotomic cosets withcardinality larger thanone. Toprovidethesame t -errorcorrectingcapability,2t consecutivepowersofαandalltheir conjugates are selected and result in ageneratorpolynomialofdegreeatleast2 t .AlowerrateBCH codemight have a higher minimum distance and

thusprovidehighererror-correctingcapability(Sharmaet.al2003).

SyndromeCalculator

Error polynomial

Berlekamp's

Algorithm

Error corrector

Error Magnitudes

forney algo

Error location

Chien's search

input r(x)

outputSiL(x)

u

x(i) y(i)

Unfortunately it is beyond the predictability o‘designdistance’andweareunabletotakeadvantageofit. RS codes are classified as maximum-distanceseparable(MDS)codes,asan(n ,k )RScodealwayshasminimumdistanceexactlyequalto(n –k +1).Reed Solomon decoder

r(x)ReceivedcodewordSiSyndromesL(x)ErrorlocatorpolynomialXi ErrorlocationsYi Errormagnitudesc(x)RecoveredcodewordvNumberoferrors

The received codeword r(x) is the original (transmittedcodewordc(x)pluserrors:r(x)=c(x)+e(x) AReed-Solomondecoderattemptstoidentifythepositionandmagnitude ofup tot errors (or 2terasures)and tocorrecttheerrorsorerasures[Sklar2001;Amina2003]The purpose of the decoder is toprocess the receivedcode word to compute an estimate of the originamessage symbols. There are threemain blocks to thedecoder: the Syndrome Generator, Euclid's Algorithmand the Chien/Forney block. The output of theChien/Forney block is an estimate of the error vectorThiserrorvectoristhenaddedto thereceivedcodewordto form the final codeword estimate. A top-level block

diagramofthedecoderisshowninFigure3.1.Notethatheerror value vectorY comesoutoftheChien/Forneyblockinreverseorder,anditmustpassthroughalast-in,first-out (LIFO) blockbefore it isadded to the receivedcodewordR(x ).Syndromegenerator

The first step in the decoder is to compute thesyndrome.Thesyndromeconsistsofn -k symbolsandthe values are computed from the receivedcodewordThe syndromedependsonlyon theerrorvector,and isindependentofthetransmittedcodeword.Thatis,eacherror vector has a unique syndrome vector. Howevermanydifferent receivedcodewordswill have the samesyndromeiftheirerrorpatternisthesame.Thepurpose

of computing the syndrome first is that it narrows thesearchfortheactualerrorvector.Originally,atotalof2possible error vectors would have to be searchedHowever, by finding the syndrome first, this search isnarrowed down to looking at just 2

n-k possibilities. The

syndrome can be computedmathematically by dividingthereceivedcodewordbythegeneratorpolynomialusingGF algebra.The remainder of thisdivision iscalled thesyndrome polynomial s (x ). The actual syndrome vectoS (x ) is computed by evaluating s (x ) at a through α

n-k

However, this method is not efficient from a hardwareFig.3.1.Decoderarchitecture

7/21/2019 FPGA Based Design of Reed Solomon Codes

http://slidepdf.com/reader/full/fpga-based-design-of-reed-solomon-codes 4/5

Indian Journal of Science and Technology Vol.2 No 4 (Mar. 2009) ISSN: 0974- 6846

Research article “Reed-Solomon coding” Pasricha & SharmaIndian Society for Education and Environment (iSee) http://www.indjst.org Indian J.Sci.Technol

51

Fig.4.1.Simulationresults

standpoint. The alternative method typically used inhardware is todirectlyevaluate thereceivedcodewordR (x )atathroughα

n-k .TheSyndromeGeneratormodule

computes the syndrome S by evaluating the receivedcodewordR (x )atthroughα

n-k .Thatis,R (α)throughR (α

n-

k ). In the RS code n - k = 2t , and thus there are 2t

syndromevalues tocompute:[S1S2S3 …S (2t )].ThesevaluesarecomputedinparallelasshowninFigure4.ThefirstsyndromegeneratorevaluatesthereceivedcodewordattoformS1 ;thenextgeneratorevaluatesthe

Table1.FPGAResourceUtilizationreceived code word at a

2 to form S2 , and so on. The

SyndromeGeneratormodulewillalso contain hardwarethat checks for an all-zero syndrome. If all of thesyndromevaluesarezero,thentherearenoerrorsandtheEuclid'salgorithmblockandtheChien/Forneyblockaredisabled.Thereceivedcodewordthenbecomesthe

codewordestimate.Euclid’s algorithm

Euclid's algorithm [Christian 1989; Ahmed 2001]processes the syndrome S(x) to generate the errorlocator polynomial Λ(x) and the error magnitudepolynomial Ω(x)[6]. That is, it solves the followingequationthatisreferredtoastheKeyEquation: Λ(x)[1+S(x)]=Ω(x)modx

2t+1

ThealgorithmusedinRSdecodingisbasedonEuclid's

algorithmforfindingthegreatestcommondevisor(GCD)oftwopolynomials.

Berlekamp's algorithm : Finds the error locatopolynomialL(x), and thenumber of errors.This involvessolvingssimultaneousequationswithsunknowns.Chiensearch : GivenL(x)andv,findstherootsxiofL(x).Forney'salgorithm :GiventhesyndromesandtherootsofL(x),findsthesymbolerrorvaluesyi.Again,thisinvolves

solvingssimultaneousequationswithsunknowns.Error corrector : Combines all of the pieces calculatedaboveandreconstructstheoriginalmeSimulation Results

All the wavwforms are simulated on the “Xilinxfoundationseries”,“.SynplifyPro”,“ModelSim”[20].Thewaveforms explanation shown above in the simulationresultsareasfollowsInput source : The inputsignalgivento theencoder canbeany inputsignal like sin wave, randomwave oranysignal from workspace. In our application we haveappliedthesinwavewhichwillbeappliedtotheencoderaftersomedelay.

din1, din2 : After encoding the input data will beinterleaved,convolutionallyencodedandpunctured.Aftepuncturing input data is divided into two streams din1din2 which represents the encoded MSB and encodedLSB respectively. Encoded data after modulation(through AWGN Channel)is applied to the Viterbdecoder.Viterbi output : At the receiving end Encoded signal isapplied to de-puncture block so as to insert arbitrarysymbol into your inputdata at the locationspecified bythede-puncturecodeandcreatesanewvalue.Afterthatdata isapplied toViterbi decoder.The output isshownaboveDe-interleaved output : The output from the Viterb

decoder is then applied to the de-Interleaver so as toremovetheerasuresR-Sdecoder output : after de-Interleaving output is thenappliedtotheR-Sdecodersoastogetthefinaloutput. Asshowninthesimulationresultsinfigure4.1theoutpuoftheR-Sdecoderissameasthatwehaveappliedattheinput.Conclusions

Inthispaper,anovelarchitecturedesignforForwardErrorCorrectiontechniquebasedonRScodingschemefor wireless applications is proposed. The RS code(126,112)hasbeenselected,andthesystemhasbeensimulatedonMatlab/Simulinkenvironment.Thedesign

wascreatedusingSystemGeneratorfor DSPtool fromXilinx and was simulated on Matlab/Simulinkenvironment.Thehardwaredescriptionlanguagesourcecode for different blockswas generated and the designwassubjectedtoseverefunctionalandtimingconstraintsusing Xilinx Foundation series and ModelSim toolsSynplify Pro tool was finally used to synthesize thecompletedesign.TheoverallarchitectureforRSCoderDecoder was implemented on Xilinx Virtex-II XC2v250device and consumed slices 1429 out of 1536 for theCODECataclockfrequencyof90MHz.Thearchitecture

S. No Name ofCommunicationBlock

Slices Percentageutilization

1. RSEncoder 112 7.32. Convolutional

Interleaver210 13.7

3. ConvolutionalEncoder

76 5.0

4. Puncturing 28 1.85. RSDecoder 676 44.06. Convolutional

De-Interleaver210 13.7

7. ViterbiDecoder: 86 5.68. De-puncturing 31 2.1 Total 1429 93.2

7/21/2019 FPGA Based Design of Reed Solomon Codes

http://slidepdf.com/reader/full/fpga-based-design-of-reed-solomon-codes 5/5

Indian Journal of Science and Technology Vol.2 No 4 (Mar. 2009) ISSN: 0974- 6846

Research article “Reed-Solomon coding” Pasricha & SharmaIndian Society for Education and Environment (iSee) http://www.indjst.org Indian J.Sci.Technol

52

designpower consumptionanalysiswasdoneusing theXilinxXpowertoolanditcameouttobeabout783mW.We have demonstrated a simplified and efficientimplementationof aReedSolomonCOEDCwith lowerpowerconsumption.Theefficientimplementationcomesfrom tool “SYSTEM GENERATOR FOR DSP” and

compacthardwaremanagement.TheRSCODECtakesany inputs&generatesCoding&Decodingsignals.Bymanipulating input signal we can see the output fordifferentsignals.Also,bytakingadvantageofinternalRScoder & decoder function, we can implement differentcoderateusedfordifferentapplications References

1. Martyn Riley and Iain Richardson ”Anintroduction toReed-Solomoncodes:principles,architecture and implementation “ IEEEConferenceProceedings,pp-122-126,NewYork,1998

2. E.R. Berlekamp‘Algebriccoding theory”McHill

Newyork19683. Barnaad&Saklar“Dgitalcommunication”20014. Azaleah Amina P. Chio, Jonathan A. Sahagun,

and Delfin Jay M. Sabido IX “VLSIimplementation of a (255, 223) Reed-Solomonerror-correction codec “,SPIE ConferenceProceeedings,pp.256-261,Toronto,2003

5. Christian SchulerGMD FOKUS Kaiserin-“Codegenerationtools forhardware implementationofFECcircuits” Berlin, Germany IEEE journalpublished,vol22,pp.1233-1241,August,1989

6. Arshad Ahmed, Naresh R. Shanbhag, and RalfKoetter “Systolic interpolation architectures forsoft-decodingreed-solomoncodes” IEEE journal

vol32,no4,pp.541-547,2004.7. TongZhangandKeshabK.ParhiReed“Onthe

High-Speed VLSI ImplementationofErrors-and-Erasures Correcting Reed-Solomon Decoders”IEEEjournalofCommunications,vol40,pp666-670,August2005.

8. Tong Zhang and Keshab K. Parhi, IEEEConference Proceedings, pp. 554-555, 1998,USA

9. Sanjay Sharma, Sanjay Attri, R, C, Chauhan,“Low-PowerVLSISynthesisofDSPSystems”,Published in Elsevier Science B. V.INTEGRATION,theVLSIJournal,Issue1-2,vol.

36,pp.41-54,September2003.10. E. R Berlekamp , “Algebric coding theory”Mcgrawhill,NY1968

11. E. R Berlekamp, “key papers in thedevelopment of coding theory” IEEEproceedigns,pp.116-119,NewYork,1994

12. R. E . Blahut theory and practice of errorcontrolcodes.Addison-Wesley,MA,1983