Patrick R. Haspel, University of Mannheim 1

FutureDAQ Kick-off

Network Design Space ExplorationNetwork Design Space Explorationandand

AnalysisAnalysisComputer Architecture GroupComputer Architecture Group

Prof. BrüningProf. BrüningPatrick R. Haspel

haspel@uni-mannheim.deComputer Architecture Group

University of Mannheim, Germany

Patrick R. Haspel, University of Mannheim 2

Research & Projects

Research Areas (Computer Architecture)

• Parallel- and Cluster computing using innovative Computer Architectures

• low latency Interconnection Networks

• high performance chip design using leading edge EDA Tools (proven cell based design flow)

Actual projects

• ATOLL: Networkinterface for SANs

• OASE: Optical Datatransmission

Research Areas

(Optoelectronics, Prof. Brenner)

• Microoptical System Interconnects for digital communication (board to board, chip to chip)

• 3D Microintegration of optical components

Actual projects

• OASE: Optical Data Transmission

• Blue DVD lens for Laser beam shaping

• Microoptical components fabrication

Patrick R. Haspel, University of Mannheim 3

ATOLL – System Area Interconnect

ATOLL• Extreme low-latency network (currently

fastest worldwide)

• Distributed switching resource (X-Bar) -> massively scalable

• Arbitrary network topology

Patrick R. Haspel, University of Mannheim 4

ATOLL2d Torus Topology Example

Node with an ATOLL NIC

All topologies fitting tothe 4 interconnects aresupported ...

Patrick R. Haspel, University of Mannheim 5

ATOLLTree Topology Example

NICNICNIC

Patrick R. Haspel, University of Mannheim 6

ATOLL-ASICBasic Architecture

4,5 Mio transistors

Cell based design (>1 Mio gates)

0.18µm CMOS process

5,7 x 5,7 mm Chip

PC I-XInte rf ac e

64 bit/13 3 M H z

Ho st Port 0

4x 4

Ful l-d uplex

Xba r

Link0

Link1

Link2

Link3

ATO LL -L ink

PC I- X -Bu s

ATOLL Top-Level Block Diagram

Ho st Port 1

Ho st Port 2

Ho st Port 3

Fastest and Second Biggest Chip Design of a European University

2 GByteBisectionbandwidth

~80ns

Reliable links

Patrick R. Haspel, University of Mannheim 7

Optimization for Performance and Cost

Costs in Percent

PCB

Connector HDRA

Discrete Comp.

div. Chips

ATOLL chip

Link Cable

Package (BGA)

Mechanics

Soldering

Test

Components %PCB 1,44Connector HDRA 2,65Discrete Comp. 1,00div. Chips 3,52ATOLL chip 38,30Package (BGA) 4,30Link Cable 38,29Mechanics 1,56Soldering 2,55Test 6,38

Patrick R. Haspel, University of Mannheim 8

OASE Architecture

OASE OASE

RCA..D

RDA..D[9:0]

RDK..N

TDA..D[9:0]

TDK..N

TDA..D[9:0]

TDK..N

RDA..D[9:0]

RDK..NRCA..D

TCA..D

TCA..D

2,5 GbpsOASE OASE

Ne

two

rk In

terfa

ce

Pro

ce

sso

r

Ne

two

rk In

terfa

ce

Pro

ce

sso

r

RCA..D

RDA..D[9:0]

RDK..N

TDA..D[9:0]

TDK..N

TDA..D[9:0]

TDK..N

RDA..D[9:0]

RDK..NRCA..D

10

1010

10

TCA..D

TCA..D

2,5 Gbps

• OASE integrated optical interconnect (1x, 4x, 8x, Nx)

Fiber

Glass

GaAs

Si

Laser

BumpMonitordiode

Bump

Patent pending

Patrick R. Haspel, University of Mannheim 9

Custom Network @ CBM

Advantages of a customized interconnection network – Using full network design space by:

• Network tuning – Application optimized network parameter (Latency/Bandwidth/Topology)

• Adopting network interface to simplify front-end electronic (physical/protocol level)

• Expanding network function (data transport -> data manipulation)

• Introducing computing in the network (CPU on network interface)

Patrick R. Haspel, University of Mannheim 10

Customization process

System level evaluation and simulation (architecture and behaviour level)

• SystemC – development suite using C/C++/SystemC based models

• Building Block Modelling

• Message Passing protocol specification - Transport Packet Design

• Networkanalysis and Interfacedesign

• platform development for software development (HW/SW cosimulation)

• optional CoWare simulation and analysis environment for advanced debugging

Patrick R. Haspel, University of Mannheim 11

Proposal for CBM

Let the network sort your packets

Let the network manage load balancing

Regarding node utilization (automatic target selection)

Regarding network congestion (dynamic routing)

Use programmable packet engine on the network interface to do arbitrary data manipulations

Computing in the network (data is manipulated travelling through the network)

Patrick R. Haspel, University of Mannheim 12

Thank you!