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G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR Department:-Electronics & Communication Engineering Branch:-8 th Semester[Electronics And Telecommunication] Subject: - Electronics System Design List of Experiments 1 A) To design a Transistor Shunt Voltage Regulator. B) Simulate the Transistor Shunt Voltage Regulator and observe the waveform using microcap. 2 A) To design a Emitter Follower type of Voltage Regulator B) Simulate the Emitter Follower type of Voltage Regulator and observe the waveform using microcap. 3 A) To design a RC Phase Shift Oscillator. B) Generate the oscillations in microcap using RC Phase Shift Circuit. 4 A) To design a Wein Bridge Oscillator. B) Generate the oscillations in microcap using Wein Bridge oscillator. 5 A) To design a Common Emitter Amplifier. B) To obtain the Amplifier output on microcap using Transistor. 6 A) Study of Low Voltage Regulator using IC 723. B) Simulate and observe the regulated waveform on microcap. 7 A) To Design a Series Voltage Regulator using Pre-Regulator circuit. B) Simulate and observe the regulated waveform from SVR using pre-regulator on microcap. 8 A) To design 2 nd order Low Pass Filter. B) To study the frequency Vs gain characteristic of Low Pass Filter using microcap. 9 A) To design 2 nd order High Pass Filter. B) To study the frequency Vs gain characteristic of High Pass Filter using microcap. 10A) To design a Diode Function Generator. B) To obtain the waveform for Diode Function Generator on microcap. 11A) To design a Zener Shunt Voltage Regulator. B) Simulate the Zener Shunt Voltage Regulator and observe the waveform using microcap. 12A) To Design a Series Voltage Regulator. B) Simulate and observe the regulated waveform from SVR on microcap.

G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

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Page 1: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR Department:-Electronics & Communication Engineering

Branch:-8thSemester[Electronics And Telecommunication] Subject: - Electronics System Design

List of Experiments

1 A) To design a Transistor Shunt Voltage Regulator. B) Simulate the Transistor Shunt Voltage Regulator and observe the waveform

using microcap. 2 A) To design a Emitter Follower type of Voltage Regulator B) Simulate the Emitter Follower type of Voltage Regulator and observe the

waveform using microcap. 3 A) To design a RC Phase Shift Oscillator. B) Generate the oscillations in microcap using RC Phase Shift Circuit. 4 A) To design a Wein Bridge Oscillator. B) Generate the oscillations in microcap using Wein Bridge oscillator. 5 A) To design a Common Emitter Amplifier. B) To obtain the Amplifier output on microcap using Transistor. 6 A) Study of Low Voltage Regulator using IC 723. B) Simulate and observe the regulated waveform on microcap. 7 A) To Design a Series Voltage Regulator using Pre-Regulator circuit. B) Simulate and observe the regulated waveform from SVR using pre-regulator on

microcap. 8 A) To design 2nd order Low Pass Filter.

B) To study the frequency Vs gain characteristic of Low Pass Filter using microcap.

9 A) To design 2nd order High Pass Filter. B) To study the frequency Vs gain characteristic of High Pass Filter using microcap. 10A) To design a Diode Function Generator. B) To obtain the waveform for Diode Function Generator on microcap. 11A) To design a Zener Shunt Voltage Regulator. B) Simulate the Zener Shunt Voltage Regulator and observe the waveform using

microcap. 12A) To Design a Series Voltage Regulator. B) Simulate and observe the regulated waveform from SVR on microcap.

Page 2: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

13A) To design a Class A Transformer Coupled Audio Amplifier. B) To obtain the Class A Amplifier output on microcap using Transistor. 14A) To design a Class AB Push Pull Amplifier. B) Simulate Class AB Push Pull Amplifier on microcap and obtain the relevant

waveform. 15A) To design a Pre-Amplifier circuit. B) Simulate and observe the waveform of Pre-Amplifier Circuit on microcap. 16A) To design a Quasi Complementary Symmetry Audio Power amplifier. B) Simulate and observe the waveform of Quasi Complementary Symmetry Audio

Power amplifier Circuit on microcap. 17A) To design a Colpitts Oscillator. B) Simulate Colpitts oscillator in microcap to generate the waveforms. 18A) To design a Hartley Oscillator. B) Simulate Hartley oscillator in microcap to generate the waveforms. 19A) To design a Wide Band Pass Filter. B) To obtain the frequency Vs gain characteristic of Wide Band Pass Filter using

microcap. 20A) To design a Narrow Band Pass Filter using IGMF configuration. B) To plot the frequency response of Narrow Band Pass Filter using IGMF

configuration in microcap.

Page 3: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :- Design transistor shunt regulator for Vi = 15 + 10%V , IZmin = 10mA, ILmax = 200mA, Vo = 7.5V, hfe = 40. Tool :- Microcap software. Circuit Diagram:-

Theory:- The shunt transistor will extend power handling capacity of the basic zener and also Exhibits marked improvement in regulation. In this regulator the source resistance Rs must large enough to absorb the over voltage in the same manner as in the conventional zener shunt regulator. Most of the shunt regulating current in this circuit Will pass through the transistor reducing the current requirement of the zener diode By essentially the DC current gain of the transistor hFE.The regulation with the circuit is improved because the small signal output impedance is reduced by the gain of the transistor T by 1/ hFE..

Another highly desirable feature of this type of regulator is that the output is up to Some extend, self compensating for temperature changes by the opposing changes in Vz and VBE for Vz 10v . With the zener having a positive temperature coefficient Tc=2 mV/ C and the transistor base to emitter being a negative Tc=-2 mV/ C Therefore a change in one is cancelled by a change in other. Even though, this circuit is very effective regulator, it is somewhat undesirable From the efficiency standpoint, because the magnitude of Rs required is to be large. And it must carry the entire input current, a large percentage of power is lost from the Input to the output. Analysis :-

Vo = Vz + VBE IDmin = ILmax + IZmin + ICmax

RD = (Vimin – V0) / IDmin IBmin = ICmin / hfe

Page 4: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

RL = Vo / IL I1 = IZmin - IBmin

R1 = VBE / I1

Power Dissipation across zener = Vz x IZmax

Power Dissipation across transistor = (Vimax – Vo) ILmax

Observation:-

Sr. No. Vi (Volts) Vo (Volts) 1. 2. 3. 4. 5. 6. 7.

Simulation Results:-

Result :-

Various parameters have been calculated theoretically and have been found in accordance with those obtained through microcap software. Also graph against Vi and Vo has been obtained.

Viva Questions :-

1) Classify linear voltage regulators 2) What is a shunt regulator?

Page 5: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Experiment No.-2 Aim :- Design and simulate Emitter Follower type of Voltage Regulator. Problem :- Design transistor shunt regulator for Vi = 15 + 10%V ,

IZmin = 10mA, ILmax = 500mA, Vo = 5.2V, hfe = 40. Tool: - Microcap software. Circuit Diagram:-

Theory :- A series voltage regulator is shown in the figure. It consists of a transistor as a pass element and Zener diode as a reference source. The Zener diode used as reference element in a series voltage has breakdown voltage always less than the required output voltage. In this circuit a fraction of the output voltage V0 is compared with reference voltage Vz. The difference is amplified by the transistor. If the input voltage Vi increases by ∆Vi, then V0 increases only slightly and yet transistor may cause a large current change in R2. Thus it is possible for almost all of ∆Vi to appear across R3 and for output voltage to remain constant. Thus for all variation in input voltage, the output voltage remains constant. Analysis :-

Vo = Vz - VBE

IBmax = ILmax / hfe

IDmin = IBmax + IZmin RD = (Vimin – Vz) / IDmin

IBmin = ICmin / hfe

RL Or R1 = Vo / IL Power Dissipation across zener = Vz x IZ

Power Dissipation across transistor = (Vimax – Vo) ILmax

Page 6: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Observation:-

Sr. No. Vi (Volts) Vo (Volts) 1. 2. 3. 4. 5. 6.

Simulation Results :-

Result :-

Various parameters have been calculated theoretically and have been found in accordance with those obtained through microcap software. Also graph against Vi and Vo has been obtained.

Viva Questions:-

1) What is a series voltage regulator? 2) What is the other name of a simple series voltage regulator?

Page 7: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Experiment No.-3 Aim :- Design and simulation of RC Phase Shift Circuit Problem :- Design RC Phase Shift Oscillator for output frequency of 2 KHz. Tool :- Microcap software. Circuit Diagram :-

Theory:- An oscillator circuit thrives on feedback circuit and has no input source. The three conditions for sustained oscillations are:-

1) It should consist of positive feedback network. 2) A total phase shift of 0 or 3600 is required. 3) BarkHausen’s criteria must be fulfilled |A.| = 1

R-C Phase Shift Oscillator Op-amp is used here in inverting configuration as amplifier, with feedback loop consisting of a R-C phase shift network. The phase shift network consists of three R-C voltage dividers. The capacitor reactance and phase shift introduced by each divider varies with freq. between 0 to 90 degrees. At the described operating freq., each R-C network introduces a phase shift of 600, giving a total of 1800 phase shift. Another 1800 phase shift is introduced at the input of inverting amplifier making total phase shift around the loop 3600. From calculation it is found that f0 = 1/ 26 RC Rf / R1 = 29 This circuit will produce the sinusoidal waveform of frequency f0, if the gain is 29 & total phase shift around the loop is 3600 .In most of the cases amplifier gain is kept

Page 8: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

more than 29. So that Gain does not become less than unity and the oscillations does not die out. Analysis:-

f0 = 1/ 26 RC Rf / R1 29

Assume the value of C. Simulation Results:-

Result :-

The above circuit is implemented using microcap software and its results are found in agreement with that of theoretical results.

Viva Questions :-

1) What is Barkhausen’s criteria? 2) How oscillations are generated in RC Phase Shift Oscillator? Explain.

Page 9: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Experiment No.-4 Aim :- To Design Wein Bridge Oscillator. Problem :- Design a Wein Bridge Oscillator for output frequency of 1 KHz. Tool :- Microcap software. Circuit Diagram :-

Theory :- An oscillator circuit thrives on feedback circuit and has no input source. The three conditions for sustained oscillations are :-

1) It should consist of positive feedback network. 2) A total phase shift of 0 or 3600 is required. 3) Barkhausen’s criteria must be fulfilled |A.| = 1

Wein Bridge Oscillator An oscillator circuit in which a balanced bridge is used as the feedback network is the Wein Bridge Oscillator. The active element is an operational amplifier, which has a very large positive voltage gain, negligible output resistance and very high input resistance. We assume further that Av is constant over the range of frequencies of operation of this circuit. The frequency is computed as

f0 = 1/ 2RC In this case the loop gain must equal unity and must have a zero phase shift but the magnitude must not be zero. It can be done if Vi / Vo = 1/3 and A = 3.

Page 10: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Analysis :- 1 + Rf / R1 =3 f0 = 1/ 2RC Assume the value of C. Simulation Results:-

Result :-

The above circuit is implemented using microcap software and its results are found in agreement with that of theoretical results.

Viva Questions :-

1) Classify different types of Oscillators. 2) What is the gain of a Wein Bridge Oscillator?

Page 11: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Experiment No.- 5

Aim :- Design and simulation Transistor Amplifier in CE mode. Problem:-

Design a transistor amplifier stage to satisfy the following requirements: RL = 1K, hfe = 100, Vcc = 9V and frequency response = 50 to 50000 Hz. Apparatus:- Power supply, Bread board, Resistor, CRO, Connecting wires, CRO probes etc.

Circuit Diagram:-

Theory :- The Transistor Amplifier in Common Emitter configuration is used to amplify both current as well as voltage level of the signal and hence it is most preferred configuration. The circuit diagram of common emitter configuration is as shown in figure. C2 and C3 are coupling capacitor while C1 is emitter bypass capacitor. V1 is the sine source of 1MHz, which is applied at the base emitter junction and output is obtained at the collector of transistor. Formula :-

Select Vce = Vcc/2 and Ic = 1mA.

Assume suitable R5. Vcc = Ic*Rc + Ie*R1 + Vce and find R1. Select suitable R3 VB = Ie*R1 +VBE and I3 = VB/R3 Assume suitable hfe and calculate base current IB I2 = I3 + IB and VR2 = Vcc – VB, R2 = VR2/I2 RLeff = Rc*R3/(Rc + RL) Ro = Rs*R3/(Rs + R3) XCe = 10% of R1 at 50Hz.

Page 12: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Procedure:-

1) Open Microcap software. 2) Open and save new file. 3) Using tools, Draw the circuit Shown in fig. 4) Obtain o/p by using the circuit. 5) Construct the circuit on breadboard and observe waveforms on

CRO. 6) Draw i/p and o/p waveforms.

Simulation Results :-

Result :-

CE amplifier has been designed and the input has been amplified.

Viva Questions:-

1) Why do we need amplifiers? 2) Classify the different types of amplifiers

Page 13: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Experiment No.- 6

Aim: - Study of low Voltage Regulator using IC 723. Problem: - Design a LVR to given VO=5V at 2A maximum load current. Connect

a foldback protection circuit. Components: - Resistor, Capacitor, IC 723 Apparatus: - Breadboard, Power Supply component Circuit Diagram:-

Theory :- The basic operation of any regulator remain same but they differ in their construction .They also differ in their applications. The most important function of any regulator is to regulate or control the input voltage from aberrations and also feed regulated or controlled voltage to bad circuit. Regulators generally are classified as SVR and VSR i.e. series VR and shunt VR. In series voltage regulator input current is equal to out put current. There fore it is widely used in high voltage and low current applications. In shunt voltage regulator input voltage is equal to the out put voltage there fore it is widely use in high current low voltage applications. Series voltage regulators are widely used because of their high % efficiency, improved stability over shunt voltage regulators. Series voltage regulator can also be implemented using IC723. Consequently we can use IC723 as low voltages SVR as well as high voltage SVR. In low voltage regulator out put voltage is less than input voltage and vice versa is the case with high voltage regulators. We design a low voltage regulator to obtain output voltage between 2 to 7 volts and HVR for 7 to 32 volts output.

Page 14: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Formula :- For LVR:-

R1 = VR –Vo ; Rv = 20%(R1+R2) , assume IA R2 = Vo / IA; R1’= R1 -Rv /2 ; R2’ = R2 -Rv/2 Hfe = Ic/IB = Icmax / Icout; Vin = VBE + Vsense +Vo

Vinmin= Vout +3 ; Vinominal = Vinmin + 10% of Vinmin Icmax = Vsense (RA+RB) / RSC-RB + RA / RSC-RB

S/C condn , IL= ILSC Vsense (Ra +RB )/ RSC-RB RA+RB = VA/ IA P. Dissipation = VCE *IC =(V in –Vo) IL =(Vinmax-Vo) Icmax

Procedure :-

1) Open the MICROCAP create & save a new file 2) Draw the circuit diagram using tool & components 3) Observe the o/p by executing it

3) Draw the same circuit on breadboard & observe the o/p on CRO.

Observation:-

Sr. No. Vi (Volts) Vo (Volts) 1. 2. 3. 4. 5. 6. 7. 8.

Simulation Results:-

Page 15: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Result : - The LVR using IC 723 has been designed and simulated successfully. Viva Questions :-

1) What are the different pins of IC723? 2) What is the output voltage range for high and low voltage

regulators using IC723?

Page 16: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Experiment No.-7

Aim:- Design & simulation of Series Voltage Regulator with Pre-regulator. Problem :- Design a SVR using Pre-Regulator to give V0 = 15V at 500mA. The input is 27 ± 3V with source resistance of 3. The transistors available are with hfe = 40 and 100. Pre regulator has a P-N-P transistor with hfe = 100 and 1/hoe = 10k.

Components:- NPN and PNP Transistors, Resistors, Zener Diodes. Apparatus :- Bread board, power supply . Circuit Diagram :-

Theory:- In Series Voltage Regulators, the stability of the regulator can be improved by increasing the value of R3 which can be done by using Darlington Pair. The stability can further be improved if we replace R3 by constant current source. It is often called as transistor pre-regulator. This pre-regulator provides the constant current to the collector of Error Amplifier transistor and base of series pass transistor. The zener diode in the pre-regulator circuit will maintain a constant voltage between the base of pre-regulator transistor and the collector of series pass transistor and generating base emitter voltage constant which is 0.6v. This will give a constant drop across Re of pre-regulator and so the current flowing through it is constant and that output is nothing but emitter output of pre-regulator transistor. Also Ie = Ic for pre-regulator transistor and so the transistor provides constant output Ic to the rest of the circuit. Thus a pre-regulator circuit improves the regulation and also reduces the output impedance of the regulator.

Page 17: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Formula:- For Pre-regulator

Vzo= Vi’min – Vo – 1V, Vi’min = Vimin – Rs.ILmax

Assume Izmin and rz, R2 = (Vi’min - Vzo)/ Izmin Re = (Vzo - VBE)/ I3min, Roc = 1/hoe + hfe.Ro/hoe(Re + hie’) For Regulator Vz = 50% of Vb1, Rd = (Vo –Vz)/ Izmin R1= (Vo –Vb2)/I1, R2 = Vb2/I1 I1= 2% to 4% of ILmax and >=20 times IB2max. Procedure :-

1) Open the MICROCAP, Draw the circuit and save a new file. 2) Simulate and run the circuit diagram on MICROCAP. 3) Observe the waveforms obtained and draw the conclusion.

4) Draw the same ckt. on breadboard & observe the o/p on CRO . 5) Plot the corresponding o/p for the same .

Observation:-

Sr. No. Vi (Volts) Vo (Volts) 1. 2. 3. 4. 5. 6. 7. 8.

Simulation Results :-

Page 18: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Result: - SVR using Pre-Regulator has been simulated and designed successfully

and satisfactorily. Viva Questions:-

1) Why do we need Pre-regulators? 2) What is the other name of a pre-regulator circuit?

Page 19: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Experiment No.-8 Aim: - To Design 2nd Order Low Pass Filter & study the Frequency Vs Gain Characteristics. Problem: - Design a low pass filter of 2nd order having cut off frequency of 1 KHz. Apparatus: - Op- Amp 741, Resistances, capacitor, Function generator. Circuit Diagram:-

Theory :- Filters are the circuits which are specifically designed for frequency rejection over a certain range and allow frequency over a specific range. Filters may be of three types:-

1) Low pass filter 2) High pass filter 3) Narrow and Wide band pass filter.

Active filters are designed without the use of inductors which are costly and bulky. The designing and independently as there is no coupling between input and output under active filters , filters with every high quality factor can be designed. Important parameters for filter:-

1) Cut off frequency. 2) Gain variation in pass band 3) Attenuation in stop band. 4) Rate of roll off beyond cut off frequency.

Low Pass Filters: Low pass filters are those filters that allow low frequency signals to pass i.e. from d.c. to fc and block the higher frequency signals i.e. the signals above the cut off level fc. The basic difference between a 1st order filter and the 2nd order filter is that in a 1st order filter the roll off/on rate is 20db/decade while in 2nd order it will be twice the first order i.e. 40 db/decade. Also in 2nd order filters we require a pair of RC circuit more than that required in 1st order filters.

Page 20: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Analysis :- Given fc = 1KHz, Assume the value of C.

Fc = 1/ 2RC 1 + Rf / R1 =3, Assume the value of R1.

Observation:-

Sr. No. Frequency (Hz) V0 (V) V0 / Vin Gain 1. 300 2 500 3 700 4 1K 5 2K 6 5K 7 7K 8 10K 9 20K

10 30K 11 50K

Procedure :-

1. Make the connections according to the circuit diagram before turning on the supply.

2. Choose appropriate standard values of resistances and capacitances. 3. For different frequencies and note the corresponding output voltage. 4. Calculate the Gain using the formula and plot the graph between freq. & Gain

Simulation Results :-

Page 21: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Result :- Thus a low pass circuit is designed with cut off frequency 1 KHz and the is plotted between freq. and Gain. Viva Questions :-

1) What is the significance of filters? 2) Classify the different types of filters?

Page 22: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Experiment No.-9 Aim :- To Design & simulate 2nd Order High Pass Filter & obtain the Frequency Vs Gain Curve. Problem :-Design a High pass filter of 2nd order having cut off frequency of 2 KHz. Apparatus: - Op- Amp 741, Resistances, capacitor, Function generator. Circuit Diagram:-

Theory :- Filters are the circuits, which are specifically designed for frequency rejection over a certain range and allow frequency over a specific range. Filters may be of three types:-

1) Low pass filter 2) High pass filter 3) Narrow and Wide band pass filter.

They may be classified as

1) Active filters 2) Passive filters.

Active filters are designed without the use of inductors, which are costly and bulky. The designing is done independently as there is no coupling between input and output under active filters and hence filters with very high quality factor can be designed. Important parameters for filter:-

1) Cut off frequency. 2) Gain variation in Pass band 3) Attenuation in Stop band. 4) Rate of roll off beyond cut off frequency.

Page 23: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

High Pass Filters: High pass filters are those filters that allow high frequency signals to pass and block the lower frequency signals i.e. the signals below the cut off level. The basic difference between a 1st order filter and the 2nd order filter is that in a 1st order filter the roll off/on rate is 20db/decade while in 2nd order it will be twice the first order i.e. 40 db/decade. Also in 2nd order filters we require a pair of RC circuit more than that required in 1st order filters. Analysis:-

Given fc = 2 KHz, Assume the value of C. Fc = 1/ 2RC 1 + Rf / R1 =3, Assume the value of R1 Observation:-

Sr. No. Frequency (Hz) V0 (V) V0 / Vin Gain 1. 40 2. 80 3. 150 4. 400 5. 3K 6. 6K 7. 10K 8. 20K 9. 50K

Procedure:- 1) Make the connections according to the circuit diagram before turning on the

supply. 2) Choose appropriate standard values of resistances and capacitances for different

frequencies and note the corresponding output voltage. 3) Calculate the Gain using the formula and plot the graph between freq. and Gain

Page 24: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Simulation Results:-

Result :-

Thus a high pass circuit is designed with cut off frequency 2 KHz and graph is drawn between freq. and Gain.

Viva Questions :-

1) What is the difference between the 1st order and 2nd order filters? 2) What do you mean by Cut off frequency?

Page 25: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Experiment No.-10 Aim: - To design a Diode function generator. Problem: - Realize the function V0 = K1Cos(K2Vi) , 0 ≤ Vi ≤ 5V. Apparatus: - Microcap software. Circuit Diagram:-

Theory :- The circuit of diode function generator is shown in figure. It basically consists of number of diodes which are connected in parallel where each one of them is provided with different inputs. This is done in order to get multiple slopes. From the figure, it can be seen that – Vxn = VRn x RAn / (RAn + RBn ) + Vi x RBn / (RAn + RBn ) For increasing slope:-

S0 = - Rf / R1 When diodes are OFF. S1 = - Rf / R1 || RA1 When D1 is ON. S2 = - Rf / R1 || RA1 || RA2 When D1 and D2 are ON. S3 = - Rf / R1 || RA1 || RA2 || RA3 When D1, D2 and D3 are ON. S4 = - Rf / R1 || RA1 || RA2 || RA3 || RA4 When all diodes are ON.

Page 26: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Observation :-

Sr.No. Vi(volts) Vo’(theoretical) Vo’(practical) slope 1 0 2 1 3 2 4 3 5 4 6 5

Result :-

The circuit of diode function generator is designed and both the theoretical and Practical values of V0 are found. Viva Questions :-

1) What is a Diode Function Generator? 2) What are the applications of a Diode Function Generators?

Page 27: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Experiment No.-11 Aim :- Design Zener Shunt Regulator using Microcap. Problem:- Design Zener Shunt Regulator for Vi = 10 + 10%V, IZmin = 20mA,

ILmax =150mA, Vz = 5.1V Apparatus:- Zener Diode, Resistances, DC Supply. Tool :- Microcap software. Circuit Diagram:-

Theory:- This is one of the simplest form of regulators in which the reference battery is replaced by a zener diode of nominal voltage Vz and internal impedance rz. For any given application of a zener diode shunt regulator it is required to know the input voltage variation and the output load requirements. The calculation of the component value is independent of the circuit requirements. The input may be constant or may have max. or min. values depending upon the natural regulation or waveform of the supply source. The zener is limited to its particular power dissipation rating which may be less than the required amount for a particular situation. The total dissipation can be increased to some degree by utilizing series or parallel with zener shunt regulator is that the device does not have the gain function; a feedback system is not possible with just the zener shunt combination. For very precise regulator the design will normally be an electronic circuit consisting of devices for control, probably a closed loop feedback system with device on the basic reference element. The concept regulation can further be improved with the addition of transfer as the power absorbing element to the zener diode. Analysis:-

IZmin = IDmin - ILmax ,

R1 = (Vi – Vo) / IDmin, RL = Sv x R1 = rz x Rd / (rz + R1) IDmax = (Vimax – Vz) / R1 Power Dissipation through zener = Vz x IDmax

Power Dissipation through R1 = IDmax2 x R1

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Observation:-

Sr. No. Vi (Volts) Vo (Volts) 1. 2. 3. 4. 5. 6.

Simulation Results:-

Result:-

Various parameters have been calculated theoretically and have been found in accordance with those obtained practically.

Viva Questions :-

1) What are the parameters on which the output voltage depends?

2) Define and give the formula for Stability factor.

Page 29: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Experiment No.-12 Aim:- Design & simulate a Series Voltage Regulator. Problem:-

Design SVR to give output at maximum load of 200mA and 5V. Assume That input to the regulator is 15 ± 10% with source resistance of 5. Design the circuit and determine output resistance of the regulator. Assume hfe = 40 for series path transistor and hfe = 100 for error amplifier. Assume suitable zener diode.

Tool:- Microcap Software

Circuit Diagram:-

Theory:- The series voltage regulator overcomes all the difficulties of the emitter follower and is widely used. From the figure the R1 and R2 voltage divider samples the output voltage Vo and present it to the base of the error amplifier transistor Q2. Emitter of Q2 is connected to a constant reference voltage given by a zener diode. The current through Rs gets divided between the base current of the series pass transistor Q1 and collector current of Q2. If the output voltage tends to rise, Q2 conducts more heavily and reduces the base current of Q1. This increases VCE1 and reduces Vo. As the zener diode current is relatively independent of Vi, this circuit exhibits improved Sv as compared to emitter follower.

Analysis:- i)Selection of zener diode:- VB1=Vc2=VBE+ Vo

VZ=50%of VB Assume Izmin=5mA

ii)Selection of RD RD=(Vo-Vz)/Izmin

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iii) Selection of R3 I3min=IB1max+Ic2min I3min=1.5 IB1max IB1max= ILmax/ (1+hfe1) = ILmax/hfe1 Vimin= Vimin- Rs (I3min+ ILmax) = Vimin- Rs* Ilmax R3=Vimin-VB/ (I3min)

iv) Selection of R1 and R2:- I1= a) 2% to 4% of ILmax b)>=20 times IB2 max Ic2max= I3max= Vimax-Vb1/ (Rs+R3)

IB2max=Ic2max/hfe2 VB2=VBE2+Vz R1=Vo-VB2/I1 R2=VB2/I1 RV=20% Of (R1+R2) R1’=R1-Rv/2 R2’=R2-Rv/2

v) Calculation of Sv And Ro:- Rb=R1|| R2

K=R2/(R1+R2) hie1= [(VT)/(IC1max)]*hfe1 hie2= [(VT)/(IC2max)]*hfe2 Gm=Khfe2/(Rb+hie2+(1+hfe2)rZ) Sv=1/(1+Gm(Rs+R3)) Ro=Sv[Rs+ (R3+hie1)/(1+hfe1)]

vi) Calculation of Input ripple:- Sv = output ripple / input ripple = Vor/Vir Procedure :-

1) Open the MICROCAP, Draw the circuit and save a new file. 2) Simulate and run the circuit diagram on MICROCAP. 3) Observe the waveforms obtained and draw the conclusion. 4) Draw same circuit on breadboard & observe the o/p on CRO.

5) Plot the corresponding o/p for the same. Observation:-

Sr. No. Vi (Volts) Vo (Volts) 1. 2. 3. 4. 5. 6. 7. 8.

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Simulation Results:-

Result :-

SVR has been simulated and designed successfully. Viva Questions:-

1) Define and give the formula for Output Resistance.

2) Define and give the formula for Temperature Coefficient.

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Experiment No.-13 Aim :- Design Transformer coupled Class-A Power amplifier. Problem :- Design Transformer coupled Class-A Power amplifier to derive 2w

power to a load of 4Ω. The available power supply is of 9v. The Transformer used has hfe = 40. Neglect d.c. resistance of coupled Transformer & assume efficiency.

Tool :- Microcap software. Circuit Diagram:-

Theory:- Class A operation is achieved when the Q point is selected near the center of the linear region of the curve. In such operation the distortion is very low, but the conversion efficiency is also low. Class A operation is provided in small signal linear amplifiers. Drawbacks of class A amplifiers with resistive load:-

1) It has got very low conversion efficiency (25%). 2) The d.c. power dissipated in the load is a waste which is very objectionable. 3) The flexibility of matching a load with the output impedance of the device is

very less, which is a necessary condition for the maximum power output. Advantages of transformer coupled load:-

1) The d.c. power loss in the load is minimized by using a low primary resistance transformer.

2) The reflected a.c. load can be adjusted simply by adjusting the transformer turn ratio.

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Disadvantages of transformer coupled load:- 1) the output is likely to be in saturation for d.c. current in primary.

2) The total harmonic distortion is very high for much audio application. Analysis: - Assume that 10% of Vcc appears across Re.

Assume saturation voltage of Transformer =Vsat O/P showing = VCE (Vm) =VCC – Vsat - VRe Efficiency = η = Po / Pin. Vc rms = Vm / 2 RL’ = Vc rms / Ic rms. η = RL /RL’ Im = 2 Ic rms. IcQ = 1.1 Im Re VRe / IcQ Selection S = 1 + Rt / Re Where Rt = R1 ll R2

IBQ = IcQ / RFE

VTH = IBRt + VBE + VRe VTH = Vcc / R1 + R2

I / P Power Pin = Vcc X IcQ

η% = Po / Pi X 100 Simulation Results:-

Result :-

The class A amplifier has been designed and simulated and the input signal has been amplified.

Viva Questions :-

1) What is cross over distortion in amplifiers? 2) What do you mean by center line control?

Page 34: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Experiment No.-14 Aim :- Design complementary synchronizing class-AB Audio power amplifier. Problem :- Design complementary synchronizing class-AB Audio power amplifier

To deliver max A.C. power of 5W to the load of 8Ω. The matched pair of transistor has hfe = 50. Design and simulate power stage using transistor having hfe = 80 as to provide the voltage gain of 5. Define the required input signal to provide cross over distortion control & center line control.

Tool :- Microcap software. Circuit Diagram :-

Theory: -

A Class AB amplifier compromises between Class A and Class B operation. They are biased so plate- or collector-current flows less than 360 degrees, but more than 180 degrees, of each RF cycle. Any bias-point between those limits can be used, which provides a continuous selection-range extending from low-distortion, low-efficiency on one end to higher-distortion, higher-efficiency on the other. Class AB amplifiers are widely used in SSB linear amplifier applications where low-distortion and high power-efficiency tend to both be very important. Push-pull Class AB amplifiers are especially attractive in SSB linear amplifier applications, because the greater linearity resulting from having one amplifier or the other always conducting makes it possible to bias push-pull Class AB amplifiers closer to the Class B end of the AB scale where the power-efficiency is higher.

Page 35: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Analysis :-

O / P Power Poac = (ILP / 2)² RL

Peak load voltage VLP = ILP X RL

hie = ηVT / ILP X hfe Ri = hie +(1+hfe) RL Av = 1 – hie / Ri Damping factor, D = RL / R0 R0d = Ro (1+hfe)-hie Vs2p = (1+Rs / Ri) (1+Ro / RL) V0 / Av Vcc = 2Vs2p + 1v IB1 = Ilp / hfe VEmax = (Vcc / 2)+ VLp VBmax = VEmax + 0.6v R1= Vcc-VBmax / IB1max Ic3Q = Quiescent collector current of Q3

VEQ = Vcc / 2 VBQ = VEQ + 0.5 v Ic3Q = Vcc-VBQ / R1

R = 1v / Ic3Q Rod = Rf / hfe3 IF = (Vcc/2 – VBE3)RF

IB3Q = Ic3Q / hfe3

I2 = IF – IBE3 R2 = VBE3 / I2

Avs = RF / Vs1 = VLp / Vs1 Xc0 = 1 / 10 times RL at 100Hz Calculation of efficiency for power stage:- D.C. Power taken = Vcc X (Ilp / ) Efficiency = Pac / Pdc of power stage For driver stage Pdc = Vcc X Ic3Q

Over all frequency = ( Pomax X 100)/(Pdc power stage + Pdc driver stage)

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Simulation Results :-

Result:- Thus the class AB power amplifier has been designed and waveforms obtained Viva Questions:-

1) Differences between class A Transformer coupled and Class AB amplifiers.

2) Why do we need a driver stage before class AB push pull amplifiers?

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Experiment No.-15

Aim : - Design and simulate a pre-amplifier circuit. Problem :-

Design Emitter follower circuit with self biasing arrangement having fallowing specification:-Vcc=12v, Ic= 1.5 mA, hfe=150,The internal resistance of the transducer is 10 KΩ. Determine the output voltage developed across capacitively coupled load of 10KΩ. If Vs=1v Select suitable stability factor. Assume lowest frequency of operation =100Hz.

Tool :- Microcap Software. Circuit Diagram: -

Theory :- Pre –Amplifier should have fallowing desirable characteristics.

i) High voltage gain ii) High input impedance iii) Good frequency response iv) Good stability

The o/p voltage of the pre amplifier circuit is obtained at the emitter of the transistor and gain of pre amplifier is unity. A pre-amplifier is used with a microphone to boost the signal before feeding into an amplifier. Analysis : -

i) Selection of Re:- Assume VCEQ = (1/2)*Vcc ii) Voltage across Re = VEQ Re =VEQ / Ic iii) Selection of R1 & R2 :-

Vth= IBRb+VBE+VEQ, IB= Ic / hfe iv) Stability Factor:- S= 1+(Rb/Re) = 10 to 20

v) Vth=Vcc *[ R2/(R1+R2)] Vth= Vcc*(Rb/R1), R1=(Vcc*Rb)/Vth

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vi) Calculation of Ri,Av,Ro,Avsn :- hie= (ηVt)/Ic *hfe Ai=1+hfe, Ri= hie +(1+hfe)*RL RL’ =RL || Re Av= 1- hie/Ri Ro =hie+Rs’ Rs’ = Rs || RL

vii) Effective input resistances: -

Rieff = Ri || Rb viii) Overall Voltage Gain :-

Avs = (Av Rieff)/(Rs+Rieff) Vo= Avs * Vs

ix) Selection of Cin and Co :- Xcin =10 % of( Rs or Rb whichever is smallest) Xco= 10 % of( Re or RL whichever is smallest) Cin = 1/(2fXcin) Co = 1/(2fXco) Simulation Result:-

Result:- Thus the pre amplifier circuit was designed and Simulated. Viva Questions:-

1) What do you mean by self bias? 2) What do you mean by fixed bias?

Page 39: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Experiment No.-16 Aim :- Design quasi complementary symmetry class-AB Audio power amplifier. Problem :- Design quasi complementary symmetry class-AB Audio power Amplifier To deliver max A.C. power of 15W to the load of 8Ω. The matched pair of transistor has hfe = 40. The N-P-N transistor has hfe = 30. Design and simulate driver stage using transistor having hfe = 60 so as to provide the voltage gain of 8. Define the required input signal to provide cross over distortion control & center line control.

Tool :- Microcap software. Circuit Diagram :-

Theory: -

A Class AB amplifier compromises between Class A and Class B operation. Any bias-point between those limits can be used, which provides a continuous selection-range extending from low-distortion, low-efficiency on one end to higher-distortion, higher-efficiency on the other. Class AB amplifiers are widely used in SSB linear amplifier applications where low-distortion and high power-efficiency both tend to be very important.

Page 40: G.H.RAISONI COLLEGE OF ENGINEERING, NAGPUR …ghrce.raisoni.net/download/esd_8etc.pdf · Experiment No.-1 Aim: - Design Transistor Shunt Regulator. Problem :-Design transistor shunt

Push-pull Class AB amplifiers are especially attractive in SSB linear amplifier applications, because the greater linearity resulting from having one amplifier or the other always conducting makes it possible to bias Class AB amplifiers closer to the Class B end of the AB scale where the power-efficiency is higher. A quasi-complementary symmetry class AB power amplifier uses four transistors. Thus the efficiency of this circuit improves.

Analysis :- O / P Power Poac = (ILP / 2)² RL

Peak load voltage VLP = ILP X RL

hie1 = ηVT / ILP X hf1 , hie2 = ηVT / IC2max X hf2 IB1max = Ilp / hfe1 Hie = hied + hiep (1+ hfed)

Hfe = hfed + hfep (1+ hfed) Ri = Hie +(1+Hfe) RL

Av = 1 – Hie / Ri Damping factor, D = RL / R0 R0d = Ro (1+Hfe)-Hie Vs2p = (1+Rs / Ri) (1+Ro / RL) V0 / Av Vcc = 2Vs2p + 1v IB1 = Ilp / hfe VEmax = (Vcc / 2)+ VLp VBmax = VEmax + 1.2V R1= Vcc-VBmax / IB2max Ic5Q = Quiescent collector current of Q5

VEQ = Vcc / 2 VBQ = VEQ + 1v Ic5Q = Vcc-VBQ / R1

R = 1v / Ic5Q Rod = Rf / hfe5 IF = (Vcc/2 – VBE5)RF

IB5Q = Ic5Q / hfe5

I2 = IF – IBE5 R2 = VBE5 / I2

Avs = RF / Vs1 = VLp / Vs1 Xc0 = 1 / 10 times RL at 100Hz Calculation of efficiency for power stage:- D.C. Power taken = Vcc X (ILp / ) Efficiency = Pac / Pdc of power stage For driver stage Pdc = Vcc X Ic3Q

Over all frequency =( Pomax X 100) / (Pdc of power stage + Pdc of driver Stage)

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Simulation Results :-

Result:- Thus the class AB power amplifier has been designed and waveforms obtained. Viva Questions:-

1) Give the Applications of Amplifiers? 2) What will be the effect of change in type of load on the amplifier output?

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Experiment No.-17 Aim :- To Design Hartley Oscillator. Problem :- Design a Hartley Oscillator for output frequency of 5 MHz. Vcc = 12V, Hfe = 100. Tool :- Microcap software. Circuit Diagram :-

Theory :-

The Resistance R1, R2, & RE provide necessary d.c. bias to the transistor. C3 is a by pass capacitor. C2 is a coupling capacitance. The N/W consisting of inductor L1, L2 ,a capacitor C determines the frequency of oscillations. The O/P is taken out of coil L2 RFc is a radio frequency clock. Its reactance at oscillation frequency is high. It prevents radio freq. current from reaching D.C. supply; also it prevents d.c. supply from short circuiting o/p. The bias is so transistor works under class C condition. Working:- When supply voltage is switched on the transistor current is set up in tank ckt. The oscillating current produces an a.c. voltage across L2 junction L is at +ve positive potential with respective to 2 r junction 3 will at -ve potential with respective to 2 at the same instant. Thus voltage across L1& L2 are always in apposite phase. The voltage across L1 is feed back in to the ckt. The voltage across L2 is taken out to the o/p. In this fashion the parallel resonant ckt. Provides phase diff. Of 1800

between o/p & feedback voltage. In CE node the transistor provides a phase diff. The total phase shift will be zero.

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Analysis :- fo = 1/2πLC Assume the value of C and Calculate L1 = L2 =? Ic = Vcc/RL Assume, VRe = 10% of Vcc Re = VRe / Ic. R2 = 5Re R1 = Vcc*R2/Ve – R2 Simulation Results:-

Result :-

The Hartley oscillator circuit is implemented using microcap software and oscillations are generated.

Viva Questions :- 1) What are the disadvantages of LC oscillators over RC oscillators?

2) What is a Hartley oscillator?

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Experiment No.-18 Aim :- To Design and simulate Colpitts Oscillator. Problem :- Design a colpitts oscillator to generate a frequency of 4MHz,Vcc = 10V, Po = 35mW, hfe = 85. Tool :- Microcap software. Circuit Diagram :-

Theory :- The Resistance R1, R2, & RE provide necessary d.c. bias to the transistor. C3 is a by pass capacitor. C2 is a coupling capacitance. The N/W consisting of inductor L,C1 and C2 determines the frequency of oscillations. The O/P is taken out of coil L, RFc is a radio frequency clock. Its reactance at oscillation frequency is high . It prevents radio freq. current from reaching D.C. supply, also it prevents d.c. supply from short circuiting o/p. The bias is so transistor works under class C condition. In colpitts oscillator there are two capacitors and one inductor connected in parallel that forms the resonant tank circuit to generate oscillations.

Analysis :- fo = 1/2πLC Po = (ILP/2)2 RL Q = RL/ XL, XL= 2πfL C1 = CT RL/hie Ic= Vcc/ RL Re = VRe / Ic. R2 = 5Re R1 = Vcc*R2/Ve – R2

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Simulation Results:-

Result :-

The Colpitts oscillator circuit is implemented using microcap software and oscillations are generated.

Viva Questions :-

1) What is a Colpitts oscillator?

2) Compare Hartley and Colpitts Oscillator.

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Experiment No.-19 Aim:- To Design a Wide Band Pass Filter. Problem:- Design a first order Wide Band Pass Filter such that fL = 40 Hz and fH

= 2KHz and Gain = 4.

Components:- Two Op-Amp IC’s –741, Capacitors, Resistors, Bread Board , Power Supply.

Circuit Diagram:-

Theory:- Filters are circuits that are capable of passing signals with certain frequencies while rejecting signals with other frequencies. Active filter uses transistors or op-amp combined with RC, RL or RLC circuit. The active device provides voltage gain and the passive circuits provide frequency selectivity. There are 4 types of Active Filters:

1) Low Pass Filter. 2) High Pass Filter. 3) Band Pass Filter. 4) Band Stop Filter.

Band Pass Filter Response:- A band pass filter passes all the signals lying within a band between a lower freq. Limit and a upper freq. Limit and rejects all other frequencies that outside this specified band. There are two types of Band Pass Filters:-

1) Wide Band Pass Filter. 2) Narrow Band Pass Filter.

We will define a filter as a wide band filter if its figure of merit or Q- factor Q < 10. For narrow band pass filter Q > 10. The Critical Freq. are the points at which the response curve is 70.7% of its maximum. These frequencies are also called as 3db frequencies.

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Analysis:- The freq. About which the Pass Band is centered is called the Center Freq. fc. B.W. = fH - fL Where fH is the Higher Critical Freq., fLis the Lower Critical Freq. Quality Factor:-The Q factor of band pass filter is ratio of Center Freq. to the B.W. Q = fc / B.W. fc = √ fH . fL. Observation:-

Sr. No. Frequency (Hz) V0 V0 / Vi Gain 1. 10 2 20 3 40 4 70 5 100 6 1K 7 1.3K 8 1.6K 9 2K

10 4K 11 5K

Procedure:-

1) Make the connections according to the circuit diagram before turning on the supply.

2) Choose appropriate standard values of resistances and capacitances.

3) For different frequencies and note the corresponding output voltage.

4) Calculate the Gain using the formula and plot the graph between freq. and Gain.

Simulation Results:-

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Result:-

The circuit of Wide Band Pass Filter is designed with cut off frequencies fH and fL and the graph is plotted between Frequency and Gain

Viva Questions :-

1) Compare a 2nd order filter with a 3rd order filter in terms of its response. 2) What do you mean by noise signal and how are filters associated with it?

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Experiment No.-20 Aim :- To design a Narrow Band Pass Filter. Problem:- Design a Narrow Band Pass Filter using microcap IGMF configuration

so That fc = 1KHz , Q = 3, and Af = 10. Tool:- Microcap software. Circuit Diagram:-

Theory:- In designing the Narrow Band Pass Filter the cut off frequency fH and fL are very close to each other. A slight variation in component values can change the cut off frequency. Due to this cascading is not used. This filter type is unique in the sense that it uses two feedback points to the op-amp. Also the op-amp is used in the inverting mode. Generally the narrow band pass filter is designed for specific value of center frequency fc and Q or fc and B.W. Analysis:-

R1 = Q / 2πfc .C. Af R2 = Q / 2πfc .C. (2Q2 – Af ) R3= Q / πfc .C Af = R3 / 2R1

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Simulation Results:-

Result:-

The circuit of Narrow Band Pass Filter is studied and waveform obtained.

Viva Questions :- 1) What are the optimal values of RF and R1 to get a very good response of the filter? 2) Compare Narrow and wide band Pass Filters.