58
RTL Hardware Design by P. Chu Chapter 13 1 HIERARCHICAL DESIGN

HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

  • Upload
    others

  • View
    2

  • Download
    0

Embed Size (px)

Citation preview

Page 1: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 1

HIERARCHICAL DESIGN

Page 2: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 2

Outline1. Introduction 2. Components3. Generics4. Configuration5. Other supporting constructs

Page 3: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 3

1. Introduction

• How to deal with 1M gates or more? • Hierarchical design

– Divided-and-conquer strategy– Divide a system into smaller parts

Page 4: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 4

Page 5: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 5

• Complexity management– Focus on a manageable portion of the

system, and analyze, design and verify each module in isolation.

– Construct the system in stages by a designer or concurrently by a team of designers.

– Help synthesis process

Benefits of hierarchical design

Page 6: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 6

• Design reuse – Use predesigned modules or third-party cores– Use the same module in different design– Isolate device-dependent components (e.g.,

SRAM)

Page 7: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 7

Relevant VHDL constructs

• Component• Generic• Configuration• Library• Package• Subprogram

Page 8: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 8

2. Components

• Hierarchical design usually shown as a block diagram (structural description)

• VHDL component is the mechanism to describe structural description in text

• To use a component– Component declaration (make known)– Component instantiation (create an instance)

Page 9: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 9

Component declaration • In the declaration section of entity• Info similar to entity declaration• Syntax:

Page 10: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 10

• E.g., a decade (mod-10) counter

Page 11: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 11

Page 12: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 12

• Component declaration for dec_counter

Page 13: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 13

Component instantiation • Instantiate an instance of a component• Provide a generic value • Map formal signals to actual signals

Page 14: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 14

• Syntax

• Port association (named association)

Page 15: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 15

• E.g., 2-digit decimal counter (00=>01=> . . . =>99 =>00 . . .)

Page 16: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 16

Page 17: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 17

• The VHDL code is a textual description of a schematic

Page 18: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 18

• Positional association– Appeared to be less cumbersome– E.g., order of port declaration in entity:

– Alternative component instantiation

– Trouble if the order later changes in entity declaration

Page 19: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 19

• Mapping of constant and unused port– E.g.,

Page 20: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 20

• Good synthesis software should – remove the unneeded part – perform optimization over the constant input

Page 21: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 21

3. Generics

• Mechanism to pass info into an entity/component

• Declared in entity declaration and then can be used as a constant in port declaration and architecture body

• Assigned a value when the component is instantiated.

• Like a parameter, but has to be constant

Page 22: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 22

• e.g., parameterized binary counter– Note that the generic is declared before the

port and thus can be used in port declaration

Page 23: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 23

Page 24: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 24

• e.g., to use the parameterized counter

Page 25: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 25

Page 26: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 26

• e.g., parameterized mod-n counter– Count from 0 to n-1 and wrap around– Note that WIDTH depends on N

Page 27: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 27

Page 28: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 28

• E.g., the 2-digit decimal counter again

Page 29: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 29

Page 30: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 30

• Another useful application of generic: passing delay information

Page 31: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 31

4. Configuration

• Bind a component with an entity and an architecture

• Flexible and involved.• Only simple binding of entity and

architecture is needed in synthesis– Entity: like a socket in a printed circuit board– Architecture: like an IC chip with same outline

• Not supported by all synthesis software

Page 32: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 32

• Application of binding:– E.g., adder with different speed:

Fast but large adder or small but slow adder– E.g., Test bench

descriptions at different stages

Page 33: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 33

Page 34: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 34

• Type of configuration:– Configuration declaration (an independent

design unit)– Configuration specification (in architecture

body) • Default binding: (no configuration)

– Component bound to an entity with identical name

– Component ports bound to entity ports of same names

– Most recently analyzed architecture body bound to the entity

Page 35: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 35

• Configuration declaration– An independent design unit– Simplified syntax

Page 36: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 36

• E.g., create two architecture bodies for the decade counter (one up and one down)

Page 37: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 37

Page 38: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 38

Page 39: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 39

• Configuration specification– Included in the declaration section of

architecture body• Syntax:

Page 40: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 40

• E.g.,

Page 41: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 41

• Component instantiation and configuration in VHDL 93– Remove component and configuration

declaration – Usually satisfactory for RT-level synthesis – Syntax:

Page 42: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 42

• E.g.,

Page 43: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 43

5. Other constructs for developing large system

• Library• Subprogram• Package

Page 44: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 44

Library• A virtual repository to stored analyzed

design units• Physical location determined by software• Design units can be organized and stored

in different libraries

Page 45: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 45

• Default library: work – E.g.,

• Non-default library has to be declared:– syntax:

– E.g., library ieee;

Page 46: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 46

• E.g.,

Page 47: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 47

Subprogram

• Include function and procedure• Made of sequential statement • Is not a design unit; must be declared• Aimed for software hierarchy not hardware

hierarchy• We only use function

– Shorthand for complex expression– “House-keeping tasks; e.g., type conversion

Page 48: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 48

• Syntax of function

Page 49: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 49

• E.g.,

Page 50: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 50

• E.g.,

Page 51: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 51

• E.g.,

Page 52: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 52

Package

• Organize and store declaration information, such as data types, functions etc.

• Divided into– Package declaration – Package body (implementation of

subprograms)• Both are design units

Page 53: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 53

• Syntax

Page 54: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 54

• E.g.,

Page 55: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 55

Page 56: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 56

• Improved mod-n counter

Page 57: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 57

6. Partition• Physical partition:• Division of the physical implementation• Each subsystem is synthesized independently• Partition too small: loose optimization opportunity• Partition too large: require too much resource

– e.g., O(n3) algorithm 1000 gates for 1 sec;– 35 hours (503 sec) for one 50,000 gate circuit– 21 min (10*53 sec) for 10 5,000 gate circuit

• 5000 to 50,000 gates for today’s synthesizer

Page 58: HIERARCHICAL DESIGN - Cleveland State University · RTL Hardware Design by P. Chu Chapter 13 58 • Logical partition: – Help development and verification process for human designers

RTL Hardware Design by P. Chu

Chapter 13 58

• Logical partition:– Help development and verification process for

human designers– Logical partitions can be merged later in synthesis

• Some circuit should be isolated as independent modules– Device-dependent circuit: e.g., memory modules– “Non-Boolean” circuit: tri-state buffer, delay-

sensitive circuit, clock distribution network, synchronization circuit.