High performance 110 nm InGaAs/InP DHBTs in dry-etched in-situ refractory emitter contact technologyVibhor Jain, Evan Lobisser, Ashish Baraskar, Brian J Thibeault, Mark RodwellECE Department, University of California, Santa Barbara, CA 93106-9560

Zach Griffith, Miguel UrteagaTeledyne Scientific & Imaging, Thousand Oaks, CA 91360

Sebastian T BartschNanoelectronics Device Laboratory, EPFL, Switzerland

D Loubychev, A Snyder, Y Wu, J M Fastenau, W K LiuIQE Inc., 119 Technology Drive, Bethlehem, PA 18015

vibhor@ece.ucsb.edu, 805-893-3273

Outline

• HBT Scaling Laws

• Fabrication– Challenges

– Process Development

• DHBT Epitaxial Design

• Results– DC & RF Measurements

• Summary

2

Ohmic contacts

Lateral scaling

Epitaxial scaling

Bipolar transistor scaling laws

To double cutoff frequencies of a mesa HBT, must:

(emitter length Le)

We

Tb TcWbc

Keep constant all resistances and currentsReduce all capacitances and transit delays by 2

RCf tr

2

1

exitbnbb vTDT 22satcc vT 2

eex AR /contact

contacts

contactsheet 612 AL

W

L

WR

e

bc

e

ebb

cccb /TAC 2

cbmax, /)( cbieeffc TVAvI

effcbeffbb CR

ff

,,max 8

3

InP Bipolar transistor scaling roadmap

Emitter

256 128 64 32 Width (nm)

8 4 2 1 Access ρ (Ω·µm2)

Base

175 120 60 30 Contact width (nm)

10 5 2.5 1.25 Contact ρ (Ω·µm2)

Collector 106 75 53 37.5 Thickness (nm)

Current density 9 18 36 72 mA/µm2

Breakdown voltage 4 3.3 2.75 2-2.5 V

fτ520 730 1000 1400 GHz

fmax850 1300 2000 2800 GHzPe

rfor

man

ceD

esig

n

Evan Lobisser et al, IPRM 2009 4

Sub-200 nm HBT node: Fabrication Challenges - I

Emitter yield drops during base contact, subsequent lift-off steps

High stress in emitter metal stack

Poor metal adhesion to InGaAs

5

Need for low stress, high yield emitters

Fallen emitters

Sub-200 nm HBT node: Fabrication Challenges - II

Undercut in emitter semiconductor

Helps in Self Aligned Base Liftoff

Narrow emitters need controlled semiconductor undercut

Thin semiconductor

To prevent short, base metal needs to be thinned

Higher base metal resistance

Solution: Undercut in the emitter metal to act as a shadow mask6

Slow etch plane

InP Wet Etch

Fast etch plane

Composite Emitter Metal Stack

TiW

W

• W/Ti0.1W0.9 metal stack

• Low stress

• Refractory metal emitters

• Vertical dry etch profile

W emitter

Erik Lind

Evan LobisserTiW emitter

7

Junction Width via SEM, TEM

W

TiW

BC

SiNx

BCB

M1

200 nm

110 nm100 nm

100 nm emitter metal-semiconductor junction

110 nm emitter-base junction 8

In-situ Emitter Contact

• Highly doped n-InGaAs regrown on IQE InGaAs and in-situ Mo deposited • Active carriers ~ 5×1019 cm-3

• In-situ Mo deposition on n-InGaAs - c ~ 1.1 .m2 *

• In-situ deposition repeatable contact resistivity

0

5

10

15

20

25

30

35

0 5 10 15 20 25 30

Res

ista

nce

(

)

Gap spacing (m)

In-situ Mo contacts*

c ~ 1.1 .m2

* A. Baraskar et al., J. Vac. Sci. Tech. B, 27, 4, 2009

9

Process flow

Regrown InGaAs emitter cap

In-situ Mo dep

W/TiW/SiO2/Cr dep

SF6/Ar etch

SiNx Sidewall

SiO2/Cr removal

InGaAs Wet Etch

Second SiNx Sidewall

InP Wet Etch

Base Contact Lift-off

W/TiW interface acts as shadow mask for base lift off

Base and collector formed via lift off and wet etch

BCB used to passivate and planarize devices

10Self-aligned process flow for 110 nm DHBT

Mo

base

N- collector

InP substrate

sub collector

emitteremitter cap

n+ InGaAs

n InP

emitter capemitter

base

SiO2/Cr

TiW

MoW

SiN (SW)

emitterbase base base

Epitaxial Design

T(nm) Material Doping (cm-3) Description

10 In0.53Ga0.47As 51019 : Si Regrown Cap

10 In0.53Ga0.47As 51019 : Si Emitter Cap

10 InP 41019 : Si Emitter

10 InP 11018 : Si Emitter

30 InP 81017 : Si Emitter

25 In0.53Ga0.47As 7-41019 : C Base

7.5 In0.53Ga0.47 As 91016 : Si Setback

15 InGaAs / InAlAs 91016 : Si B-C Grade

3 InP 5 1018 : Si Pulse doping

74.5 InP 91016 : Si Collector

7.5 InP 11019 : Si Sub Collector

7.5 In0.53Ga0.47 As 21019 : Si Sub Collector

300 InP 21019 : Si Sub Collector

Substrate SI : InP

Vbe = 1 V, Vcb = 0.7 V, Je = 0, 30 mA/m2

Thin emitter semiconductor

Enables wet etching

High collector doping

High Kirk threshold11

En

erg

y (e

V)

Distance (nm)

Collector

Base

Emitter

-2.5

-2

-1.5

-1

-0.5

0

0.5

1

1.5

0 50 100 150 200

Results - DC Measurements

BVceo = 2.5 V @ Je = 1 kA/cm2

β = 18

Base ρsheet = 730 Ω/□, ρc < 4 Ω·µm2

Collector ρsheet = 12 Ω/□, ρc = 9 Ω·µm2

0

10

20

30

40

50

60

0 1 2 3

J e (

mA

/um

2)

Vce

(V)

50 mW/m240 mW/m2

Vcb

= 0 V

Aje = 0.11m x 3.5m

Ib = 0.01 mA

Ib,step

= 0.2 mA

10-10

10-8

10-6

10-4

10-2

0 0.2 0.4 0.6 0.8 1

I b, I

c (

A)

Vbe

(V)

Ic

Ib

nc = 1.41

nb = 3.04

Solid Line: Vcb

= 0 V

Dashed Line: Vcb

= 0.7 V

@Peak ft,fmax

Je = 23.1 mA/m2

P = 41 mW/m2

12

Peak ft,fmax

Gummel plot

Common emitter I-V

DUTShort

Results - RF Measurements using Off-Wafer LRRM

Open

G S G

111 ))()(( openshortopenDUTtrans YYYYY

Standard Off Wafer LRRM

Open & Short Pad Cap Extraction

13

* Koolen et al., IEEE BCTM 1991

1-67 GHz RF Data and Extrapolated Cutoff Frequencies

0

10

20

30

40

109 1010 1011 1012

Gai

n (d

B)

freq (Hz)

Aje

= 0.11m x 3.5m

U

H21

MAG/MSG

ft = 400 GHz

fmax

= 660 GHz

Ic = 8.9 mA

Vce = 1.74 V

Je = 23.1 mA/m2

Vcb = 0.7 V

Single-pole fit to obtain cut-off frequencies14

Parameter Extraction

3

4

5

6

7

8

0 5 10 15 20 25 30

Cc

b (

fF)

Je (mA/m2)

Vcb

= 0 V

Vcb

= 0.4 V

Vcb

= 0.7 V

15

150

300

450

600

750

0 5 10 15 20 25 30 35

f max

(G

Hz)

Je (mA/m2)

Vcb

= 0.7 V

Vcb

= 0 V

100

200

300

400

500

0 5 10 15 20 25 30 35

f t (G

Hz)

Je (mA/m2)

Vcb

= 0 V

Vcb

= 0.7 V

Jkirk = 32 mA/m2 (@Vcb = 0.7V)

Ccb/Ic = 0.43 psec/V

Equivalent CircuitCcb,x = 2.97 fF

Ccb,i = 0.99 fF

Rcb = 31 k

Rc = 2.2

Rex = 9.4

Rbe = 126

Rbb = 40

Cje + Cdiff = 8.5 + 43.5 fF gme-j

0.169e(-j0.15ps)

Base

Emitter

Col

Ccg = 3 fF

freq (1.000GHz to 67.00GHz)

S(1,

1)

freq (100.0MHz to 67.00GHz)

S_pa

ram

eter

_Dee

mbe

d_P

NA.

.S11

dS_

para

met

er_D

eem

bed_

PN

A..S

22d

S(2,

2)S(

1,2)

*5S(

2,1)

/5S_

para

met

er_D

eem

bed_

PN

A..S

12d*

5S_

para

met

er_D

eem

bed_

PN

A..S

21d/

5

S21/5S12x5

S11 S22

--- : Measured x : Simulated

freq (1.000GHz to 67.00GHz)

S(1,

1)

freq (100.0MHz to 67.00GHz)

S_pa

ram

eter

_Dee

mbe

d_P

NA.

.S11

dS_

para

met

er_D

eem

bed_

PN

A..S

22d

S(2,

2)S(

1,2)

*5S(

2,1)

/5S_

para

met

er_D

eem

bed_

PN

A..S

12d*

5S_

para

met

er_D

eem

bed_

PN

A..S

21d/

5

S21/5S12x5

S11 S22

--- : Measured x : Simulated

Hybrid- equivalent circuit from measured RF data

Rex ≈ 3.6 m2

16

Microstrip Style TRL Calibration

Ref Plane for TRL

Ref Plane for TRL

t ~ 1 m

h ~ 1 m

w ~ 1.7 m

BCB

A A’

A – A’Metal 1Ref Plane set at device edge

No further de-embedding required

17Collector Metal

140-180GHz RF data

0

5

10

15

1011 1012

Ga

in (

dB)

freq (Hz)

U

H21

Aje

= 0.11m x 3.5m

fmax

= 660 GHzft = 465 GHz

-20dB/decade fit to obtain cut-off frequencies18

Ic = 9.1 mA

Vce = 1.75 V

Je = 23.6 mA/m2

Vcb = 0.7 V

Conclusion

• Demonstrated smallest junction width for a III-V DHBT (110 nm)

• Peak ft/fmax = 465/660 GHz

– Je = 23.6 mA/m2

– Power Density (P) = 41 mW/m2

• High current and power density operation (P > 50 mW/m2)

19

Questions?

Thank You

This work was supported by the DARPA THETA program under HR0011-09-C-0060 and DARPA TFAST under N66001-02-C-8080. A portion of this work was done in the UCSB nanofabrication facility, part of NSF funded NNIN network and MRL Central Facilities supported by the MRSEC Program of the NSF under award No. MR05-20415