HiPEAC Roadmaps - it.uu.seHiPEAC = High-Performance Embedded Architecture and Compilers-- an EU FP7 Network of Excellence --2

M. DURANTON, D. BLACK-SHAFFER, S. YEHIA, K. DE BOSSCHERE

http://www.hipeac.net/roadmap

HiPEAC = High-Performance Embedded Architecture and Compilers

-- an EU FP7 Network of Excellence --

2

3

2009 20112008

http://www.hipeac.net/roadmap(these slides are a short version of the HiPEAC presentation)

HiPEAC Roadmaps

Part of the HiPEAC roadmap is required reading for AVDARK

You will find it and other required reading in the ”Extra course papers” directory.

As specified in the ”Reading instructions”: page 2-33 required reading page 34-40 read-through (RT)

Energy

Transport and mobility

Health

Aging population

EnvironmentProductivity

Safety

5

Computing Systems: Cornerstone of our civilization

Computing Systems

Education

Security

Impact on

Society

???7 HiPEACResearch objectives

HiPEACStrengths

???

HiPEACWeaknesses

Efficiency Complexity

Dependability

Technological constraints

???

Technological opportunities

Big data meets energy in an intelligent connected

physical world

Application pull

Business trends

Trends influencing Computing Systems

Application Pull BusinessTrends

• Data Deluge• Intelligent Processing• Ubiquitous

Communication

• Convergence• Specialization• Post-PC Devices

7

Data Deluge

8

Growth of data storage in Exabytes

9

Intelligent processing of “natural” data

Source: “The Landscape of Parallel Computing Research: A View from Berkeley”Krste Asanovic et all.

More and more applications are not only “number crunching”Recognition, Mining, Synthesis

Posture: Lying Down

10

Implicit and natural computing

Ubiquitous computing in a connected world

Courtesy Jan M. Rabaey, UC Berkeley, updated for this HiPEAC vision

Sensory swarm, actuators and real world data

InfrastructureCore (cloud)

Mobileaccess

11

Smart housecities, …

Trends influencing Computing Systems

Application Pull BusinessTrends

• Data Deluge• Intelligent Processing• Ubiquitous

Communication

• Convergence/standards• Specialization• Post-PC Devices

12

Convergence

Broadcast

Telecom

13MacBook image © Jared C. BenedictPhone, TV images © LG Electronics

IP, Internet•Business models• Standard(s)• Interoperability• …

Post-PC devices

Ubiquitous access

Personalized services

Delocalized computing and data

Massive data processing systems • Cloud• Peer to peer• Personalized

14iPad image © Apple, IncMP3 player image © J A S P E R@flickriPhone image © K!T@flickr

PC Market

Computing Systems: Drivers

16

Big data meets energy

in an intelligent connected

physical world

Application pull

Business trends


Dependability


???




physical world

Technology push

Application pull

Business trends

Technological trends influencing Computing Systems

Constraints Opportunities• Frequency Limits• Power Limits• Dark Silicon

• CMOS Phonotic• Non-volatile memories• 3D Stacking• New paradigms

18

Technological constraintsWe are at a turning point

Dark silicon

Continuation of Moore’s Law Power limits

19

Moore’s law: increase in transistor density

Data from Kunle Olukotun, Lance Hammond, Herb Sutter, Burton Smith, Chris Batten, and Krste Asanovic

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Limited frequency increase more cores

21


Limitation by power density and dissipation

2009: GP CPU = 130 W (45 nm)2009: Consumer SoC = 10W2009: Mobile SoC = 1 W

22


Dark Silicon

23

Source: Krisztián Flautner “From niche to mainstream:can critical systems make the transition?”

Specialization leads to more efficiency

Source: Bill Dally, « To ExaScale and Beyond »

www.nvidia.com/content/PDF/sc_2010/theater/Dally_SC10.pdf 24

In 22 nm, swapping 1 bit in a transistor has an energy cost:

~ 1 attojoule (10-18 J)

Moving a 1-bit data on the silicon cost:

~1 picojoule/mm (10-12 j/mm)

Moving a data 109 per second (1 GHz) in silicon has a cost:

1 pJ/mm x 109 s-1 = ~1 milliwatt/mm

64 bit bus @ 1 GHz: ~64 milliwatts/mm (with 100% activity)

For 1 cm of 64 bit bus @ 1 GHz : 0,64 W/cm

On modern chips, there are about several km of wires on chip, even

with low toggle rate, this leads to several Watt/cm2

25

Locality and communications management

Technological consequences

Efficiency localityFrequency limit

parallelismEnergy efficiency

specialization

Ease of programming

26

Technological trends influencing Computing Systems

Constraints Opportunities• Frequency Limits• Power Limits• Dark Silicon

• CMOS Phonotic• Non-volatile memories• 3D Stacking• New paradigms

27


Protons for storage

Photons for communication

Electrons for

computation

Using more Physics phenomena, e.g.

Optical interconnectsCMOS photonic is the integration of a photonic layer with an electronic

circuit.Advantages of CMOS photonic are:

Use of standard tools and foundry, wafer scale co-integration Lower energy (~100 fJ/bit), (wire: ~1 pJ/mm) High bandwidth (10 Gbps), Low latency (~10 ps/mm)

Silicon modulator

SOI wave guideI

2D networkInversed taper

Germanium photdetector

LASER

Source: CEA, Ahmed Jerraya29

Example: Memristive Devices Principle

1 L. Chua and S. Kang, Proceedings of the IEEE, 19762 D. Strukov et al., Nature, 2008

Metal (Mx+1 layer)

Metal (Mx layer)

Insulator• Oxide• Solid electrolytic• Organic material

ElectrodesMIM

V

VdRdt

R

Vth

-Vth’

Nonlinear characteristic

iixRv ).,( ),( ixfdtdx

Crossbar(University of Michigan)

Source: CEA, C. Gamrat

Non-volatile memories….

30

3D stacking

Multiple integration with 3D stacking…Source: STMicroelectronics & CEA 31

Technology also drives us to think differently…

Technology

System

Prog. Model

• Stochastic computing• Biologically inspired computing• Organic Computing• Autonomous computing, Self-*

• Smart spaces (smart house, town, building, rooms,…)

• Intelligent dust (smart sensors)

• 3D stacking• Photonic interconnect• Non-volatile memories• Molecular computing• More-than-Moore• Spintronics• Chemical computing• Biologically inspired cells• Memristors• ...• Also silicon based!

32


Dependability


???




physical world

Technology push

Application pull

Business trends

Core Computing Systems Challenges

Improving efficiency Multiple performance metrics Power defines performance Communication defines performance Heterogeneity and accelerators to the

rescue

Managing complexity The reign of legacy code Parallelism seems to be too complex for

humans Hardware complexity

(4G is 500x more complex than 2G)

Improving dependability Worst case design is not an option

anymore Systems must be built from unreliable

components Safety and security!

Impact on

Society


HiPEACStrengths

???

HiPEACWeaknesses


Dependability


???



physical world

Application pull

Business trends

Impact on

Society


HiPEACStrengths

???

HiPEACWeaknesses


Dependability


???



physical world

Application pull

Business trends

Derived HiPEAC Research ObjectivesC

ompu

ting

syst

ems

System complexity

• Heterogeneous computing systems

• Locality and communications management

• Cost-effective software for heterogeneous multicores

• Cross-component/cross-layer optimization for design integration

• Next-generation processor cores

• Architectures for the Data Deluge• Reliable systems for Ubiquitous

Computing40

Frequency limit parallelism

Energy efficiency heterogeneity

Ease of programming

41

Cost-effective software for heterogeneous multicores

Detailed HiPEAC Research areas

42

43

Global optimization

Technology and new devices

Efficiency System Complexity Dependability

Data DelugeEnergy Wall, Connected, Real world dataTurning point for Moore’s law

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Conclusion

Exiting new opportunities are ahead of us!

Documents

HiPEAC Roadmaps - it.uu.seHiPEAC = High-Performance Embedded Architecture and Compilers-- an EU FP7 Network of Excellence --2