INSTRUCTION SET OF MICROPROCESSOR 8085. 8085 has 246 instructions Each instruction of microprocessor 8085 consists of opcode & operand. Opcode tells about

INSTRUCTION SET OF MICROPROCESSOR 8085

8085 has 246 instructions

Each instruction of microprocessor 8085 consists of opcode & operand.

Opcode tells about the type of operation while operand can be data (8 or 16 bit), address, registers, register pair, etc.

Addressing mode is format of specifying on operands

Microprocessor has five addressing modes

Addressing Modes of Microprocessor 8085

Direct Addressing

Register Addressing

Register Indirect

Addressing

Immediate Addressing

Implied Addressing

Direct Addressing : • Address appears after opcode of instruction• The address of operand is specified within instruction• These are 3 byte instructions. • Byte 1 is opcode while byte 2 & 3 are of address.

Example : LDA D500 HThis instruction will load accumulator with content of memory

location D500 H.

Example : STA 95FF HThis instruction will store the content of accumulator to memory

location 95FF H

Instruction Byte 1 Byte 2 Byte 3

LDA D500 H LDA 00 D5


STA 95FF H STA FF 95

Register Addressing : • Register appears after opcode• Operands are general purpose registers specified within instruction• These are single byte instructions. • All actions occur within CPU

Example : MOV A,BThis instruction transfers the content of register B to accumulator

without modifying the content of B

Example : INR BThis instruction will increment the content of register B by 1

Example : ADD CThis instruction will add the content of register C to accumulator

without modifying the content of C

Register Indirect Addressing : • Content of register pair points to the address of operand.• A register pair (H-L pair) is specified for addressing 16-bit address of

memory location.• These generally are single byte instructions.

Example : MOV M,BThis instruction transfers the content of register B to memory

location whose address is placed in HL register pair without modifying the content of B

Example : MOV A,MThis instruction transfers the content of memory location whose

address is placed in HL register pair to accumulator without modifying the content of memory location

Example : ADD MThis instruction will add the content of memory location whose

address is placed in HL register pair to accumulator without modifying the content of memory location

Immediate Addressing : • Data (8 or 16-bit) appears immediately after opcode of instruction.• In these instructions actual data is specified within the instruction.• These may be 2 to 3 byte instructions.

Example : MVI A,99HThis instruction will load the accumulator with 8-bit immediate data

99H which is specified within second byte of instruction.

Example : LXI D,8C50HThis instruction will load DE register pair with 16-bit immediate data

8C50H. Where D=8C & E=50

Example : ADI A,88HThis instruction will add the 8-bit immediate data 88H to

accumulator

Instruction Byte 1 Byte 2 = E Byte 3 = D

LXI D,8C50 H LXI D 50 8C

Implied/Implicit Addressing : • Operand is generally not specified within the instruction but it is

predetermined.• Generally operand is accumulator.• Most of the logical group instructions belong to this addressing

mode.• These are single byte instructions. • All actions occur within CPU

Example : CMAThis instruction complements the content of accumulator. Result is

placed in accumulator.

Example : RLCThis instruction rotates the content of accumulator to left by 1-bit

position without modifying the content of memory location

CY A7 A6 A5 A4 A3 A2 A1 A0

Grouping of instructions of 8085 according to length

One Byte instructio

n(One word)

Two Byte instructio

n(Two word)

Three Byte instruction

(three word)

Opcode & operand both in 1 byte

Eg: MOV A,B ADD M

Opcode is 1st byteoperand is 2nd byte(generally 8-bit data)

Eg: ADI 88H SUI FCH

Opcode is 1st byteoperand is 2nd & 3rd byte(generally 16-bit address or data)

Eg: LXI H,C588H STA D5FCH

Classification of instructions based on functions

Data Transfer Group

Arithmetic Group

Logical Group

Branching Group

Machine Control Group

Copies data from a location (source) to another location (destination) without modifying content of sourceEg: MOV, MVI, SHLD, LDA, STA

Performs arithmetic operations such as addition, subtraction, increment, decrement, etc. on data registers or memoryEg: ADD, SUB, SUI, DCX, INR

Performs logical operations such as AND, OR, EX-OR, Complement, etc. generally with accumulator. (Also rotate operation)Eg: ANA, ORI, XRA, RLC, CMP

Allows programmer to change the sequence of execution of program conditionally or unconditionally & enables to form a loop of instructionEg: JMP, JNC, JZ, JPE, JP

Control machine operations such as Halt, Interrupt, Input, Output, etc.

Eg: HLT, PUSH, POP, IN, OUT

I] Data Transfer Group

1) MOV rd, rs : MOVE REGISTER

Format: [rd] [rs]

Addressing: Register addressingGroup: Data transfer groupBytes: 1 byteFlags: NoneThis instruction will copy contents of source register to destination register without modifying content of source register.Example: Let [A] = 87 H & [C] = 55 H

Instruction: MOV C,A (hence ‘A’ is rs & ‘C’ is rd)

After execution: [A] = 87 H & [C] = 87 H


2) MOV r, M : MOVE FROM MEMORY TO REGISTER

Format: [r] [[H-L]]Addressing: Register indirect addressingGroup: Data transfer groupBytes: 1 byteFlags: NoneThis instruction will load destination register with content of memory location whose address is stored in HL register pair without modifying content of memory location.Example: Let [H-L] = C050H, [C050] = 58H & [B] = C5 H

Instruction: MOV B,MAfter execution: [B] = 58H & [C050] = 58 H


3) MOV M, r : MOVE FROM REGISTER TO MEMORY

Format: [[H-L]] [r]Addressing: Register indirect addressingGroup: Data transfer groupBytes: 1 byteFlags: NoneThis instruction will copy content of source register to the memory location whose address is stored in HL register pair without modifying content of source.Example: Let [H-L] = C050H, [C050] = 58H & [A] = C5 H

Instruction: MOV M,AAfter execution: [A] = C5H & [C050] = C5H


4) MVI r, data : MOVE IMMEDIATE 8-BIT DATA TO REGISTERFormat: [r] data (2nd byte)Addressing: Immediate addressingGroup: Data transfer groupBytes: 2 byteFlags: NoneThis instruction will load register r with 8-bit immediate data specified in 2nd byte of instruction.Example: Instruction: MVI C, 23H

After execution: [C] = 23H


5) MVI M, data : MOVE IMMEDIATE 8-BIT DATA TO MEMORYFormat: [[H-L]] data (2nd byte)Addressing: Immediate/ Register indirect addressingGroup: Data transfer groupBytes: 2 byteFlags: NoneThis instruction will load the memory location whose address is stored in HL register pair with 8-bit immediate data specified in 2nd byte of instruction.Example: Let [H] = C0 H & [L] = 50 H i.e., [H-L] = C050 H

Instruction: MVI M, 88 H After execution: [C050] = 88 H

I] Data Transfer Group6) LXI rp, 16-bit data : LOAD REGISTER PAIR IMMEDIATE

Format: [rp] 16-bit data i.e,. [rh] 3rd byte, [rl] 2nd byteAddressing: Immediate addressingGroup: Data transfer groupBytes: 3 byteFlags: NoneThis instruction will load the specified register pair with 16-bit data specified in last 2 bytes of instruction. Byte 3 is moved into higher order register & byte 2 is moved into lower order register.Example: Instruction LXI B, D500 H

This instruction will load BC register pair with D500 H. D5 H will be in higher order register (B) & 00 H will be in lower order register (C)Instruction Byte 1 Byte 2 [C] Byte 3

[B]

LXI B, D500 H LXI B 00 D5

I] Data Transfer Group7) LDA address : LOAD ACCUMULATOR DIRECT WITH DATA AT

GIVEN ADDRESS

Format: [A] [16-bit address] i.e,. [A] [[byte3][byte2]] Addressing: Direct addressingGroup: Data transfer groupBytes: 3 bytesFlags: NoneThis instruction will load accumulator with content of memory location whose address is given in the last 2 bytes of instruction. Content of the memory location remains unchanged.Example: Let [9580] = 28 H & [A] = 55 H

Instruction: LDA 9580 H After execution: [A] = 28 H [9580] = 28 H


LDA 9580 H LDA 80 95

I] Data Transfer Group8) STA address : LOAD ACCUMULATOR DIRECT WITH DATA AT

GIVEN ADDRESS

Format: [16-bit address] [A] i.e,. [[byte3][byte2]] [A] Addressing: Direct addressingGroup: Data transfer groupBytes: 3 bytesFlags: NoneThis instruction will store content of accumulator direct into the memory location whose address is given in the last 2 bytes of instruction. Content of accumulator remains unchangedExample: Let [C050] = 28 H & [A] = 66 H

Instruction: STA C050 H After execution: [A] = 66 H [C050] = 66 H


STA C050 H STA 50 C0

I] Data Transfer Group9) LHLD address : LOAD H & L REGISTER DIRECT

Format: [L] [16-bit addr] i.e., [L] [[byte3][byte2]] [H] [16-bit addr +1] i.e., [H] [[byte3][byte2]+1]

Addressing: Direct addressingGroup: Data transfer groupBytes: 3 bytesFlags: None1st byte is opcode, 2nd & 3rd byte give 16-bit address of memory location. The content of memory location whose address is given in the last 2 bytes of instruction is loaded into register L & the content of next memory location is loaded into register H.Example: Let [C050] = 28 H & [C051] = 66 H

Instruction: LHLD C050 H After execution: [H] = 66 H & [L] = 28 H


LHLD C050 H LHLD 50 C0

I] Data Transfer Group10)SHLD address : STORE H & L REGISTER DIRECT

Format: [16-bit addr] [L] i.e., [[byte3][byte2]] [L][16-bit addr +1] [H] i.e., [[byte3][byte2]+1] [H]

Addressing: Direct addressingGroup: Data transfer groupBytes: 3 bytesFlags: None1st byte is opcode, 2nd & 3rd byte give 16-bit address of memory location. The content of register L is stored into the memory location whose address is given in the last 2 bytes of instruction & the content of register H is stored into the next memory location.Example: Let [H] = 34H & [L] = 89H

Instruction: SHLD C050 H After execution: [C050] = 89 H & [C051] = 34 H


SHLD C050 H SHLD 50 C0

I] Data Transfer Group11)LDAX rp : LOAD ACCUMULATOR INDIRECT

Format: [A] [[rp]]

Addressing: Register Indirect addressingGroup: Data transfer groupBytes: 1 byteFlags: NoneThe content of memory location whose address is stored in register pair specified in instruction is loaded into accumulator. The content of memory location remains unchanged. Here rp can be B (B-C pair) or D (D-E pair). Example: Let [B] = 35H & [C] = 45H & [3545] = 22H

Instruction: LDAX B After execution: [A] = 22 H & [3545] = 22 H

I] Data Transfer Group12)STAX rp : STORE ACCUMULATOR INDIRECT

Format: [[rp]] [A]

Addressing: Register Indirect addressingGroup: Data transfer groupBytes: 1 byteFlags: NoneThe content of accumulator is stored into the memory location whose address is stored in register pair specified in instruction. The content of accumulator remains unchanged. Here rp can be B (B-C pair) or D (D-E pair). Example: Let [A] = 88H, [D] = 35H, [E] = 45H & [3545] = 22H

Instruction: STAX D After execution: [A] = 88 H & [3545] = 88 H

I] Data Transfer Group13)XCHG : EXCHANGE H & L WITH D & E

Format: [H] [D][L] [E]

Addressing: Register addressingGroup: Data transfer groupBytes: 1 byteFlags: NoneThe content of register H is exchanged with that of register D & the content of register L is exchanged with that of register E. Example: Let [H] = 28H, [L] = 35H, [D] = 45H & [E] = 22H

Instruction: XCHG After execution: [H] = 45 H & [L] = 22 H

[D] = 28 H & [E] = 35 H

II] Arithmetic Group1) ADD r : ADD REGISTER

Format: [A] [A] + [r] Addressing: Register addressingGroup: Arithmetic groupBytes: 1 byteFlags: AllThe content of register r is added to the content of accumulator. The result is stored in accumulator. All flags may be affected Example: Let [C] = 27H & [A] = 15H

Instruction: ADD CAddition: 27H = 0 0 1 0 0 1 1 1

+15H = 0 0 0 1 0 1 0 1 ------- ----------------- 3C H = 0 0 1 1 1 1 0 0

S = 0, Z = 0, Ac = 0P = 1, Cy = 0

After execution: [A] = 3C H [C] = 27Flag register - 0 0 - 0 - 1 - 0

II] Arithmetic Group2) ADD M : ADD MEMORY CONTENT TO ACCUMULATOR

Format: [A] [A] + [[H] [L]] Addressing: Register Indirect addressingGroup: Arithmetic groupBytes: 1 byteFlags: AllThe content of accumulator is added to the content of memory location, whose address is stored in HL register pair. The result is stored in accumulator. All flags may be affected Example: Let [HL] = C000H & [C000] = 15H & [A] =30H

Instruction: ADD MAddition: 15H = 0 0 0 1 0 1 0 1

+30H = 0 0 1 1 0 0 0 0 ------- ----------------- 45H = 0 1 0 0 0 1 0 1

S = 0, Z = 0, Ac = 0P = 0, Cy = 0

After execution: [A] = 45 H [C000] = 15 HFlag register -

0 0 - 0 - 0 - 0

II] Arithmetic Group3) ADI data : ADD IMMEDIATE TO ACCUMULATOR

Format: [A] [A] + data (BYTE 2) Addressing: Immediate addressingGroup: Arithmetic groupBytes: 2 bytesFlags: AllThe 8-bit immediate data specified in 2nd byte instruction is added to the content accumulator. The result is stored in accumulator. All flags may be affected Example: Let [A] = 8A H

Instruction: ADI 28 HAddition: 8AH = 1 0 0 0 1 0 1 0

+ 28H = 0 0 1 0 1 0 0 0 ------- ------------------ B2H = 1 0 1 1 0 0 1 0

S = 1, Z = 0, Ac = 1P = 1, Cy = 0

After execution: [A] = B2 H Flag register -

1 0 - 1 - 1 - 0

II] Arithmetic Group4) ADC r : ADD REGISTER TO ACCUMULATOR WITH CARRY

Format: [A] [A] + [r] + [Cy] Addressing: Register addressingGroup: Arithmetic groupBytes: 1 byteFlags: AllThe content of accumulator is added to the content of register & the content of the carry flag. The result is stored in accumulator. All flags may be affected Example: Let [A] = 4C H & [B] = 25 H & [Cy] =01 H

Instruction: ADC BAddition: [A] : 4CH = 0 1 0 0 1 1 0 0 [B] : +25H = 0 0 1 0 0 1 0 1

[Cy] : +01H = 0 0 0 0 0 0 0 1 -----------------------------------

After execution: [A] = 72H = 0 1 1 1 0 0 1 0S = 0, Z = 0, Ac = 1P = 1, Cy = 0

Flag register -

0 0 - 1 - 1 - 0

Note: The instruction ADC r is used in 16-bit addition. Eg: to add content of BC register pair to DE register pair, this instruction is used to account for the carry generated by the lower data byte.

II] Arithmetic Group5)ADC M : ADD MEMORY CONTENT TO ACCUMULATOR WITH CARRY

Format: [A] [A] + [[H-L]] + [Cy] Addressing: Register Indirect addressingGroup: Arithmetic groupBytes: 1 byteFlags: AllThe content of memory location whose address is stored in HL register pair is added to the content of accumulator & the content of the carry flag. The result is stored in accumulator. All flags may be affected Example: Let [A] = 2B H, [HL] = C050 H, [C050] = 58 H & [Cy] =00 H

Instruction: ADC MAddition: [A] : 2BH = 0 0 1 0 1 0 1 1 [B] : +58H = 0 1 0 1 1 0 0 0

[Cy] : +00H = 0 0 0 0 0 0 0 0 -----------------------------------


Flag register -

1 0 - 1 - 0 - 0

II] Arithmetic Group6) ACI data : ADD IMMEDIATE TO ACCUMULATOR WITH CARRY

Format: [A] [A] + data + [Cy] Addressing: Immediate addressingGroup: Arithmetic groupBytes: 2 bytesFlags: AllThe 8-bit immediate data specified in 2nd byte instruction is added to the content accumulator & to the contents of carry flag. The result is stored in accumulator. All flags may be affected Example: Let [A] = 8A H & [Cy] = 01 H

Instruction: ACI 28 HAddition: 8AH = 1 0 0 0 1 0 1 0

+28H = 0 0 1 0 1 0 0 0 +00H = 0 0 0 0 0 0 0 0 ------- ------------------ B2H = 1 0 1 1 0 0 1 0

S = 1, Z = 0, Ac = 1P = 1, Cy = 0

After execution: [A] = B2 H Flag register -

1 0 - 1 - 1 - 0

II] Arithmetic Group7) SUB r : SUBTRACT REGISTER FROM ACCUMULATOR

Format: [A] [A] - [r] Addressing: Register addressingGroup: Arithmetic groupBytes: 1 byteFlags: AllThe content of register r is subtracted from the content of accumulator. The result is placed in accumulator. All flags may be affected Example: Let [B] = 27H & [A] = 15H

Instruction: SUB B ………….. i.e,. [A] – [B]Subtraction: [B] : 27 H = 0 0 1 0 0 1 1 12’s complement = 1 1 0 1 1 0 0 1+

+[A] : +15 H = 0 0 0 1 0 1 0 1 ------------------------------------

/1 1 1 0 1 1 1 0 S = 1, Z = 0, Ac = 0

Complement carry : / 1 1 1 0 1 1 1 0 P = 1, Cy = 1After execution: [A] = EE H [C] = 27Flag register –

The result as a negative number will be in 2’s complement & Carry (Borrow) flag is set

1 0 - 0 - 1 - 0

0

1

II] Arithmetic Group8) SUB M : SUBTRACT MEMORY FROM ACCUMULATOR

Format: [A] [A] - [[H-L]] Addressing: Register Indirect addressingGroup: Arithmetic groupBytes: 1 byteFlags: AllThe content of memory location whose address is stored in HL register pair is subtracted from the content of accumulator. The result is placed in accumulator. All flags may be affected Example: Let [H-L] = F000 H & [F000] = 02H & [A] = 05 H

Instruction: SUB M Subtraction: [A] – [[H-L]] = [A] – [F000] = 05 H – 02 H = 03 H

After execution: [A] = 03 H

II] Arithmetic Group9) SUI data : SUBTRACT IMMEDIATE FROM ACCUMULATOR

Format: [A] [A] – data (byte 2) Addressing: Immediate addressingGroup: Arithmetic groupBytes: 2 byteFlags: AllThe 8-bit immediate data specified in 2nd byte of instruction is subtracted from the content of accumulator. The result is placed in accumulator. All flags may be affected Example: Let [A] = 22 H

Instruction: SUI 10HAfter execution: [A] = 12 H

II] Arithmetic Group10) SBB r : SUBTRACT REGISTER & BORROW FROM ACCUMULATOR

Format: [A] [A] - [r] - [Cy]Addressing: Register addressingGroup: Arithmetic groupBytes: 1 byteFlags: AllThe content of register r & carry flag is subtracted from the content of accumulator. The result is placed in accumulator. All flags may be affected Example: Let [A] = 3AH & [C] = 15H & [Cy] = 01H

Instruction: SBB CSubtraction: [C] : 15 H = 0 0 0 1 0 1 0 1 Borrow : +01 H = 0 0 0 0 0 0 0 1+

------------------------------------ 0 0 0 1 0 1 1 0 2’s complement = 1 1 1 0 1 0 1 0 +3A H = 0 0 1 1 1 0 1 0 ----------------------- / 0 0 1 0 0 1 0 0

complement carry : Cy flag is RESET


1

II] Arithmetic Group11)SBB M : SUBTRACT MEMORY CONTENT TO ACCUMULATOR WITH

CARRY Format: [A] [A] - [[H-L]] - [Cy] Addressing: Register Indirect addressingGroup: Arithmetic groupBytes: 1 byteFlags: AllThe content of memory location whose address is stored in HL register pair is subtracted along with carry bit from the content of accumulator. The result is placed in accumulator. All flags may be affected Example: Let [A] = 2C H, [HL] = C050 H, [C050] = 28 H & [Cy] =00 H

Instruction: SBB M


Flag register - 0 0 - 0 - 0 - 0

II] Arithmetic Group12)SBI data : SUBTRCT IMMEDIATE WITH BORROW

Format: [A] [A] - data - [Cy] Addressing: Immediate addressingGroup: Arithmetic groupBytes: 2 bytesFlags: All

The 8-bit immediate data specified in 2nd byte instruction is subtracted along with the carry bit from the content accumulator. The result is placed in accumulator. All flags may be affected

Example: Let [A] = 29 H & [Cy] = 01 H

Instruction: SBI 28 H


II] Arithmetic Group13)INR r : INCREMENT REGISTER CONTENT BY 1

Format: [r] [r] + 1 Addressing: Register addressingGroup: Arithmetic groupBytes: 1 byteFlags: S, Z, P, AcThe content of register r is incremented by 1 & the result is placed in the same register. All flags except carry flag may be affected. Here r can be A, B, C, D, E, H & L Example: Let [C] = FF H

Instruction: INR C

After execution: [C] = 00 H

II] Arithmetic Group14)INR M : INCREMENT MEMORY CONTENT BY 1

Format: [[H] [L]] [[H] [L]] + 1 Addressing: Register Indirect addressingGroup: Arithmetic groupBytes: 1 byteFlags: S, Z, P, AcThe content of memory location whose address is stored in H-L register pair is incremented by 1 & the result is placed in the same place. All flags except carry flag may be affected.

Example: Let [H-L] = F050 H & [F050] = 05 H Instruction: INR M

After execution: [F050] = 06 H

II] Arithmetic Group15)INX rp : INCREMENT REGISTER PAIR BY 1

Format: [rp] [rp] + 1

Addressing: Register addressingGroup: Arithmetic groupBytes: 1 byteFlags: NoneThe content of register pair is incremented by 1. No flags are affected. This instruction views the content of register pair as 16-bit data.

Example: Let [H-L] = F050 H Instruction: INX H

After execution: [H-L] = F051 H

II] Arithmetic Group16)DCR r : DECREMENT REGISTER CONTENT BY 1

Format: [r] [r] - 1 Addressing: Register addressingGroup: Arithmetic groupBytes: 1 byteFlags: S, Z, P, AcThe content of register r is decremented by 1 & the result is placed in the same register. All flags except carry flag may be affected. Here r can be A, B, C, D, E, H & L Example: Let [C] = FF H

Instruction: DCR C

After execution: [C] = FE H

II] Arithmetic Group17)DCR M : DECREMENT MEMORY CONTENT BY 1

Format: [[H] [L]] [[H] [L]] - 1 Addressing: Register Indirect addressingGroup: Arithmetic groupBytes: 1 byteFlags: S, Z, P, AcThe content of memory location whose address is stored in H-L register pair is decremented by 1 & the result is placed in the same place. All flags except carry flag may be affected.

Example: Let [H-L] = F050 H & [F050] = 05 H Instruction: DCR M

After execution: [F050] = 04 H

II] Arithmetic Group18)DCX rp : DECREMENT REGISTER PAIR BY 1

Format: [rp] [rp] - 1

Addressing: Register addressingGroup: Arithmetic groupBytes: 1 byteFlags: NoneThe content of register pair is decremented by 1. No flags are affected. This instruction views the content of register pair as 16-bit data.

Example: Let [H-L] = F050 H Instruction: INX H

After execution: [H-L] = F04F H

II] Arithmetic Group19)DAD rp : ADD REGISTER PAIR TO H-L REGISTER

Format: [H][L] [H][L] + [rh] [rl]

Addressing: Register addressingGroup: Arithmetic groupBytes: 1 byteFlags: CyThe content of register pair rp is added to the content of H-L register pair. The result is placed in H-L register pair. Only carry flag may be affected.

Example: Let [H] = F050 H Instruction: INX H

After execution: [H-L] = F051 H

Documents

INSTRUCTION SET OF MICROPROCESSOR 8085. 8085 has 246 instructions Each instruction of microprocessor 8085 consists of opcode & operand. Opcode tells about