INSTRUCTOR'S MANUAL SOFTWARE AND … · SOFTWARE AND HARDWARE ENGINEERING: MOTOROLA M68HC11 ... Software and Hardware Engineering: Motorola ... microcontroller chip is very

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))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))INSTRUCTOR'S MANUAL

SOFTWARE AND HARDWARE ENGINEERING:

MOTOROLA M68HC11 )))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))))Q

1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

2 COURSE ORGANIZATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

3 DETAILED COURSE PLAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

5 LABORATORY EXERCISES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6MC68HC11 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6MC68HC11 Program Debugging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7Addressing and Arithmetic - I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Hexadecimal and Binary Memory Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Addressing and Arithmetic - II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10BCD to Binary Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Timing, I/O and Subroutines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Parallel Ports & More ASCII Fun . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13M68HC11 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Timer and Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Frequency Counter with Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16Pulse-width Modulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17M68HC11 SCI Port Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18M68HC11 SCI Port with Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19EEPROM Programming and ROM Resident Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20Test Your Reaction Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

5 SOLUTIONS TO CHAPTER PROBLEMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

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1 INTRODUCTION

Software and Hardware Engineering: Motorola M68HC11, and the associatedMicrocomputers/Microcontrollers: Principles of Software and Hardware Engineering, aredesigned to provide a fundamental understanding of a microcomputer-based system. The materialis aimed at sophomore, junior or senior level Electrical Engineering, Electrical EngineeringTechnology or Computer Science students taking their first course in microcomputers. A pre-requisite is a digital logic course. The students must understand the principles of number systems,coding, and combinatorial and sequential logic circuits. A first course in a programming languageis also a normal prerequisite.

The top down design philosophy is used throughout this text. This design approach, inwhich one progresses from more general concepts to the more detailed specifics required for adesign, is ideal for teaching both hardware and software concepts. We will visualize the need forparticular function and then discuss the general principles which are applicable for any processor.

Specific examples using the Motorola M68HC11 illustrate the general principles. Thismicrocontroller chip is very powerful but straight forward to apply. Beginning students can use iteasily. The manufacturer's M68HC11 Reference Manual may also be used with the text. Othersupplemental texts for use with other microcontrollers and microprocessors are planned.

2 COURSE ORGANIZATION

The overall objective for this text and Microcomputers/Microcontrollers: Principles ofSoftware and Hardware Engineering is to provide an introduction to the architecture and designof microcomputer/microcontroller hardware and software. We do not aim to make our studentsexperts in using the M68HC11 microcontroller.

The introductory chapter in Microcomputers/Microcontrollers: Principles of Softwareand Hardware Engineering explains the concepts of a stored program computer. A plausibledesign is created, and while the result doesn't answer all the questions students might have abouthow a computer is designed, nor is it very practical, it does give them a fundamental understandingabout how a computer works. We want to dispel the mystery but we don't want to have too manydetails to obscure the relevant issues.

The resources of the M68HC11 used in the laboratory are then explored with side trips toexplain some important issues. Our goal is to be able to begin laboratory exercises while teachingother concepts. To do this, we introduce the basic hardware registers, the ALU, and the conditioncodes. The explanation of the condition codes register allows us to discuss binary codes andcoding. Even though students have learned about binary codes in their introductory logic courses,a review is beneficial. Special attention is paid to codes used for arithmetic and how the variouscodes affect the operation of the condition code register.

By this time (at least in our course) the students are starting the concurrent laboratory andneed to know how to program the computer. We point out that learning the instruction set of aprocessor involves knowing what the hardware resources are, what addressing modes have beenimplemented, and what general categories of instructions are available. A general discussion onaddressing is provided with specific examples from the processor and instruction set being used inthe laboratory.

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The mechanics of using an assembler are then presented in enough detail that the studentscan assemble and run small programs in the laboratory. The complete instruction set for theprocessor used is covered, at least in instruction categories. It is sufficient to lead the studentsthrough examples of using various instructions, particularly those with different addressing modes.

By now the students are able to write, assemble, download, and run simple programs in thelaboratory. Their experience will show the need for debugging tools. We discuss debugging toolsin general in Microcomputers/Microcontrollers: Principles of Software and HardwareEngineering but the bulk of the information the students need is in Software and HardwareEngineering: Motorola M68HC11 where the debugging monitor supplied by Motorola with theirEVB system is discussed. In courses where other debugging software or hardware is used,instructors can supplement this chapter with their own information.

A large portion of the cost of developing any microcomputer system is the software. A keychapter in Microcomputer/Microcontroller Software and Hardware Engineering is dedicated tosoftware design. The basic elements of software design are presented and the differences betweendesign methodologies and design tools are discussed. Top down design is presented and pseudo-code, probably the most widely used design tool, is promoted. This should reinforce softwaredesign concepts students receive in a previous course. The students are shown how to usestructured programming principles in assembly language. The design of software modules, withattention paid to reducing interaction between modules, is also presented.

Bus architectures and interfaces between external devices and a CPU are then discussed. Asynchronous bus transfer handshaking is covered. The basic input/output capabilities of theM68HC11 are discussed with laboratory exercises giving the students practical experience.

After programmed input and output is covered, the need for interrupts and real timeoperations can be discussed. Various forms of interrupt processing are covered in chapter M8 ofMicrocomputer/Microcontroller Software and Hardware Engineering and the specific detailsnecessary for the students to attempt interrupt processing on the M68HC11 in the laboratory arecovered in chapter S7.

By now the students understand the reason for memory (to store a program and data). Wediscuss the different types of memory, ROM and RAM, and why a system has both. Memoryinterfaces and timing signals are presented. Software and Hardware Engineering: MotorolaM68HC11 chapter S8 shows the memory types available in the M68HC11.

Many engineers have a terrible time with serial interfaces, especially the RS-232C"standard", because they don't understand why all the signals in the standard interface are there. One has to understand that the handshaking signals were developed for half-duplex communicationchannels. Once these concepts are understood, and that two different types of devices have thesame name for different signals, the serial interface problem becomes much easier. Chapter M?provides complete coverage of serial interfaces. Interface cables for various RS-232C devicesare shown and other common interface standards such as RS-422, RS-423, and RS-485 aredefined. The M68HC11 has two different types of serial interfaces. Each in covered in detail inchapter S10.

The use of timers and the importance of real time events are then covered. The M68HC11has an especially powerful timer section which students can use in their laboratories.

Each text concludes with a discussion of the concepts of A/D conversion and itscompanion, D/A conversion.

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3 DETAILED COURSE PLAN

The following detailed course plan shows how to closely integrate the two texts. In thereading assignments shown, "M" denotes Microcomputer/Microcontrollers: Principles ofSoftware and Hardware Engineering, and "S" Software and Hardware Engineering: MotorolaM68HC11.

Lecture Number: 1 Topic: Assembly language programmingTopic: Introduction and the picoprocessor Reading Assignment: S5.1-S5.2, M4.5-M4.6Reading Assignment: M1, M2.1-M2.3

Lecture Number: 2; 3 Topic: Debugging and testing.Topic: The picoprocessor Reading Assignment: M5.9-5.10, SAReading Assignment: M2.4; M2.5-M2.8

Lecture Number: 3 Topic: Code location.Topic: Registers and condition codes. Reading Assignment: M5.3-M5.7Reading Assignment: S2.1-S2.3, M3.1-M3.2,MA.1 Lecture Number: 15

Lecture Number: 4 Reading Assignment: M6.1-M6.7Topic: The condition code register.Reading Assignment: M3.5-M3.7 Lecture Number: 16

Lecture Number: 5 Reading Assignment: M6.9Topic: Memory architectures and addressingmodes Lecture Number: 17; 18Reading Assignment: M4.1-M4.4 Topic: Assembly language structured forms.

Lecture Number: 6Topic: Addressing modes with M68HC11 Lecture Number: 19examples. Topic: Module design.Reading Assignment: M4.4, S2.4 Reading Assignment: M6.12-M6.14

Lecture Number: 7; 8; 9 Lecture Number: 20Topic: M68HC11 Instruction set Topic: Introduction to parallel I/OReading Assignment: S4 Reading Assignment: M7.1-M7.2

Lecture Number: 10; 11 Lecture Number: 21Topic: AS11 Assembler Topic: I/O timing and address decodingReading Assignment: S3, M5.1-M5.2 Reading Assignment: M7.3-M7.3

Lecture Number: 12

Lecture Number: 13

Lecture Number: 14

Topic: Top down design.

Topic: Structured programming.

Reading Assignment: S5.3-S5.5

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Lecture Number: 22 Topic: M68HC11 memoryTopic: M68HC11 I/O Reading Assignment: S8.1-S8.9Reading Assignment: S6.1-6.5

Lecture Number: 23 Topic: M68HC11 timerTopic: I/O handshaking Reading Assignment: S9.1-S9.3Reading Assignment: M7.4, S6.6

Lecture Number: 24 Topic: M68HC11 timer interruptsTopic: I/O synchronization Reading Assignment: S9.4-S9.10Reading Assignment: M7.4, S6.7-S6.8

Lecture Number: 25 Topic: Serial I/OTopic: Simple I/O devices Reading Assignment: M10.1-M10.9Reading Assignment: M7.6-M7.9

Lecture Number: 26 Topic: M68HC11 serial I/OTopic: Introduction to interrupts Reading Assignment: S10.1-S10.5Reading Assignment: M8.1-M8.5

Lecture Number: 27 Topic: Analog I/OTopic: Interrupt priorities and introduction to Reading Assignment: M11.1-11.7M68HC11 interruptsReading Assignment: M8.6-M8.7, S7.1-S7.3 Lecture Number: 40

Lecture Number: 28 Reading Assignment: S10.1-S10.6Topic: M68HC11 parallel I/O interruptsReading Assignment: S7.4-S7.7

Lecture Number: 29Topic: Interrupt service routinesReading Assignment: M8.8-M8.10

Lecture Number: 30Topic: M68HC11 interrupt service routinesReading Assignment: S7.9

Lecture Number: 31Topic: Introduction to memory, RAM andROMReading Assignment: M9.9-M9.4

Lecture Number: 32Topic: Memory timing diagramsReading Assignment: M9.5-M9.6

Lecture Number: 33

Lecture Number: 34

Lecture Number: 35

Lecture Number: 36; 37

Lecture Number: 38

Lecture Number: 39

Topic: M68HC11 analog-to-digital converter

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5 LABORATORY EXERCISES

MC68HC11 Introduction

References: Appendix SA

1 Using the Buffalo Monitor, assemble the following program to be at $C000. After it is inand you have checked that it is OK, run the program. (Note: Use <Ctrl-A> to get out of theASM mode.)Program Enter in ASMLDAA ':' LDAA #3AJSR OUTA JSR FFB8JSR INCHAR JSR FFCDLDAB 5 LDAB #5

LOOP JSR OUTA JSR FFB8DECB DECBBNE LOOP BNE C00ASWI SWI

<Ctrl-A>What does this program do?

2 Using elements of this program and other monitor utility routines, write, assemble anddemonstrate a program which conforms to the following design:

Input character from the keyboardAdd 1 to the characterPrint +1= Print the character to which 1 was addedEnd program

Example. If you had entered the character A, the program display should show A+1=B. Demonstrate the program to your lab instructor.

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MC68HC11 Program Debugging

References: M5.9-5.10, SA

1 Using the Buffalo Monitor, assemble the following program at $c000. After you haveentered it, trace through it one step at a time. Explain to your lab instructor what you seeon the screen. In particular, explain what is happening to the condition code register ateach step.

LDX #C000LDAB #2

LOOP LDAA 0,XINXDECBBNE LOOPSWI

2 Assemble the following program. The program is to allow you to enter a character fromthe keyboard and to print the hexadecimal code used by the computer to represent thatcharacter. For example, if you type A after starting the program the display should showA=41. It doesn't do it. Why not? Fix it so it does. Demonstrate to your lab instructor.

Operation Operand CommentJSR INCHAR Get a character from terminalTAB Save it temporarilyLDAA #3E Load ASCII code for =JSR OUTA Print =TBA Get the data backJSR OUTLHLF Print the left half byteJSR OUTRHLF Print the right half byteSWI Return to the Buffalo Monitor

3 Using elements of this program and other monitor utility routines, modify the program toprint A = $41 (including the spaces in the string). Use the OUTSTRG0 monitor routine todo this.

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Addressing and Arithmetic - I

References: S4

1 Create an AS11 assembly language program that accomplishes the following:

a) Sets up 4 data storage buffers of 12 bytes each. Use the ORG, FCB and RMBassembler directives to initialize data in the buffers as shown.

ORG $C100BUF1 FCB $FF,$FF,$01,$70,$70,$70,$7F,$80,$82,$FF,$00,$01

ORG $C110BUF2 FCB $01,$02,$01,$0D,$0E,$0F,$01,$01,$01,$FE,$FE,$FE

ORG $C120BUF3 RMB $0C

ORG $C130BUF4 RMB 12

b) Adds the bytes in BUF1 with the corresponding bytes in BUF2 and stores the resultin BUF3.

c) Takes the two's-complement of BUF3 and stores the results in BUF4.

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Hexadecimal and Binary Memory Display

References: S4

1 In a previous lab you programmed the M68HC11 to fill some data buffers and then to addand two's complement data. You are now to take that program and add to it the followingfeatures.

a) Output the bytes in BUF3 to the screen as a hex value, i.e., if memory contains01010011 00111000, the display should be 53 38 ... (note the space between thevalues).

b) Output a carriage return, line feed to the screen.c) Output the bytes in BUF4 to the screen just like in a).d) Output a carriage return, line feed.e) Output the first 5 bytes in BUF4 in the format

Hex_Value = Binary_ValueHex_Value = Binary_Value...Where Hex_Value is the hexadecimal display of the data in BUF4 andBinary_Value is a binary display. Each of the five data locations should be on aseparate line.

A typical output would look like (you do not have to print what is in parenthesis):

00 01 02 ... (This is from BUF3)00 FE FD ... (This is from BUF4)00 = 00000000 (First byte in BUF4)FE = 11111110 (etc)FD = 11111101...

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Addressing and Arithmetic - II

References: S4

1 Use the program editor to create an AS11 assembly language source file for a program thataccomplishes the following:

a) Sets up 4 data storage buffers of 12 bytes each. Use the ORG, FCB and RMBassembler directives to initialize data in the buffers as shown.

ORG $C100BUF1 FCB $FF,$FF,$01,$70,$70,$70,$7F,$80,$82,$FF,$00,$01

ORG $C110BUF2 FCB $01,$02,$01,$0D,$0E,$0F,$01,$01,$01,$FE,$FE,$FE

ORG $C120BUF3 RMB $0C

ORG $C130BUF4 RMB 12

b) Adds the bytes in BUF1 with the corresponding bytes in BUF2 and stores the resultin BUF3.

c) Takes the two's-complement of BUF3 and stores the results in BUF4.d) Outputs the bytes in BUF4 to the screen as a hex value, i.e., if memory contains

01010011 00111000, the display should be 53 38 ... (note the space between thevalues).

e) Outputs a carriage return, line feed to the screen.f) Outputs the bytes in BUF5 to the screen just like in d).A typical output would look like:00 01 02 ...FF FE FD ...

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BCD to Binary Conversion

1 Write an assembly language program to perform the following:

Prompt the user for a two digit decimal number. Accept only a sequence of valid decimaldigits. If the user enters a character other than one of the decimal digits, beep the terminal(output a BELL, $07) and erase the character from the screen by outputting a backspace(BS), space, backspace ($08, $20, $08) sequence. After two characters are entered,convert the user's input to a 2's complement binary number and output the two'scomplement code for both the number and its negative. Print appropriate prompts for bothinput and output. Examples:Input a two-digit decimal number -> 01The two's complement binary code for 01 and -01 are:

00000001 11111111

Other input and output examples:Input Output01 00000001 1111111199 01100011 1001110112 00001100 11110100# BELL BS SPACE BS (and continue waiting for two characters1t BELL BS SPACE BS (and continue waiting for one more characters

2 Extra Credit: Modify your input routine to accept the ESC (escape) character. If this isentered at any time in the input sequence, return to the Buffalo Monitor. The program is tocontinue to operate (prompting for input and printing the output) until you type ESC.

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Timing, I/O and Subroutines

Reference: S6.1-S6.5

1 The Port B output port in the HC11 is in the control register located at $1004. Thefollowing program outputs a square wave on the Port B pins. Calculate the frequency ofthe square wave.

LDX #$1000CLRA

LOOP STAA 4,XNOPNOPEORA #$FFBRA LOOP

2 Enter the program and using the oscilloscope verify that the frequency of the square wavematches your calculated value from the pre-lab. (Hint: Don't bother to edit, assemble, anddownload this short program. Use the ASM assembler in the monitor.)

3 Write a program that produces two square waves: 250 Hz on Port B, Bit 6 and 1 Khz onPort B, bit 7. You should write a delay subroutine that delays 500 microseconds each timeit is called. Use this subroutine to generate your square waves by calling it enough times togenerate the delay needed for each waveform.

4 Extra Credit: Write a sweep generator that outputs 1 cycle of a 125 Hz squarewave,followed in succession by 1 cycle each of 250 Hz, 500 Hz, and 1 KHz waves as shown inthe diagram. The output should be on PB6. Generate a scope trigger pulse on PB7 eachtime you start the 125 Hz cycle.

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Parallel Ports & More ASCII Fun

Reference: Ch. 6

1 Write an assembly language program that does the following:(a) Outputs a prompt to the screen: "Enter a character: "(b) Waits for user to enter character.(c) Outputs carriage return then another prompt: "Set switches to %XXXXXXXX"

where XXXXXXXX is the binary representation of the ASCII character typed in. (d) Monitors the status of the switches and outputs the current switch settings as the

user changes them to the port B lights (1=light on, 0=light off).(e) When the user has completed entering the binary code and presses the STRA switch

to set the STAF bit, checks to see that the binary code entered is correct. If theswitches are set correctly, output a carriage return followed by the message "OK"and then another carriage return. If the switches are not set correctly, sound a belland print an appropriate error message.

(f) Repeats this process until the user types the <Esc> character after the "Enter acharacter:" prompt. You may continue through the rest of the program (setting theswitches, etc) before returning to the Buffalo Monitor.

2 Extra Credit: Write a program to monitor the port C switches and the STAF bit. Wheneverthere is a change in the switch settings signified by the user pressing STRA switch, outputthe value to the LEDs and check to see if they represent a printable, standard ASCIIcharacter. If so, print the character on the screen. If not, print the switch setting inhexadecimal. Continue until the user enters the ASCII code for the Escape character <Esc>on the switches.

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M68HC11 Interrupts

1 You are to write a simple foreground/background program that uses the STRA interrupt.

Foreground Job: Get characters from the keyboard using the monitor INCHAR routine. Ifa space character is entered after the 70th character on a line has been received fromINCHAR, output carriage-return, line-feed to do an automatic word-wrap. If a space is nottyped between the 70th and 78th character on a line, do carriage-return, line-feed after the78th character to wrap the line. If a CTRL-X is typed by the user at anytime, exit theprogram.

Background Job: While one user is typing characters on the keyboard for the foregroundjob, another is to enter data on the switches. When the STRA switch is pressed, aninterrupt service routine is to be executed which reads the switches, outputs the switchpositions to the LED's and then sends the BELL character to the terminal. An LED is to belighted for each switch that is toward the user. Switches that are away from the user are tohave their corresponding LED extinguished. LED's are to be changed only after the STRAswitch is pressed.

Suggestions: Develop this program in two steps. To get the background job working,make the foreground job either do nothing (with a spin loop) or a just a JSR INCHAR in aloop. Then, when the background is working, add the specified foreground job. Theforeground job can be developed independently of the background job. Consider splittingthese developments between you and your lab partner.

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Timer and Interrupts

1 The task for this lab is another foreground/background interrupt driven job. Theforeground job is to accept ASCII characters from the terminal, change upper casealphabetic characters to lower case and lower case to upper case, and echo it back. (Ex: Ifthe user types ABC, the screen should show AaBbcC.) All other characters are to beunchanged and not echoed. (Ex: AaBb123,cC.) The process is to continue forever or untilthe user types an <ESC> character (whichever comes first).

2 The background job is to use the 68HC11 timer system and interrupts to beep the bell onthe terminal every 2 (±0.001) seconds. You must use a timer output compare to achievethis accuracy.

3 Extra Credit: Add another interrupt driven task to use the switches to set the rate of thebell in 10ths of seconds. E.g., if the switches are set to %00001010, the bell should soundevery 1 second. The LEDs are to display the value of the switches where a switch awayfrom the user is a 1 and toward the user is a 0.

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Frequency Counter with Interrupts

1 Write a program to measure the frequency of a square wave applied on port A pin 0 (theinput-capture 3 pin.) Your program should consist of a foreground and three interruptdriven tasks as follows:

Task 1: An interrupt is to be generated whenever a positive edge occurs on the input-capture 3 pin. In the ISR, just increment a 2-byte counter used to keep track of the numberof square-wave cycles. Then reset the input-capture flag and exit the ISR.

Task 2: Task 2 is to generate a one second time interval. At the end of each second itreads the number of cycles of the square wave that have been completed in the 1 secondperiod, and then outputs the result in the form:

Frequency is XXXX Hertz

where XXXX is a 4-digit decimal number.

Task 3: This task is to inform the foreground when the user has pressed the STRA switchthree times since the program began. This is to cause the foreground task to return to theBuffalo Monitor.

Foreground: This is to be a spin loop doing nothing except waiting for the three closuresof the STRA switch.

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Pulse-width Modulator

1 Write an assembly language program that outputs a pulsed waveform on port A bit 6(output compare 2). The frequency of the waveform should be 90 Hz. The program shouldcontinuously perform A/D conversions on port E bit 4 (which is connected to thepotentiometer on the I/O board). The current A/D reading should determine the pulsewidth of the waveform. Make each A/D bit correspond to 40 microseconds of pulse width. For example, if the A/D reading is 25 the waveform should look like this:10

When your program is working you should be able to adjust the pulse width of yourwaveform by merely adjusting the potentiometer on the I/O board.

Your program should contain a foreground task that performs A/D conversions and updatesmemory locations that will determine the high and low time periods of the waveform. Toactually generate the waveform use output compare 2 and handle the waveform specifics inyour service routine.

2 Extra credit: Modify the above program so that it pauses every 5 seconds to output amessage to the screen that says "The A/D voltage is " and then displays the A/D voltage to2 decimal places (for example 3.21 volts). Remember that the A/D result is a 1-bytequantity and that $00 corresponds to 0 volts and $ff corresponds to 4.98 volts.

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M68HC11 SCI Port Operation

1 Write a program that transfers characters between the PC and the serial SCI port. An extraterminal will be hooked up to the "host" port of your EVB. The communication parametersof your extra terminal are:

9600 baud, 8 data bits, 1 start bit, 1 stop bit

You must initialize the SCI so it matches these parameters. Also there is a peculiarity withthe EVB which you need to accommodate. In order to switch the SCI receiver to the hostport (where the extra terminal is connected) you need to write a $ff to memory location$4000 before you use the SCI.

Any characters typed on either terminal are to be echoed at the originating terminal and theother terminal.

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M68HC11 SCI Port with Interrupts

1 Write a program that accomplishes the following:

Asks the user if the program is to output Upper case (U), Lower case (L) or Toggled (T)ASCII characters. Then executes a foreground task that accepts characters from the PC anduses the serial SCI port to echo the characters to an extra terminal that will be hooked up tothe "host" port of your EVB. The communication parameters of your extra terminal are:

9600 baud, 8 data bits, 1 start bit, 1 stop bit

You must initialize the SCI so it matches these parameters. Also there is a peculiarity withthe EVB which you need to accommodate. In order to switch the SCI receiver to the hostport (where the extra terminal is connected) you need to write a $ff to memory location$4000 before you use the SCI.

When you echo characters, conform to the following scheme:

If the user selected Upper case mode, all your characters should be converted toupper case. If the user selected Lower case mode all your characters should beconverted to lower case. If the user selected Toggled mode you should convertupper case to lower case and lower case to upper case.

Your program should also have a background task driven by the SCI interrupt that acceptscharacters from your extra terminal and echoes them to your PC terminal, following thesame rules for Upper, Lower and Toggled Mode.

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EEPROM Programming and ROM Resident Code

There are two programs to be written for this laboratory:

1 The first program is to be an input/output routine that accepts characters from the keyboarduntil the user types STOP. At this point the program is to return to the Buffalo Monitor.

2 The second program is to load the first program into the 68HC11 EEPROM so it residesthere permanently even if the power is turned off. Thus it should take the bytes of the firstprogram (which should be downloaded to EVB RAM somewhere) and write these bytessequentially into the EEPROM, which starts at address $B600 in the 68HC11. You willhave to know and obey all the rules for programming EEPROM locations to do this. Youwill also have to make your first program completely relocatable so that it executes whenyou transfer it down to $B600. To test your program we will turn the power off and backon and then execute starting at $B600.

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Test Your Reaction Time

1 Write a program that measures human reaction time in the following manner.

a) Outputs a prompt: "Turn off port C switch 0".b) Waits until port C bit 0 is a 0, then resets port B bit 0 (turns off PB0 LED).c) Delays 3 seconds.d) Turns on port B bit 0 LED.e) Measures the time delay in milliseconds between the turning on of the LED and the

flipping of the port C bit 0 switch. Don't worry about measuring anything longerthan 1 second.

f) If the switch was flipped before the LED was turned on output the message "YouCHEATED!" to the screen. Otherwise output "Your reaction time was " followedby the time delay in milliseconds. Then loops back to a.

2 Extra credit: Modify the above program to average a sequence of 10 trials to determine thereaction time.

5 SOLUTIONS TO CHAPTER PROBLEMS

SOLUTIONS TO CHAPTER 2 PROBLEMS

2-1 Define the direction of data flow for each bit in each of the five I/O ports (Port A - Port E).Port A: PA7: bidirectional; PA6 - PA3: output; PA2 -PA1: inputPort B: PB7 - PB0: outputPort C: PC7 - PC0: bidirectionalPort D: PD5 - PD0: bidirectionalPort E: PE7 - PE0: input

2-2 Which of the M68HC11 ports is used for the A/D converter inputs? Port E2-3 Which of the M68HC11 ports is an 8-bit, bidirectional port? Port C2-4 Which of the M68HC11 ports is used with serial I/O? Port D2-5 Which of the M68HC11 ports is an 8-bit, output-only port? Port B

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2-6 Draw the programmer's model for the M68HC11.

+))))))))))))))0)))))))))))))),*7 A 0*7 B 0 *.))))))))))))))2))))))))))))))-

or+))))))))))))))))))))))))))))),*15 D 0 *.)))))))))))))))))))))))))))))-+))))))))))))))))))))))))))))),*15 X 0 *.)))))))))))))))))))))))))))))-+))))))))))))))))))))))))))))),*15 Y 0 *.)))))))))))))))))))))))))))))-+))))))))))))))))))))))))))))),*15 S 0 *.)))))))))))))))))))))))))))))-

2-7 Which bits in the M68HC11 condition code register may be tested with conditionalbranching instructions? The negative, zero, two's-complement overflow and carry bits maybe tested by conditional branch instructions.

2-8 What are the addresses of the registers used for Port A data, Port B data, and Port C data?Port A data = $1000, Port B data = $1004, Port C data = $1003

2-9 Calculate the effective address for each of the following examples of indexed addressing.0.1 IX = $C100

LDAA 0,X EA = $C1000.2 IY = $C100

STAA $10,Y EA = $C1100.3 IX = $C10D

LDAA $25,X EA = $C132

2-10 Describe the following M68HC11 addressing modes:Immediate, Direct, Extended, Indexed, Inherent, Relative

Immediate: The data for the instruction immediately follows the op code. Immediateaddressing is used for constants known at the time the program is assembled.

Direct: Direct addressing uses an 8-bit address to directly access a locationin the first 256 bytes of memory.

Extended: Extended addressing uses a 16-bit address to access a memorylocation anywhere in the 64 Kbyte address space.

Indexed: Indexed addressing generates the effective address by adding a 8-bit,straight-binary offset (specified by the instruction) to the contents ofthe IX or IY registers. A 16-bit address is the result.

Inherent: Inherent addressing means the instruction itself specifies where theoperand is located.

Relative: Relative addressing is used for branch instructions. An 8-bit, two's-

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complement offset specified by the instruction is added to the contentsof the program counter.

2-11 Discuss the relative advantages and disadvantages of Direct and Extended addressing.Direct addressing uses only 8 bits to specify the address of the memory data and thusis faster and uses less memory than extended addressing. Its disadvantage is that only256 memory locations can be addressed. Extended addressing requires 3 bytes for theinstruction and address and thus takes longer to execute and requires more memory.Extended addressing can access the whole 64 Kbyte address space.

2-12 Discuss the relative advantages and disadvantages of Extended and Indexed addressing.Indexed addressing is a two byte instruction (for the X register, three bytes for the Yregister). Thus it is faster and uses less memory than extended addressing. Its majoradvantage is that the address of the data can be determined at run-time and the indexregister can be incremented and decremented to step through tables of data.

2-13 What is in the following CPU registers after a system reset?A, B, CCR, Stack Pointer

A, B = unknown. In the CCR, the I, X and S bits are set and the rest of the bits areunknown. The stack pointer is unknown.

2-14 Discuss how the CPU fetches the first operation code of the first instruction to be executedfollowing a system reset.

After the system reset, the CPU fetches the address of the first op code to be executedfrom $FFFE:$FFFF.


3-1 Give four ways to specify each of the following constants.

a. The ASCII character X.'X, $58, 88, %01011000, @230

b. The ASCII character x.'x, $78, 120, %01111000, @270

c. 10010

100, $64, %01100100, @144d. 6416

100, $64, %01100100, @1443-2 You be the assembler. Assemble the following source code just as the AS11 assembler

would do it.

[0001] * PRBS3-1.ASM[0002] [0003] [0007] [ ] [ ] COUNT EQU 7[0004] [000a] [ ] [ ] MAX EQU 10[0005] [e000] [ ] [ ] ROM EQU $e000[0006] [0000] [ ] [ ] RAM EQU $0000[0007] [e000] [ ] [ ] ORG ROM[0008] [e000] [86] [07] ldaa #COUNT[0009] [e002] [8b] [0a] adda #MAX[0010] [e004] [97] [00] staa DATA[0011] [e006] [3f] [ ] swi[0012] [0000] [ ] [ ] ORG RAM

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[0013] [0000] [ ] [ ] DATA RMB 1

3-3 In the program above, what addressing mode is used for the ldaa instruction? Immediate

3-4 In the program above, what addressing mode is used for the staa instruction? Direct

3-5 What is memory location $0000 before the program runs?Unknown. The RMB reserves a memory byte. It does not initialize it.

3-6 Give the symbol used when specifying a constant in the following bases: hexadecimal -$, decimal - none, binary - %, ASCII - '

3-7 What assembler directive is used to allocate memory for data variables? RMB3-8 What assembler directive is used to define strings of ASCII characters? FCC3-9 What assembler directive is used to define byte constants in ROM memory? FCB3-10 What assembler directive is used to set the assembler's location counter? ORG3-11 What assembler directive is used to enable cycle counting in the listing? OPT c3-12 How are data storage areas located when using the AS11 assembler?

By using ORG directives 3-13 Your hardware designer tells you that the microcontroller will have ROM located at

addresses $E000 to $FFFF and RAM at $C000 to $CFFF. Show how to inform theassembler so that it locates its code and data areas properly.

ORG $E000The program and constant definitions follow this.

ORG $C000The variable data allocations follow this.

3-14 Give the addressing mode and the effective address for each of the following instructions:

Mode Effective Addressa. LDAA #5 Immediate The contents of the program counter after the

op code has been fetchedb. LDAA $5 Direct $0005c. LDAA $5,X Indexed The contents of the X register plus 5d. STAA $C01A Extended $C01A


4-1 For each of the following questions, assume the memory display of the M68HC11 shows:

C100 B0 53 05 2B 36 89 00 FF FE 80 91 3E 77 AB 8F 7F

Give the results after each of the following instructions are executed.a. LDAA $C100 A = $B0, NZVC = 100-b. Assume IX = $C100

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LDAA 0,X A = $B0, NZVC = 100-c. Assume IX = $C100

LDAA 6,X A = $00, NZVC = 010-4-2 Use the contents of memory shown in problem S4-1 and give the results of the following

instructions.

a. LDX $C100 X = $B053b. LDY $C102 Y = $052Bc. LDX $C103

PSHXPULD X = $2B36, A = $2B, B = $36

d. LDD $C100LDX $C102XGDX D = $052B, X = $B053

e. Assume IX = $C100LDD $0A,X D = $913E

4-3 Use the contents of memory shown in problem S4-1 and give the results of the followinginstructions.

a. SP = $C105PULA A = $00, SP = $C106

b. SP = $C105PULA A = $00PULB B = $FF

c. SP = $C105PSHAPSHB SP = $C103

d. SP = $C10APULAPSHB A = $3E, SP = $C10A

4-4 Why do store instructions not use the immediate addressing mode?The data for an immediate instruction immediately follows the op code and programsare usually stored in ROM. Therefore, one can't store data in ROM at run-time.


a. Assume IX = $C100BSET 0,X $0F ($C100) = $BF

b. Assume IX = $C100BSET 6,X $AA EA = $c106, (EA) = $AA

c. Assume IX = $C107BCLR 0,X $AA ($C107) = $55

d. Assume IY = $C100BCLR 0,Y $FF ($C100) = $00

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4-6 Assume A = $C9 and the NZVC bits are 0001. Give the result in A and the NZVC bits foreach of the following instructions.

a. LSLA A = $92, NZVC = 1001b. LSRA A = $64, NZVC = 0001c. ASLA A = $92, NZVC = 1001d. ASRA A = $E4, NZVC = 1001e. ROLA A = $93, NZVC = 1001f. RORA A = $E4, NZVC = 1001

4-7 The ASLx instructions have the same operation codes as the LSLx instructions. Why?Both shift a 0 into the least significant bit and shift the most significant bit into thecarry bit.


a. LDAA $C103LDAB $C104ABA A = $61, B = $36, NZVC = 0000

b. LDX $C100LDAB $C107ABX X = $B152, NZVC = ----

c. LDAB $C109ADDB $C10A B = $11, NZVC = 0011

d. Assume IX = $C100LDAA 9,XADDA $0A,X A = $11, NZVC = 0011

e. Assume IX = $C100LDAA 9,XSUBA $0A,X A = $EF, NZVC = 1001

f. LDAA $C100LDAB $C101ABAADCA $C102 A = $09, NZVC = 0000


a. LDAA $C106NEGA A = $00, NZVC = 0100

b. LDAA $C107NEGA A = $01, NZVC = 0000

c. NEG $C109 ($C109) = $80, NZVC = 1010d. LDAA $C106

COMA A = $FF, NZVC = 1001e. LDAA $C107

COMA A = $00, NZVC = 0101f. COM $C109 ($C109) = $7F, NZVC = 0001

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4-10 After an addition, the carry bit in a status register indicates that a 2's complement overflowhas occurred - false.

4-11 The following straight binary addition was done in the M68HC11. What is the binaryresult and what are the N, Z, V, and C flags?

010101110110011010111101 N=1, Z=0, V=1, C=0

4-12 Assume the following M68HC11 code is executed in sequence. Give the hexadecimalresult in each of the indicated registers after each instruction is executed.

A B C N Z Vldaa #$4A 4A__ xxxx 1 0 0 -ldab #$D3 xxxx D3__ 1 0 0 -

aba 1D__ D3__ 1 0 0 0

adca #$70 8E__ D3__ 0 1 0 1 4-13 Use the contents of memory shown in problem S4-1 and give the results of the following

instructions.LDAA $C102ADDA $C104 A = $3BDAA A = $41


1 LDAA $C102ORAA $C103 A = $2F, NZVC = 000-

a. LDAA $C102EORA $C103 A = $2E, NZVC = 000-

b. LDAA $C10DANDA $C10E A = $8B, NZVC = 100-

c. LDAB $C102COMB A = $FA, NZVC = 100-


a. LDAA $C100CMP $C101 A = $B0, NZVC = 1010

b. TST $C106 NZVC = 0100c. TST $C107 NZVC = 1000

4-16 Assume the ACCA = $00 and memory location DATA = $B0. A CMPA DATA instructionis executed followed by a conditional branch. For each of the conditional branchinstructions in the table, indicate by yes or no if you expect the branch to be taken.BGE BLE BGT BLT BEQ BNEyes no yes no no yesBHS BLS BHI BLOno yes no yes

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4-17 Assume the ACCA = $05 and memory location DATA = $22. A CMPA DATA instructionis executed followed by a conditional branch. For each of the conditional branchinstructions in the table, indicate by yes or no if you expect the branch to be taken.BGE BLE BGT BLT BEQ BNEno yes no yes no yesBHS BLS BHI BLOno yes no yes

4-18 Assume the ACCA = $56 and memory location DATA = $22. A CMPA DATA instructionis executed followed by a conditional branch. For each of the conditional branchinstructions in the table, indicate by yes or no if you expect the branch to be taken.BGE BLE BGT BLT BEQ BNEyes no yes no no yesBHS BLS BHI BLOyes no yes no

4-19 Assume the ACCA = $22 and memory location DATA = $22. A CMPA DATA instructionis executed followed by a conditional branch. For each of the conditional branchinstructions in the table, indicate by yes or no if you expect the branch to be taken.BGE BLE BGT BLT BEQ BNEyes yes no no yes noBHS BLS BHI BLOyes yes no no

4-20 Briefly describe what each of the following instructions do. These are separateinstructions, not a program.

COMA 1'S complement the A registerCBA compare A to B = (A)-(B) and set flagsCMPB 10,X compare B to a memory (B)-(M) where the address of memory is 10

plus the contents of the X registerTSTB test the B register for zero; modifies the N and Z flagsBRN Branch if result negativeSWI Software interrupt. Used as a breakpoint in the EVB monitorBITA $80 Tests if the A register is $80; modifies N and Z and resets VBCC LOOP Branch carry clear to LOOP; take the branch is C=0, otherwise

continue with the next instructionXGDX Exchange the D register with XLSR $C100 Logical shift right the contents of memory location $C100NEGB Two's-complement the B register

4-21 Example 4.26 shows a comparison of the time it takes to do a multiply using the arithmeticshift versus using the MUL instruction. What advantage does using the MUL instructiongive you?

The MUL instruction can multiply any two 8-bit numbers, not just powers of 2. Itgives a full 16-bit result and sets the flags if overflow occurs.

4-22 Example 4.25 shows how to use shift instructions to multiply by 10. Write an equivalentsection of code using the MUL instruction and compare the time taken for the two.

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4-23 Without using IDIV of FDIV, write a segment of M68HC11 code to divide the 16-bit, 2'scomplement integer number in the D accumulator by 10. Assume the quotient is to remainin D and the remainder is ignored.

4-24 Assume two 8-bit, two's-complement, integer numbers are in the A and B accumulators.Write a segment of M68HC11 code to multiply them.

Assembler release TER_2.0 version 2.09(c) Motorola (free ware)0001 * Code segment to multiply 2, 8-bit, signed0002 * integers in the A and B accumulators0003 *0004 * Algorithm:0005 * - x - = +0006 * - x + = -0007 * + x - = -0008 * + x + = +0009 c000 ORG $c0000010 * Initialize some test data0011 c000 86 ff ldaa #$ff0012 c002 c6 ff ldab #$ff0013 * IF A is minus0014 c004 4d tsta 0015 c005 2a 0c bpl a_is_plus0016 * THEN 0017 * IF B is minus0018 c007 5d tstb0019 c008 2a 05 bpl a_neg_b_plus0020 * THEN A and B are minus 0021 c00a 50 negb 2's compl B0022 c00b 40 nega 2's compl A0023 c00c 3d mul0024 * Sign of result is plus0025 c00d 20 13 bra end0026 * ELSE A is minus, B is plus0027 a_neg_b_plus0028 c00f 40 nega 2's compl A0029 c010 3d mul0030 * Sign of result is minus0031 c011 20 0a bra make_minus0032 * ENDIF B is minus0033 * ELSE A is plus0034 a_is_plus0035 * IF B is minus0036 c013 5d tstb0037 c014 2a 04 bpl a_plus_b_plus0038 * THEN A is plus, B is minus0039 c016 50 negb 2's compl B0040 c017 3d mul0041 * Sign of result is minus0042 c018 20 03 bra make_minus0043 * ELSE A is plus, B is plus0044 a_plus_b_plus0045 c01a 3d mul0046 c01b 20 05 bra end0047 * ENDIF B is minus0048 * ENDIF A is minus0049 make_minus 0050 * 2's complement the 16 bit number in D0051 c01d 43 coma 1's compl A

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0052 c01e 53 comb 1's compl B0053 c01f c3 00 01 ADDD #10054 * Done0055 end0056 c022 3f swi0057 Program + Init Data = 35 bytesError count = 0


6-1 For each of the logic statements, give the appropriate M68HC11 code to set the conditioncode register and to branch to the ELSE part of an IF-THEN-ELSE. Assume P and Q are8-bit, unsigned numbers in memory locations P and Q.

a. IF P >= Q* IF P >= Q

ldaa Pcmpa Qblo ELSE_PART

b. IF Q > P* IF Q > P

ldaa Qcmpa Pbls ELSE_PART

c. IF P = Q* IF P = Q

ldaa Pcmpa Qbne ELSE_PART

6-2 For each of the logic statements, give the appropriate M68HC11 code to set the conditioncode register and to branch to the ELSE part of an IF-THEN-ELSE. Assume P and Q are8-bit, signed numbers in memory locations P and Q.

a. IF P >= Q* IF P >= Q

ldaa Pcmpa Qblt ELSE_PART

b. IF Q > P* IF Q > P

ldaa Qcmpa Pble ELSE_PART

c. IF P = Q

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* IF P = Qldaa Pcmpa Qbne ELSE_PART

6-3 For each of the logic statements, give the appropriate M68HC11 code to set the conditioncode register and to branch to the ELSE part of an IF-THEN-ELSE.

Assume P, Q and R are 8-bit, signed numbers in memory locations P, Q and R.a. * IF P + Q >= 1

ldaa Padda Qcmpa #1blt ELSE_PART

b. * IF Q > P - Rldaa Qadda Rcmpa P Q + R > P?ble ELSE_PART

c. * IF (P > R ) OR (Q < R) ldaa Pcmpa Rbgt THEN_PARTldaa Qcmpa Rbge ELSE_PART

d. * IF (P > R) AND (Q < R)ldaa Pcmpa Rble ELSE_PARTldaa Qcmpa Rbge ELSE_PART

6-4 Write M68HC11 assembly language code for the following pseudocode design assumingK1, K2, and K3 are 8-bit, signed or unsigned, numbers in memory locations K1, K2, andK3. Assume memory has been allocated for these data.

Line Addr Code Label Opcode Operand Comment0001 * WHILE K1 does not equal $0d0002 while_start0003 0000 b6 00 1c ldaa K10004 0003 91 0d cmpa $0d0005 0005 27 15 beq end_while0006 * DO0007 * IF K2 = K30008 0007 b6 00 1d ldaa K20009 000a b1 00 1e cmpa K30010 000d 26 08 bne else_part

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0011 * THEN0012 * K1 = K1 + 10013 000f 7c 00 1c inc K10014 * K2 = K2 - 10015 0012 7a 00 1d dec K20016 0015 20 03 bra end_if0017 * ELSE0018 else_part0019 * K1 = K1 -10020 0017 7a 00 1c dec K10021 * ENDIF K2 = K30022 end_if0023 * ENDO0024 * ENDOWHILE0025 001a 20 e4 bra while_start0026 end_while0027 0028 * Data variables0029 001c K1 RMB 10030 001d K2 RMB 10031 001e K3 RMB 1

6-5 Write a section of HC11 code to implement the design given below where K1, K2 and K3are unsigned 8-bit numbers in memory locations K1, K2, and K3.

Line Addr Code Label Opcode Operand Comment0001 * IF K1 < K20002 0000 b6 00 12 ldaa K10003 0003 b1 00 13 cmpa K20004 0006 24 05 bhs Else_Part0005 * THEN K2=K10006 0008 b7 00 12 staa K10007 000b 20 05 bra Endif0008 * ELSE K1=640009 Else_Part0010 000d 86 40 ldaa #640011 000f b7 00 12 staa K10012 Endif0013 * ENDIF K1 < K20014 0012 K1 RMB 10015 0013 K2 RMB 10016 0014 K3 RMB 1

6-6 Write a section of HC11 code to implement the design given below where K1, K2 and K3are signed 8-bit integer numbers stored at memory locations K1, K2 and K3.

Line Addr Code Label Opcode Operand Comment

0002 * WHILE K1 < K20003 While_Start 0004 c000 b6 c0 23 ldaa K10005 c003 b1 c0 24 cmpa K20006 c006 2c 1b bge End_While0007 * DO0008 * IF K3 > K20009 c008 b6 c0 25 ldaa K30010 c00b b1 c0 24 cmpa K20011 c00e 2f 08 ble Else_Part0012 * THEN K2 = K10013 c010 b6 c0 23 ldaa K10014 c013 b7 c0 24 staa K2

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0015 c016 20 06 bra End_If0016 * ELSE K2 = K30017 Else_Part0018 c018 b6 c0 25 ldaa K30019 c01b b7 c0 24 staa K20020 End_If0021 * ENDIF K3 > K20022 * K1 = K1 + 10023 c01e 7c c0 23 inc K10024 * ENDO0025 c021 20 dd bra While_Start0026 0027 End_While0028 * ENDWHILE K1 < K20029 * Data allocation0030 c023 K1 RMB 10031 c024 K2 RMB 10032 c025 K3 RMB 1

6-7 For problem 6-6, assume K1=1, K2=3 and K3=-2. How many times should the code passthrough the loop and what are the final values of K1, K2 and K3?

One pass through the loop; final values are K1=2, K2=-2, and K3=-2;

6-8 Write structured HC11 code for the following design:

* IF A = Bldd Acpd Bbne else_part

* THEN* WHILE C < Dwhile_start

ldd Ccpd Dbhs end_while

* DO* Decrement D

ldx ddexstx D

* A = 2 * Aldd Aaddd A Double itstd A

* ENDO* ENDWHILE C < D

bra while_startend_while

bra end_if* ELSEelse_part

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* A = 2 * Bldd Baddd Bstd A

* ENDIF A = Bend_if

Assume that A, B, C, and D are 16-bit unsigned-binary numbers and that memory has beenallocated in the program by the following code:A RMB 2B RMB 2C RMB 2Assume A, B, C and D are initialized to some value in some other part of the program.

6-9 For problem 6-8, assume A=2, B=2, C=3, and D=6. What final values do you expect afterthe code has been executed? A=16, B=2, C=3, D=3.

6-10 For the program in Example 6.5, how does the assembler evaluate the expression DATA2-DATA1. What is it's value. Why does one use an expression here instead of just puttingin a defined (equated) constant value?

DATA2-DATA1 = 4. You use an expression to let the assembler calculate the sizeof the buffer. That way, if the number of bytes in DATA1 changes, the programautomatically changes when it is reassembled.

6-11 For the program in Example 6.5, what is printed on the screen when the program isexecuted?

STAa carriage-return, line-feed.

6-12 Why are JSR instructions used to branch to the Buffalo Monitor subroutines rather thanBSR instructions?

BSR instructions are relative addressing and the monitor subroutines are more than127 bytes away. So a JSR instruction which uses extended addressing must be used.

6-13 For the program in Example 6.6, how many bytes are reserved for "data" in the RAM.How many bytes of stack are used by the program?

NUMCHR+3 = 6. The program uses two bytes of the stack each time it jumps to amonitor subroutine. We do not know how much stack these routines may use.

6-14 How does the Buffalo Monitor know when to stop printing characters in the OUTSTRGroutines?

An EOT character ($04) signifies the end of the string to be printed.

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6-15 Write a routine using the OUTA monitor subroutine to output characters to the terminal.Assume the register X points to the start of the string to be output and the string isterminated by the ASCII EOT character.

6-16 Write a routine which outputs the character in ACCA. The routine is to check forunprintable ASCII characters (codes $00-$1F, $7F-$FF). If one of these characters occurs,print the "#" character.

6-17 A 16-bit number is in sequential memory positions DATA1 and DATA1+1 with the mostsignificant byte in DATA1. Write an HC11 code segment to store the negative of this 16-bit number in DATA2 and DATA2+1.

6-18 Assume two 8-bit, two's-complement, integer numbers are in the A and B accumulators.Write a segment of M68HC11 code to multiply them.

Assembler release TER_2.0 version 2.09(c) Motorola (free ware)0001 * Code segment to multiply 2, 8-bit, signed0002 * integers in the A and B accumulators0003 *0004 * Algorithm:0005 * - x - = +0006 * - x + = -0007 * + x - = -0008 * + x + = +0009 c000 ORG $c0000010 * Initialize some test data0011 c000 86 ff ldaa #$ff0012 c002 c6 ff ldab #$ff0013 * IF A is minus0014 c004 4d tsta 0015 c005 2a 0c bpl a_is_plus0016 * THEN 0017 * IF B is minus0018 c007 5d tstb0019 c008 2a 05 bpl a_neg_b_plus0020 * THEN A and B are minus 0021 c00a 50 negb 2's compl B0022 c00b 40 nega 2's compl A0023 c00c 3d mul0024 * Sign of result is plus0025 c00d 20 13 bra end0026 * ELSE A is minus, B is plus0027 a_neg_b_plus0028 c00f 40 nega 2's compl A0029 c010 3d mul0030 * Sign of result is minus0031 c011 20 0a bra make_minus0032 * ENDIF B is minus0033 * ELSE A is plus0034 a_is_plus0035 * IF B is minus0036 c013 5d tstb0037 c014 2a 04 bpl a_plus_b_plus0038 * THEN A is plus, B is minus0039 c016 50 negb 2's compl B0040 c017 3d mul

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0041 * Sign of result is minus0042 c018 20 03 bra make_minus0043 * ELSE A is plus, B is plus0044 a_plus_b_plus0045 c01a 3d mul0046 c01b 20 05 bra end0047 * ENDIF B is minus0048 * ENDIF A is minus0049 make_minus 0050 * 2's complement the 16 bit number in D0051 c01d 43 coma 1's compl A0052 c01e 53 comb 1's compl B0053 c01f c3 00 01 ADDD #10054 * Done0055 end0056 c022 3f swi0057 Program + Init Data = 35 bytesError count = 0


7-1 What levels must be on the MODA and MODB pins at &&R&E&S&ET to place the M68HC11 intoexpanded-mode? MODA = MODB = high. Into single-chip mode? MODA = low, MODB= high

7-2 List the number of bits available and their direction (input, output or bidirectional) for thefive I/O ports A - E.

Port A - 8 bits, 3 input, 4 output, 1 bidirectionalPort B - 8 bits, output onlyPort C - 8 bits, bidirectionalPort D - 6 bits, bidirectionalPort E - 8 bits, input only

7-3 Give the data register addresses for Port A, B, C, PORTCL, D, and E.PORTA = $1000, PORTB = $1004, PORTC = $1003, PORTCL = $1005, PORTD =$1008, PORTE = $100A

7-4 What does the MC68HC24 Port Replacement Unit do and when would you use one in asystem?

The PRU replaces Port B and Port C that are used in expanded-mode for the addressand data buses. The PRU is used in expanded-mode systems that require these twoports for I/O.

7-5 How do you control the direction of the bidirectional bit-7 in PORTA?By programming bit-7 in PACTL. A zero selects input and a one output.

7-6 How should bit-6 in PACTL be set to use PORTA as an I/O port? It should be reset to zero.

7-7 How do you control the direction of the bidirectional bits in PORTC?By programming the data direction control bits in DDRC.

7-8 When is the STAF bit set?

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On the either the rising or falling edge of the STRA signal. The edge chosen isselected by the EDGA bit in PIOC.

7-9 What sequence of steps must be taken to reset the STAF bit?When data are being input, first the PIOC register must be read and then PORTCL.When data are being output in full handshaking mode, the PIOC is read and data areoutput to PORTCL to reset STAF.

7-10 Write a small section of code to reset the STAF bit.ldaa $1002 Read the PIOCldaa $1005 Read the PORTC

7-11 When are data latched into PORTCL?On the either the rising or falling edge of the STRA signal. The edge chosen isselected by the EDGA bit in PIOC.

7-12 Write a small section of code to chose a rising edge to be active for STRA.ldx #$1000 Initialize X to registersbset 2,x %00000010 Set EGA bit in PIOC

7-13 Write a small section of code to initialize the M68HC11 for simple strobed input andoutput I/O.

ldx #$1000 Initialize X to registersbclr 2,x %00010000 Clear HNDS bit in PIOC

7-14 Write a small section of code to initialize the M68HC11 for full handshaking input, STRBactive high and interlocked mode, and EGA rising active edge.

ldx #$1000 Initialize X to registersbset 2,x %00010011 Set HNDS, EGA, and INVBbclr 2,x %00001100 Clear OIN and PLS

7-15 Give the name of the bit, the name of the register that it is in, the register's address, whichbit, and the default or reset state of the bit for each of the following:a. What bit controls the direction of Port A, bit-7?

DDRA7 in PACTL at $1026, bit-7, default direction is input.b. What bit controls the active edge of Strobe A?

EGA in PIOC at $1002, bit-1, default is falling edge.c. Where is the Strobe A Flag?

STAF in PIOC at $1002, bit-7, default is reset.d. What bit controls the wire-OR mode of Port C?

CWOM in PIOC at $1002, bit-5, normal, now wire-OR mode is the defaulte. What bit allows a programmer to do polled input?

STAF in PIOC at $1002, bit-7, default is reset7-16 Give the name of the bit, the name of the register that it is in, the register's address, which

bit, and the default or reset state of the bit for each of the following:

a. What bit controls the direction of Port C, bit 1?DDC1 in DDRC at $1007, bit-1, default is input.

b. What bit must be reset to allow Port D to operate as an I/O port?SPE in SPCR at $1028, bit-6, the SPI system is disabled on reset.

c. What bit is used to enable full handshaking I/O mode?HNDS in the PIOC at $1002, bit-2, the default is simple strobe mode I/O.

d. What bit choses pulsed or interlocked handshaking for STRB?PLS in PIOC at $1002, bit-2, the default is level or interlocked handshaking.

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e. What bit selects the polarity of STRB?INVB in PIOC at $1002, bit-1, default is active low.

7-17 Draw the basic write and read cycle timing for external I/O for the 68HC11.7-18 Write a subroutine to use the integrating method for software debouncing a switch

connected to Port A, bit-0. Return the carry flag set if the switch is closed, otherwisereturn the carry flag reset.

7-19 The STRA (Strobe A) input is edge sensitive and sets the STAF bit when the active edgeis detected. Discuss using a push button switch to strobe data into PORTCL in terms ofswitch bounce problems.

7-20 Design an output circuit with 8 LEDs connected to Port B. The LEDs are to be on whenbits in a byte stored in location DATA1 are 1's. Show the hardware and software required.

7-21 Modify the design of problem 7-20 to use full output handshaking mode. A debounced pushbutton switch (momentarily closed) is to be added to control when new data are written tothe LEDs. Write software that outputs $00 to $FF, incrementing by one each time the pushbutton switch is closed.

7-22 Design an input circuit to input the contents of eight switches to the M68HC11. Assume aninth switch (debounced push button, momentarily closed) is to be used to strobe the datainto the M68HC11.

7-23 Modify the design of problem 7-22 to make use of full input handshake mode. Your designshould not allow the push button switch to be activated until the M68HC11 is ready toaccept new data. Show the hardware and software.


8-1 When the I bit in the condition code register is set to 1, interrupts are disabled.8-2 Interrupts are masked when you get to the interrupt service routine - true.8-3 In the M68HC11 interrupt service routine, you MUST unmask interrupts with the CLI

instruction before returning - false.8-4 How are interrupts unmasked if the CLI instruction is not used in the interrupt service

routine?When the condition code register is pulled from the stack by the RTI instruction, the I bitis cleared.

8-5 How many bytes are pushed onto the stack when the M68HC11 processes an interruptrequest? 10

8-6 Which instruction is used to globally unmask interrupts? CLI - Clear Interrupt Mask8-7 Which instruction is used to globally mask interrupts? SEI - Set Interrupt Mask8-8 What address does the M68HC11 use to find the address of your interrupt service routine

for a timer overflow? $FFDE:FFDF

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8-9 Assume a dedicated application system (no Buffalo Monitor) with ROM at $E000-$FFFFand RAM at $000 - $00FF. Show how to initialize the interrupt vectors for the &&I&RQ andTimer Output Compare 1 interrupts. Assume IRQISR and TOC1ISR are labels on therespective interrupt service routines.TOC1VEC EQU $FFE8IRQVEC EQU $FFF2

ORG TOC1VECFDB TOC1ISRORG IRQVECFDB IRQISR

8-10 Repeat problem 8-9 but assume your code is to be run on a system with a Buffalo Monitor.Show the code that is necessary to vector the M68HC11 to the correct interrupt serviceroutines.TOC1JMP EQU $00DFIRQJMP EQU $00EE

ORG TOC1JMPjmp TOC1ISRORG IRQJMPjmp IRQISR

8-11 For the interrupt service routine in Example 8.11, where would you put a breakpoint to findout if you are getting to the interrupt service routine. Either $00EE or $C025.

8-12 Assume you have written a program similar to Example 8.11 where the bell is to beepwhenever you assert STRA. When you run the program, instead of beeping once, the bellbeeps continuously, much to the annoyance of your lab partners and supervisor. What hasgone wrong?

The programmer has not reset the STAF bit properly.8-13 Write a complete M68HC11 program in AS11 assembler language for an interrupt

occurring on the external IRQ source. The interrupt vector is to be at $FFF2:FFF3. Whenthe interrupt occurs the ISR is to increment an 8-bit memory location "COUNT" startingfrom $00. The foreground job is to be a spin loop "SPIN BRA SPIN". Assume:1. The Buffalo monitor is not installed.2. Code is to be located in ROM at $E000.3. RAM is available between $0000 and $00FF

* System equatesSTACK EQU $00ffCODE EQU $e000IVECT EQU $fff2* Allocate memoryCount RMB 1* Program

ORG CODElds #STACK Initialize the stack pointer

* Initialize the memory counter = 0clr countcli Unmask interrupts

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* Foreground job is a simple spin loopspin bra spin* Interrupt service routineisr inc count No overflow error detection

rti* Initialize the vector

ORG IVECTFDB isr

8-14 What is the priority order of interrupts in the M68HC11.See the list of interrupt vector assignments in Table 8.5.

8-15 How can the priority order of interrupts be changed?The HPRIO register ($103C) contains four bits which can allow one of sixteen interruptsources to be promoted to the top of the hierarchical order. The priority can only bechanged when the interrupts are masked (I-bit = 1).

8-16 The Timer Input Capture 3 interrupt and the Real Time Interrupt happen to occursimultaneously. Which is serviced first? The Real Time Interrupt is service first unlessthe Timer Input Capture 3 has been promoted to the highest position by reprogramming theHPRIO register.

8-17 What is the SWI instruction and what does it do?SWI is a software interrupt instruction. It is a single byte and CPU treats it as if aninterrupt has occurred. All registers are placed on the stack and the processor fetches avector from $FFF6:FFF7.

8-18 What instructions can be used to save power when waiting for an interrupt to occur? WAIand STOP.

8-19 Define interrupt latency.Interrupt latency is the time delay between the interrupt request and when the interruptservice routine is entered.

8-20 What are the components of interrupt latency?Interrupt latency is comprised of the following:1) The time to complete executing the current instruction. 2) The time to push the registers onto the stack.3) The time to fetch the vector and transfer to the interrupt service routine.In addition, if the processor is in an ISR with interrupts masked, the latency is increasedby the time required to complete the ISR and unmask the interrupts.


9-1 Upon reset, the RAM in the M68HC11 is mapped to $0000 and the 64 byte register blockto $1000. The locations of these can be changed. Describe how this is done.

The INIT register, at location $103D, contains bits RAM3-RAM0, and REG3-REG0that map the starting location of the RAM and register block on 4K byte boundaries.The user can program these bits.

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9-2 What register is used to remap the data RAM and control registers?The INIT register at $103D.

9-3 What is the memory location of EEPROM in those M68HC11s that have it?$B600 - $BFFF

9-4 What are the three methods that can erase EEPROM?Byte erase, row erase, bulk erase.

9-5 Write three small subroutines to allow programming and erasing the M68HC11 EEPROM.The routines are to be as follows:

PROG: Program a location. On entry the location is in the X register and thedata in the A register.

BULK: Bulk erase the entire EEPROM.BYTERASE: Erase one byte. On entry, the location to be erased in is the X

register.

EEPGM EQU %00000001 EEPGM bitEELAT EQU %00000010 EEPROM latch bitERASE EQU %00000100 Erase bitBYTE EQU %00010000 Byte erase modePPROG EQU $103B PPROG registerEEPROM EQU $B600 EEPROM start adr* Program a byte* Entry: A = data, X = locationPROG pshb Save B register

ldab #EEPROMstab PPROG Set the EEPROM latch bitstaa 0,x Write data to the EEPROMldab #EEPROM|EEPGMstab PPROG Turn on programming voltagejsr DELAY_10 Delay 10 msclr PPROG Turn everything offpulb Restore b regret

* Bulk eraseBULK pshb Save B register

ldab #ERASE|EELATstab PPROG Set to bulk erase modestab EEPROM Write to any data locationldab #ERASE|EELAT|EEPGMstab PPROG Turn on programming voltagejsr DELAY_10clr PPROG Turn off the voltagespulbret

* Byte erase* Entry: X = location to eraseBYTERASE pshb

ldab #BYTE|ERASE|ELATstab PPROG Set to byte erase modestab 0,x Write to the byte to eraseldab #BYTE|ERASE|EELAT|EEPGMstab PPROG Turn on prog voltagejsr DELAY_10clr PPROG Turn off programmingpulbret

9-6 How does the M68HC11 generate the 19 volts needed to program the EEPROM?

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A charge pump is used to generate the EEPROM programming voltage. The userturns the charge pump on and then must wait at least 10 ms for the programming tobe completed.


10-1 What is wrong with the following code to get the 16-bit value of the TCNT register?LDAA $100E Get the high byteLDAB $100F Get the low byte

The TCNT register increments at each E-clock cycle so the low byte will havechanged during the time the high byte is being read.

10-2 What is wrong with the following code to get the 16-bit value of the TCNT register?LDAB $100F Get the low byteLDAA $100E Get the high byte

The TCNT register increments at each E-clock cycle and by the time you getthrough reading the low byte, it may have overflowed, causing the high byteto be incremented by one.

10-3 How should you read the 16-bit TCNT value?LDD $100E Latches the 16-bit data from the TCNT register so the value is stable.

10-4 How is the TCNT clock prescaler programmed?Bits PR1 and PR0 in the TMSK2 register may be set during the first 64 clock cyclesfollowing a reset.

10-5 Give the name of the bit, the name of the register that it is in, the register's address, which bit,and the default or reset state of the bit for each of the following:

a. What bit indicates that timer has overflowed?Timer overflow flag, TOF, in the TFLG2 register at $1026, bit-7; the reset state is 0.

b. What bit enables the timer overflow interrupts?TOI in the TMSK2 register at $1024, bit-7. The default state is interrupts disabled.

c. What bits are used to prescale the timer clock?PR1 and PR0, in the TMSK2 register at $1024, bits 1 and 0. The default state is 00 todivide by 1.

10-6 When is the timer overflow flag set? When the TCNT register rolls over from $FFFF to $0000.

10-7 How is the timer overflow flag reset?By the software writing a one to bit-7 of TFLG2 register.

10-8 What timing resolution can be achieved with the output compare?1 E-clock cycle.

10-9 Give the name of the bit, the name of the register that it is in, the register's address, which bit,and the default or reset state of the bit for each of the following:

a. What bit indicates that a comparison has been made on Output Compare 2?OC2F, in the TFLG1 register at $1023, bit 6. The reset state is 0.

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b. What bit enables the Output Compare 2 interrupt?OC21, in the TMSK1 register at $1022, bit 6. The reset state is interrupts disabled.

c. What bits are used to set the Output Compare 3 I/O pin high on a successfulcomparison?OM3 and OL3 in the TCTL1 register at $1020, bits 5 and 4. The reset state is for thetimer to be disconnected from the output pin.

10-10 Write a small section of code to set the Output Compare 2 I/O pin to toggle on everycomparison.

ldaa %01000000 Set OM2, OL2 to 01staa $1020 Write to TCTL1 register

10-11 Write a small section of code to enable Output Compare 1 to set bits PA7, PA6 and PA5 toone on the next successful comparison.

ldaa %11100000 Set bits 7,6,5 highstaa $100D Write the Output Compare 1 data registerstaa $100C Enable bits 7, 6, and 5 in OC1 mask register

10-12 What two registers control which data bits are output when the Output Compare 1 flag is set?The Output Compare 1 Data (OC1D) register located at $100D and the OutputCompare 1 Mask (OC1M) register located at $100C.

10-13 How does the programmer select the active edge for Input Capture 2?Timer Control Register 2 (TCTL2) at $1021 contains bits to select the edge used forthe input capture. Bits 3 and 2 control the edge for IC2 by the following truth table:

EDG2B EDG2A Edge 0 0 Capture Disabled 0 1 Capture on rising edges only 1 0 Capture on falling edges only 1 1 Capture on any edge, rising or falling

10-14 Write a short section of code demonstrating how to reset the Input Capture 2 Flag IC2F.ldaa #%00000010 IC2F positionstaa $1023 Write to TFLG1

10-15 Write a short section of code demonstrating how to enable the Input Capture 1 interrupts.ldaa #%00000100 IC1I positionstaa $1022 Write to TMSK1

10-16 Write a short section of code demonstrating how to enable the real time interrupt and to setthe nominal rate to 16.384 ms assuming a 2 MHz E-clock.

ldx #$1000 Point to the control registersbset $26,x %00000010 Set interrupt in PACTLbset $25,x %01000000 Write to TFLG2 to reset real time interrupt flagbset $24,x %01000000 Write to TMSK2 to enable real time interrupts

10-17 Write a short section of code demonstrating how to reset the COP timer.ldaa #$55 Arm patternstaa $103A Write to COPRST registerldaa #$AA Reset patternstaa $103A Write to COPRST register

10-18 Write a short section of code demonstrating how to enable the Pulse Accumulator as an eventcounter counting rising edges.

ldx #$1000 Point to the control registers

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bset $26,x %01010000 Set PAEN and PEDGE in PACTLbclr $26,x %00100000 Clear PAMOD in PACTL

10-19 Write a short section of code demonstrating how to enable the Pulse Accumulator as a gatedtime accumulator with a high level enable accumulation.

ldx #$1000 Point to the control registersbset $26,x %01100000 Set PAEN and PAMOD in PACTLbclr $26,x %00010000 Clear PEDGE in PACTL

10-20 What bits in what registers must be set to enable the Pulse Accumulator Input Edge interrupt?PAIF, bit-4 in TFLG2, $1025 and PAII, bit-4 in TMSK2, $1024 must be set.

10-21 Write a small program to toggle Port A, bit-4 every 10 ms.10-22 Write a small program to output a 1.5 µs pulse on Port A, bit-5 when the TCNT register is

$8000.10-23 Write an interrupt service routine that uses the pulse accumulator in gated time accumulation

mode to debounce a switch. The routine is to set a variable in data RAM true or falsedepending on the state of the switch 10 ms after detecting the onset of switch bounce.

10-24 What are the longest and shortest pulse-width modulation periods that can be achieved in aM68HC11K series microcontroller? Assume 8-bit registers, 0.5% duty cycle resolution anda 2 MHz E-clock.

The longest period is achieved by using Clock S with Clock A = E-clock/8, Clock S= Clock A/512 and PWPER = 255.T = 0.5 µs * 8 * 512 = 2.048 ms, T = 255 * 2.048 ms = 0.52 sCNT PERIOD

The shortest period with a duty cycle resolution of 0.5% is found by using PWPER =200 and CNT = E-clock.T = 200 * 0.5 µs = 0.1 ms.PERIOD

10-25 What are the longest and shortest pulse-width modulation periods that can be achieved in aM68HC11K series microcontroller using Clock A? Assume 8-bit registers, 0.5% duty cycleresolution and a 2 MHz E-clock.

Longest: Use PWPER = 255, Clock A = E-clock/8T = 255 * 0.5 µs * 8 = 1.02 ms.PERIOD

Shortest: Use PWPER = 200, Clock A = E-clockT = 200 * 0.5 µs = 100 µs.PERIOD

10-26 What are the longest and shortest pulse-width modulation periods that can be achieved in aM68HC11K series microcontroller using Clock B? Assume 8-bit registers, 0.5% duty cycleresolution and a 2 MHz E-clock.

Longest: Use PWPER = 255, Clock B = E-clock/128T = 255 * 0.5 µs * 128 = 16.32 ms.PERIOD

Shortest: USE PWPER = 200, Clock B = E-clockT = 200 * 0.5 µs = 100 µsPERIOD

10-27 What is the longest pulse-width modulation period that can be achieved in a M68HC11Kseries microcontroller using 16-bit concatenated registers. Assume 0.5% duty cycleresolution and a 2 MHz E-clock.

Use PWPER = 65,535, Clock S = E-clock/4096T = 65,535 * 0.5 µs * 4096 = 134.2 s.PERIOD

10-28 Give two reasons why you would choose to concatenate 8-bit pulse-width modulationregisters?

To get a longer period and/or better duty cycle resolution.

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10-29 Define a clock and specify PWPER and PWDTY values for a pulse-width modulatedwaveform with T = 3 ms and T = 0.5 ms. Assume the duty cycle resolution is toPERIOD HIGH

be < 1% and the E-clock is 2 MHz.1. PWPER $ 100, choose PWPER = 200.2. T = 3 ms/200 = 15 µs.CNT

3. PWDTY = 0.5 ms/15 µs = 33.33, choose PWDTY = 34. T = 0.5 ms/34 = 14.7 µs.CNT

PWPER = 3 ms/14.7 µs = 204.4. Total divisor = 14.7 µs/0.5 µs = 29.4. Choose 32. 5. Choose Clock B with divisor of 32.

T = 0.5 µs * 32 = 16 µs.CNT

PWPER = 3 ms/16 µs = 187.5. Choose 187T = 187 * 16 µs = 2.99 ms.PERIOD

PWDTY = 0.5 ms/16 µs = 31.25. Choose 31.T = 31 * 16 µs = 0.496 ms.HIGH

10-30 Define a clock and specify PWPER and PWDTY values for a pulse-width modulatedwaveform with T = 3 ms and T = 40 µs. Assume the duty cycle resolution is 10 µsPERIOD HIGH

and the E-clock is 2 MHz.1. Duty cycle resolution = 10 µs/3 ms = 0.33%

PWPER $ 300. Choose 16-bit concatenated register, PWPER = 600.2. T = 3 ms/600 = 5 µs.CNT

3. PWDTY = 40 µs/5 µs = 8.4. Total divisor = 5 µs/0.5 µs = 10.5. Choose Clock S. Use Clock A divisor = 1, PWSCAL = 5.


11-1 For the SCI, give the name of the bit, the name of the register it is in, the register's address,which bit, and the default or reset state of the bit for each of the following:a. What bit enables the SCI transmitter?

TE, in the SCCR2 register at $102D, bit-3; the transmitter is disabled on reset.b. What bit enables the SCI receiver?

RE, in the SCCR2 register at $102D, bit-2; the receiver is disabled on reset.c. What bit determines how many data bits are sent?

M (mode), in SCCR1 at $102C, bit-4; the default is 1 start, 8 data and 1 stop bit.d. What bit can the user test to see if the last character has cleared the transmit data

buffer?TDRE, in the SCSR at $102E, bit-7; the default is that the buffer is empty.

e. What bit can the user test to see if a new character has been received?RDRF, in the SCSR at $102E, bit-5; the default is that the register is not full.

f. What bit is used to indicate the software is not reading data from the SCDR fastenough?Or, in SCSR at $102E, bit-3; no overrun by default.

g. What bit is an indication that the communication channel is noisy?

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NF, in SCSR at $102E, bit-2; default is no noise.h. What bit is an indication that the sending and receiving baud rates may not be

identical?FE, in SCSR at $102E, bit-1; default to no framing error.

11-2For the SCI, give the name of the bit, the name of the register it is in, the register's address,which bit, and the default or reset state of the bit for each of the following:a. What bit enables an interrupt when the transmit buffer is empty?

TIE, in the SCCR2 register at $102D, bit-7; TDRE interrupts are disabled.b. What bit enables an interrupt when the transmitter has completely emptied its serial

shift register?TCIE, in the SCCR2 at $102D, bit-6; transmit complete interrupts are disabled.

c. What bit enables interrupts by the SCI receiver?RIE, in the SCCR2 at $102D, bit-5; receiver interrupts are disabled.

11-3 What SCI receiver conditions can generate an interrupt?Receive data register full, receiver overrun, idle line detect.

11-4 What different status information do the SCI status bits TDRE and TC give?TDRE indicates that the last character has been transferred from the SCDR transmitregister to the output shift register. TC, transmission complete, indicates that the lastcharacter has been shifted out of the shift register.

11-5 Give the meanings of the following mnemonics.TDRE - Transmit Data Register EmptyTC - Transmission CompleteRDRF - Receive Data Register FullOR - (Receiver) OverRunFE - Framing Error

11-6 What is the M68HC11 I/O address for the BAUD register? $102b11-7 What is the hexadecimal value used to initialize the BAUD register for 4800 baud assuming

an 8.0 MHz crystal in the M68HC11? $3111-8 Which port and which bits are the serial communications interface (SCI) transmitted and

received data? Port D, Pins 1 (TxD) and 2 (RxD)11-9 Write a short section of code showing how to receive data from the SCI after waiting until

new data has been received.11-10

For the SPI, give the name of the bit, the name of the register it is in, the register's address,which bit, and the default or reset state of the bit for each of the following:a. What bit enables the SPI?

SPE, in the SPCR register at $1028, bit-6; the default state is SPI disabled.b. What bit selects the master or slave mode?

MSTR, in the SPCR register at $1028, bit-4; SPI configured as a slave.c. What bits select the data transfer rate?

SPR1, SPR0, in the SPCR register at $1028, bit-1, bit-0; the reset state is unknown.d. What bit is the Master Output/Slave Input?

MOSI, PORTD, $1008, bit-3; the default is to act as Port D, bit-3.e. What bit is the Master Input/Slave Output?

MISO, PORTD, $1008, bit-2; the default is to act as Port D, bit-2.11-11

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For the SPI, give the name of the bit, the name of the register it is in, the register's address,which bit, and the default or reset state of the bit for each of the following:a. What bit indicates the SPI has completely sent the last data?

SPIF, SPSR at $1029, bit-7; default state is reset.b. What bit indicates an error has occurred where new data has been written to the

output register before the old data has cleared?WCOL, SPSR at $1029, bit-6; default is reset.

c. What bit is set to enable SPI interrupts?SPIE, SPCR at $1028, bit-7; interrupts are disabled.

11-12 How does the SPI differ from the SCI?The SPI is a synchronous serial port. Data bits are transferred from a master to aslave when the master generates a SCK signal. Data rates can be much higher withthis system than with the SCI.

11-13 How does a slave station SPI send data to the master station?The slave station shifts data to the master as the master is shift data to the slave. Alldata transfer is controlled by the master SCK signal.

11-14 What do the following mnemonics mean in the operation of the SPI? &&SS - Slave select; SCK - SPI Clock; MOSI - Master Out, Slave In; MISO - Master In, Slave Out; SPIE - SPI Interrupt Enable; SPE - SPI System EnableMSTR - Master/slave Mode Select

Copyright 1995 Oxford University Press

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