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Basic I/O Interfacing 1

Interfacing Lecture

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  • Basic I/O Interfacing

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  • ObjectivesOperation of basic I/O operationsDecode 8-, 16, and 32-bit addresses for enabling I/O portsHandshaking for I/O operationsInterface and program the 82C55 PPI (programmable peripheral interface)Using the 82C55 to connect LEDs, keyboards, etc. to the processorInterface stepper and DC motors to the processorInterface and program the 16550 programmable asynchronous serial interface adapter (UART)Interface and program the 8254 programmable interval timer (PIT)

    *

  • I/O InstructionsTwo types:- Transfer data between the processor accumulator (AL, AX, EAX) register and I/O device: IN and OUT- Transfer string data between memory and I/O device directly: INS and OUTS (for processors above 8086)The IN instruction (I/O Read): Inputs data from an external I/O device to the accumulator.The OUT instruction (I/O Write): Copies the contents of the accumulator out to an external I/O device.The accumulator is:- AL (for 8-bit I/O), - AX (for 16-bit I/O),- EAX (for 32-bit I/O).*

  • I/O AddressAs with memory, I/O devices have I/O addresses (addresses for the I/O port)Up to 64K I/O bytes can be addressed The 16-bit port address appears on address bus bits A15-A0 This allows I/O devices at addresses 0000H-FFFFHTwo ways to specify an I/O port address:- An 8-bit immediate (fixed) address (specified as a byte in the instruction): e.g. IN AX, p8 ; Reads a word from port p8 0000H-00FFH (can only see the first 256 addresses)- A 16-bit address located in register DX (can be easily varied): e.g. OUT DX, AL; outputs the byte in AL to the port whose address is in DX 0000H-FFFFH (upto 16K addresses). i.e. high port addresses are accessible only through DX addressing00FFImmediateDX*

  • I/O Data widthsAs with memory, I/O ports are also organized as bytes A port can be 1, 2, or 4 bytes wide (not 8 bytes wide on the Pentium) 00F0H00F1H00F2H00F3HLS bytePort Address p8ALEAXPort is 1 byte widePort is 2 bytes widePort is 4 bytes wideLow Endian scheme:Low address byte contains low end (LS) part of dataAX*

  • INS and OUTS I/O instructionsThey address I/O port using register DXTransfer string data between port and memory- INS: Moves string data to the Extra Segment; ES:DI- OUTS: Moves data from the Data Segment; DS:SIAs with other string instructions, DI and SI can be automatically incremented or decremented depending on the state of the DF (direction flag) bitData width of transfer specified by using INSB, INSW, and INSD for byte, word, and double wordCan be prefixed with REP to repeat the instruction for a number of times stored in CX*

  • DXDXDX(Note corrections)Width ofTransferDetermined by the A register usedI/O ReadWidth ofTransferDetermined by the Instruction usedI/O WriteNo argument,DX by default*

  • Isolated vs. Memory MappedI/O can be either:- Isolated, or - Memory mappedIsolated I/O: uses the dedicated I/O instructions (IN, OUT and INS, OUTS) and has its own address space for I/O ports (0000H-FFFFH)- isolated from the memory address space Memory mapped I/O: uses memory reference instructions , e.g. MOV, and a region of the memory address map. So address space is shared between memory and I/O (used by only one of them)Both techniques can be used with Intel processorsBut most Intel-based systems e.g. the PC, use isolated I/OSome other processors do not have dedicated I/O instructions and therefore use only memory-mapped I/O addressing, e.g. the PowerPC microprocessor (Macintosh computers)*

  • Memory and I/O addressMaps for the 8086/8088Isolated I/OUsing dedicated I/Oinstructions e.g. IN, OUTb. Memory-mapped I/O Using ordinary memory transfer instructions e.g. MOV64 KI/O bytesI/O Port specified in DX, either explicitly or implicitlyPort specified immediately as a byte in the I/O instruction00FFRange of memory addressesassigned for I/O transfersMemory:MOVI/O:INMemoryMOV*

  • The PC I/O spaceThe PC I/O space mainly exists at locations below I/O port 0400HMain board devices appear at addresses 0000H through 00FFHEarly ancillary I/O devices appear at I/O locations 0100H through 03FFHModern components appear at I/O locations above 0400HThe slide on the next page shows many of the I/O devices found in the personal computer*

  • 00FF03FF0000Reserved for use by system components and ISA busThe PC I/O Address SpaceCan Use either:- Fixed (immediate) 8-bitI/O address in instruction, p8- Variable 16-bitI/O address in register DX00000100Must use 16-bit variableI/O address in register DXProcessor communicates with and controls these peripherals through writing into/reading from their control registers accessed as I/O locationsOn Board DevicesInterval (8254)*

  • IN (I/O Read)The IN instruction primarily takes he following forms:

    IN AL,23H;immediateIN AL,DX;DX holds addressIN AX,44HIN AX,DXIN EAX,2AHIN EAX,DXSize of data transferred in each case?Data from the Input port addressed is put on the data bus for the processor to read into the A register*

  • OUT (I/O Write)The OUT instruction primarily takes the following forms:

    OUT 23H,AL;immediateOUT DX,AL;DX holds portOUT 4CH,AXOUT DX,AXOUT 1EH,EAXOUT DX,EAXSize of data transferred in each case?Data from the A register is put on the data bus for latching into the Output port addressed*

  • In embedded systems, most I/O is 8-bits To write the data 00H into Output port 62H

    MOV AL,00HOUT 62H,ALorMOV AL,00HMOV DX,62HOUT DX,AL

    To read a byte from Input port address 71H:

    IN AL,71HorMOV DX,71HIN AL,DX*

  • Basic Input Port (for I/O Reads)The basic input port connects an external set of bits to the mP data bus whenever the mP executes the correct IN instruction with the correct I/O port addressExternal device puts data on the mP data bus Must include a 3-state (Tri-State) buffer to limit access to the processor data bus to the duration of executing the I/O instruction only*

  • To mPPull-upResistors0 1Toggle switchesOutputs:Normally Hi-ZUnless device isSelected (both G1 and G2 low) The SEL signal is generated (active low)By decoding: - The address for the I/O port - The I/O READ operationCircuit can be expanded for16-bit (word) or 32-bit (DWord) interfaces Basic 8-bit Input Interface:Reads the status of 8 toggle Switches (a byte read)3-state bufferGate*

  • Basic Output Port (for I/O Writes)The basic output port writes data from the mP data bus to an output port whenever the mP executes the correct OUT instruction with the correct I/O port addressMust latch the processor data put on the bus during the I/O instruction to make it available indefinitely for the port No need for 3-state (Tri-State) buffers as the data bus is at the input side of the latch*

  • Basic 8-bit Output Interface:Controls 8 LEDs (1: OFF, 0: ON)From mPData is latched and remains here until the next OUT instruction to this port is executedCircuit can be expanded for16-bit (word) or 32-bit (DWord) interfaces The SEL is generated (for + ive edge triggering) by decoding: - The address for the I/O port - The I/O WRITE operationEdge-triggered latchOENo HiZ.O/P alwaysenabled*

  • Parallel PortThe parallel port is an example of interfacing slow devices, e.g. a printer, to the processorA printer can print say 100s of characters per sec (CPS), but the processor can output as many as 1000s of CPSTo achieve flow control and proper operation we use a technique called handshakingHandshaking regulates the flow of data from the processor to a slower peripheral device to ensure correct operation*

  • InterfacingWhen connecting external input and output devices to the processor, we must take into account the DC characteristics and drive capabilities of the mP pins.

    (Fan-out considerations For outputs before)mP OutputmPmP InputInput Devices, e.g.SwitchesOutput Devices, e.g.LEDsSinkSourceSinkSource*

  • Input Devices: The SwitchThe most basic input device Switches are passive- do not produce a voltage, easily present a logic 0 to an I/P by grounding it.To make a switch TTL compatible, a pullup resistor is used as shown. The value should be between 1K and 27K W.Why not, say, 400 K W?Switches bounce and this is often undesirable.The pullup resistor does the conditioning required toallow the switch to produce a TTL compatible input tothe processorHere, processor senses the switch effect directly- hence bouncingis a problem, especially if input Is used as a clock(Single PoleSingle Throw)I in, High= 5 VInitial PosnFinal PosnWrong switchState Can be readHere !*

  • The switch Bouncing ProblemSwitch contacts bounce mechanically before it finally settles in the new positionWith the simple arrangement shown, bounces can lead to the wrong input being read by the processorThe effect of switch bounces can be removed either: by Software: Simply wait a little before reading the new switch status by hardware Hardware solutions increase circuit cost and complexity*

  • LED diodes are used in many systems as indicators and as sources of infrared beamsLED must be forward biased to conduct and emit lightWhen conducting, a typical (Red, Green, or Yellow) LED passes a current of about 10 mA with a voltage drop Vdiode 1.65 V (1.5 V - 2 V in practice) A Blue, White, or Ultra Bright LED passes more current at a larger voltage drop, e.g. 30 mA @ 2.5 V.Output Devices: The LED+_1.65 V10 mA A bit of electronics!*

  • 10 mA currents can be easily sunk by a TTL output at the low state (0) => (A standard 74 TTL O/P sinks up to 16 mA lower values for lower power series e.g. 74LS sinks only 4 mA)Vout, low 0.1 VVdiode 1.65 VTo ensure I = 10 mA, R should be

    Interfacing the LED directly to a TTL O/PRV diodeVoutI min = 10 mA = +5VNearest standard resistor value+_LED ON indicates 1 or 0 at Input?*

  • If diode takes current > TTL sink current at the low state: Use a transistor to connect the LEDTransistor current gain (b= Ic/Ib 100) reduces current requirement from the TTL circuit (e.g. the mP or the buffer IC) => Ib = Ic/100 = 10mA/100 0.1 mA => Rc calculated as before, similar value => Rb should not be larger than:

    Interfacing the LED through a transistorb = Basee = Emitterc = CollectorNearest standard resistor value0.7V0.1V1.65 V+_Ic = 10 mA Ib = 0.1 mA (TTL)RbbceTransistor:Use minimum gain value specified(worst case condition)(TransistorIs saturated)CommonEmitter*

  • Driving larger currents and voltages; e.g. DC motors, mechanical relays, etc.Large current loads such as motors or large relays require a Darlington pair in place of the transistor driver Two transistor gains in cascade, (b = b1 b2), so smaller base currents from TTL for large load currentsCan use 12 V or higher supplySelect a transistor that meets both the voltage and current requirements for the load The diode is used to prevent the transistor from being destroyed by the inductive kickback current that appears when the field collapses suddenly in the coil

    Current can not change instantly through an inductor. If it suddenly drops from I1 to 0, a negative current - I1 is generated which gradually decays to 0. The diode provides a safe path for this current away from the transistorRbIc = 1 A 1A/(7000)=0.143 mA(TTL)Diode offIn normal operationb = b1 b20.7V0.7V12 V DC Motor*

  • Port Address DecodersAs with memory addresses, port addresses must also be decoded to select an I/O device for a particular port number.Memory mapped I/O is identical to memory access (with IO/#M = 0)Will consider here only isolated I/O (using dedicated instructions: IN, OUT, etc.)Most embedded systems use only fixed I/O addressing: - i.e. Only the least significant eight address bits A7-A0 are decoded. Limits number of I/O ports to 256 (enough)PC systems used fixed/variable I/O addressing: - All 16-bits of the I/O address A15-A0 are decoded, allowing the use of up to 64K portsDecoding is simpler than for memory- smaller # of address linesIsolated I/O transfers are activated using (depending on processor and mode):- IO/#M = 1, M/#IO = 0, #IORC, #IOWC, #RD, #WR, W/#RWK 9*

  • XXX

    10

    111 3-to-8 DecoderXXX

    01

    111Decoder I/PsDecoder O/PsLS part(Select port on decoder)MS part(Enable decoder)A7 ....A0Address from mP11110 000 = F0 1st11110 001 = F1 2nd.11110 111 = F7 7thTo EnableInputs on the8 I/O portsAddress Decoding for 8 I/O Ports: F0 to F7for the 8088 using 8-bit I/O address a. Using a Decoder ICNote: #IO/M decoding should be added*

  • The 82C55 PPIThe 8255 allows the microprocessor to communicate with the outside world through three programmable 8-bit wide I/O portsThe PC uses a few 82C55 (in the chip set) to control the keyboard, speaker, and parallel portThe 8255 PPI is available in DIP or surface mount formsAlso implemented as functions within modern interface chip sets PPI = Programmable Peripheral Interface*

  • ABC3 programmable 8-bit I/O ports: A, B, CPort A + Upper half of C = Group A(12 bits)Port B + lower half of C = Group B(12 bits)82C55 DIP VersionData Bus2-bit Address I/P(select port or Command register for Read or Write)CS Input(low)Read/Write ControlOn the PC: Two 82C55sOne 82C55 occupies4 I/O ports 60H-63H:Handling Keyboard, timer, speaker, etc.

    One 82C55 occupies 4 I/O ports 378H-37BHParallel printer portRESET initializes the PPI to operate in mode 0 & all 3 ports as inputs at power up.

    With all ports as input ports, this avoids damage to the device at Power up2 Groups 12-bit groups A, BSimilar to a 4-byte RAM *

  • B*

  • I/O Port AssignmentsGroup A is Port A and upper of Port C (PC7-PC4).Group B is Port B and lower of Port C (PC3-PC0).

    Writing into this registerprograms the various ports to operate in various modes and be used as either inputs or outputs*

    A1A0Function00Port A01Port B10Port C11Command Register

  • 10010000180386SX ProcessorA7 A6 A5 A4 A3 A2 A1 A01 0 0 0 0 0 0 = C0H Port A11 0 0 0 0 1 0 = C2H Port B11 0 0 0 1 0 0 = C4H Port C1 0 0 0 1 1 0 = C6H Comnd RegisterA1 A0 Inputs on 82C55Address from80386SXmicroprocessorAddress from microprocessorSelect PPIAt decoded mP address*

  • Programming the 82C55 Using one internal register If bit 7 = 1 select format for Command Byte A If bit 7 = 0 select format for Command Byte B Bit 7 = 1: Command Byte A: Programs Groups A and B (as defined in terms of ports A, B, C - previous slide): - as either inputs or outputs - in either modes 0, 1, or 2 Bit 7 = 0: Command Byte B: Sets (to 1) or Clears (to 0) the specified one of 8 bits of port C (in modes 1 and 2) Only for mode 0ProgramProgram*

  • 8255 ModesMode 0 (for groups A & B)- the most commonly used mode: All 12 bits of the group are simple inputs or simple latched outputs

    Mode 1 (for groups A & B)- is used occasionally to provide handshaking to an I/O device and operate asynchronously with the device. Most Port C bits are dedicated for handshake functions for the operation. A few are controlled separately using the Command byte B format for handshaking I/O.

    Mode 2 (for group A only- Group B not used)- is a bidirectional mode for Port A only (Port B is not used). Port C provides handshaking signals.DataDataDataControl, e.g. Busy, Strobe, etc.*

  • 8255 ModesNot UsedControl:HandshakingFor the data portWhen O/P,Set or Reset Using Command Byte B*

  • Programming the 82C55To program the command register of the 82C55 and select operation use command byte AFor example, to program all the ports as outputs and in mode 0 (the most common mode) use:MOV AL,80HMOV DX,COMMAND_PORTOUT DX,AL= C6H address of command register*

  • Mode 0 Application: 7-Segement DisplayCommon SegmentDriver *

  • 7-Segement DisplaySelect Segments: Switched Resistors to GNDAnodeCathodeSelect Segments: Switched Resistors to VccCACC Vcc GND*

  • 7-Segement DisplayAnodeCathodeSegment Data (1 byte)for each character*

  • Multiplexed 7-Segement DisplayMotivation for MUXing: Reduce the number of segment drivers by a factor of nCommonTo segment on all DigitsSequentiallyTurn ON one digit at a time

    Recommended rate: 100 1500 times per secn = 8Digits*

  • B: O/P Port:Select # DisplayedA: O/P Port:Segment dataFor selected digitB: O/P Port:Select digit To be displayedDigit transistor switchControlled by Port B bit,e.g. Tr 1 Vcc7 Segment data transistor switchesControlled by Port A bits, e.g. Tr 2GNDPLD for 14-bit I/O address (A15-A2) + IO/#M decodingAddress decoding is similar to that of a 4-byte Read/Write memoryMultiplex the eight digit displays (only one is ON at a time)1 turns segment ON0 turns digitdigit ONMost Significant (MS) Digit. . . . . . 1 digitTr 1Tr 2*

  • library ieee;use ieee.std_logic_1164.all;entity DECODER_11_21 isport (IOM, A15, A14, A13, A12, A11, A10, A9, A8, A7, A6, A5, A4, A3, A2: in STD_LOGIC;D0: out STD_LOGIC);end;architecture V1 of DECODER_11_17 isbegin D0
  • ; Program the 82C55 for Port A and Port B are output ports in mode 0MOV AL, 80H; 80H Data into ALMOV DX, 703H ; Address of Command Port into DXOUT DX, AL; Write 80H into Command Port;; to program PPI; An assembly language procedure that multiplexes the 8-digit display.; This procedure must be called often enough for the display to appear stableDISPPROCNEAR USES AX BX DX SIPUSHFMOV BX,8;load counter BX with # of display digitsMOV AH,7FH;load initial digit selection pattern to enable MS digit (01111111)MOV SI,OFFSET MEM - 1;Load SI with offset (MEM) - 1MOV DX,701H;address Port B (for Port A: decrement DX) ;Sequentially display all 8 digits starting with MS digit.REPEATMOV AL,AHOUT DX,AL;send digit selection pattern to Port BDEC DX;Address Port A (to send Digit Data)MOV AL,[BX+SI];Load digit data from memory into ALOUT DX,AL;send digit data to Port ACALL DELAY;wait 1.0 ms leaving displayed digit ONROR AH,1;adjust selection pattern to point to next digitINC DX;Address port BDEC BX;decrement counter for data of next digit..UNTIL BX == 0POPFRETDISPENDP...MEMBXMEM+7MS Digit8 bytes ofDigit DataIn memoryLS DigitProcedure for 1 ms delay, e.g. a loop of instructionsi.e. digit remains ON for 1 ms before moving to next*

  • ; Delay LoopDELAY PROC NEAR USES CXMOV CX, XXXX; XXXX determines delay, = Delay required / loop exec timeD1:LOOP D1RETDELAY ENDP

    Loop execution time is calculated from instruction data and the clock frequency.

    An 80486 executes LOOP D1 in 7 clock cycles

    With a 20 MHz clock, loop exec time = 7 x 50 = 350 ns

    XXXX = 1ms/350nsDisplay Flashing Rate:

    - Assume the DISP Procedure is called continuously- Ignore loop execution times relative to delay time (e.g. 350 ns

  • Applied Control Systems

    Stepper Motors

    *

  • Stepper Motor / Electro magnet*

  • RotorStatorCoils*

  • StatorsRotorCross Section of a Stepper Motor*

  • Four Steps per revolution i.e. 90 deg. steps.Full Step Operation*

  • Eight steps per. revolution i.e. 45 deg. steps.Half Step Operation*

  • Winding number 1Winding number 2One step6 pole rotor*

  • How many steps are required for one complete revolution?Six pole rotor, two electro magnets.*

  • PPPP*

  • *

  • STEP SEQUENCINGThere are three modes of operation which is determined by the step sequence applied. The three step sequences are: Wave Full Half Stepping The half-step sequence has the most torque and is the most stable at higher speeds. It also has the highest resolution of the main stepping methods. It is a combination of full and wave stepping. HALF STEPPING: Combination*

  • *

  • Stepper Motor InterfaceStepper motor is digital in natureIt rotates in a sequence of discrete steps controlled by sequentially energizing a set of coils (windings)Step angles vary from 1 to 15 depending on precision required (and cost) N Pole lies between the two energized coils Rotation Direction: Anti-clock wise Step angle: 90451352253152 coils driven at a time0011ROL: Motor rotates anticlockwiseAnti-clockwise RotationROR reverses the direction ofMotor rotationDBCAABCD*

  • Darlington pairsfor driving high load currentsAnti-surge diodes03H or 06H or 0CH or 09HPOSCurrent angular Position stored at location POS (in memory)03H = 001106H = 01100CH = 110009H = 1001ROLRORAnti-ClockwiseClockwiseROL1 activates coil Rotate instruction operates on whole byteWe want to rotate half the byte duplicate pattern!*

  • *

  • The top electromagnet (1) is turned on, attracting the nearest teeth of a gear-shaped iron rotor. With the teeth aligned to electromagnet 1, they will be slightly offset from electromagnet 2 Practical Stepper motor operation*

  • The bottom electromagnet (3) is energized; another 3.6 rotation occurs.*

  • Stepping Motor to move read-write headStepper motor applications*

  • Paper feeder on printersCNC lathesStepper motorsStepper motor applications*

  • RotorStator coilsCNC Stepping Motor*

  • Advantages:-Low cost for control achievedRuggednessSimplicity of constructionCan operate in an open loop control systemLow maintenanceLess likely to stall or slipWill work in any environmentDisadvantages:-Require a dedicated control circuitUse more current than D.C. motorsHigh torque output achieved at low speeds Advantages / Disadvantages*

  • *

  • 8253/4-Programmable Interval Timer (PIT)

    *

  • Necessity

    It solves: Generation of accurate time delays in microprocessor system under software control

    (No processing overhead due to looping to create a delay-the microprocessor can trigger the counting and do some other job while the timer is producing necessary delays)*

  • 8253 / 8254 TimerPIT, used to bring down the frequency to the desired levelThree counters inside 8253/4. Each works independently & is programmed separately to divide the input frequency by a number from 1 to 65536.There are 4 port address needed for a single 8253/4, given by A0, A1, and CS CS A1 A0 Select 0 0 0 Counter 0 0 0 1 Counter 1 0 1 0 Counter 2 0 1 1 Control Reg.*

  • *

  • 8253 / 8254 TimerEach of the three counter has 3 pins associatedCLK: input clock frequencyA square wave of 33% duty cycle8253: 0 ~ 2 MHz, 8254: 0 ~ 8/10 MHzOUT: can be square wave, or one shotGATE: Enable (high) or disable (low) the counterData Pins: (D0 ~ D7)Allow the CPU to access various registers inside the 8253/54 for both read and write operations. RD and WR are connected to IOR and IOW of control bus.*

  • Programming 8253 / 8254 TimerEach of the three counters must be programmed separatelyControl byte must be first written into the control register. The 8253/4 must be initialized before useThe programmer can not only write the value of the divisor into the 8253/4, but read the content of the counter at any given time as wellAll counters are down counters.`*

  • Control Word for 8253/4 Timer Initialization*

  • 8253 / 8254 TimerTo program a given counter to divide the CLK input frequency, one must send the divisor to that specific counters register.Although all three counters share the same control register, the divisor registers are separate for each counterExample: given the port addresses for 8253/54: Counter 0: 94H Counter 1: 95HCounter 2: 96H Control Reg: 97H*

  • 8253 / 8254 TimerTask1: Program counter-0 for binary counter for mode-3 to divide CLK0 by number 4282 (BCD)

    MOV AL, 37HOUT 97H, ALMOV AX, 4282H ;(BCD needs H)OUT 94H, AL ;(Low Byte)MOV AL, AHOUT 94H, AL ;(High Byte)

    => OUT0 = CLK0 / 4282*

  • Shape of the 8253/4 OutputGiven CLK = 1.193 MHz, the clock period of input frequency is 838nsIf the number N loaded into the counter is even, both high and low pulse are the same length, which is N/2 * 838nsIf the number N loaded into the counter is odd, the high pulse is (N+1)/2 * 838ns and the low pulse is (N1)/2 * 838ns If N is odd, the high portion of the output square wave is slightly wider than the low portion*

  • 8253/54 Operation ModesMode 0: Interrupt on terminal countThe output is initially low, and remain low for the duration of the count if GATE=1. When the terminal count is reached, the output will go high and remain high until a new control word or new count number is loadedWidth of low pulse = N * T, where T is clock period

    Example: GATE=1 and CLK = 1 MHz Clock count N = 1000*

  • Mode 0 Timing Diagram*If GATE becomes low at the middle of the count, the count will stop and the output will be low. The count resumes when the GATE becomes high again This in effect adds to the total time the output is low.

  • 8253/54 Operation ModesMode 1: HW triggered / programmable one shotThe triggering must be done through the GATE input by sending a 0-to-1 pulse to it.Steps: 1) Load the count register 2) A 0-to-1 pulse must be sent to the GATE input to trigger thecount*In Mode 1, after sending the 0-to-1 pulse to GATE, OUT becomes low and stays low for a duration of N*T, then becomes high and stays high until the GATE is triggered againIf during the activation, a retriggered happened, then restart the down counting

  • 8253/54 Operation ModesMode 2: Rate Generator (Divide-by-N counter)In Mode2, if GATE=1, OUT will be high for N*T, goes low only for one clock pulse, then counter is reloaded automatically, and the process continues indefinitely. Whole period: (N+1) * T*Gate Disable:1) If Gate = 1 it enables a counting otherwise it disables counting (Gate = 0 ).2) If Gate goes low during an low output pulse, output is set immediately high .A trigger reloads the count and the normal sequence is repeated.

  • 8253/54 Operation ModesMode 3: Square wave rate generatorMost commonly used

    *oddoddEvenDecrement by 3, then by 2Decrement by 2Decrement by 1, then by 2

  • 8253/54 Operation ModesMode 4: Software triggered strobeSimilar to Mode2, except that the counter is not reloaded automaticallyIn Mode4, if GATE=1, the output will go high when loading the count, it will stay high for duration N*T. After the count reaches zero, it becomes low for one clock pulse, then goes high again and stays high until a new command word or new count is loadedTo repeat the strobe, the count must be reloaded*

  • 8253/54 Operation ModesMode 5: Hardware triggered strobeSimilar to Mode4, except that the triggering must be done with the GATE inputThe count starts only when a 0-to-1 pulse is sent to the GATE inputIf GATE retriggered during the counting, it will restart the down counting*

  • 8253 / 8254 Timer*

  • 8253 / 8254 Timer*

  • 8253 / 8254 Timer*

  • 8253 / 8254 Timer*

  • 8253 / 8254 Timer*

  • 8253 / 8254 Timer*

  • 8253 / 8254 Timer*

  • 8253 / 8254 Timer*

  • 8253 / 8254 Timer*

  • Initialization ExampleWrite a program to initialize counter 2 in mode 0 with a count of C030H. Assume address for control register = 0BH, counter 0 = 08H, counter 1 = 09H and counter 2 = 0AH.Soln: Control word:

    =B0HSource Program: MOV AL, B0H OUT 0BH, AL; loads control word to control register MOV AL, 30H OUT 0AH, AL; loads lower byte of the count MOV AL, C0H OUT 0AH, AL; loads higher byte of the count *

    D7D6D5D4D3D2D1D0SC1SC2RW1RW0M2M1M0BCD10110000

  • 16550 - Universal Asynchronous Receiver Transmitter (UART)

    *

  • The 16550 UARTUniversal Asynchronous Receiver Transmitter Baud rates up to 1.5 M bauds (signal elements/s)= Data rate (bps) for binary dataCompatible with Intel and other ProcessorsIncludes:- A programmable baud rate generator - 16-byte FIFO buffers at input and output to help processor deal with data bursts*

  • Asynchronous Serial Data CommunicationData sent asynchronously using the format illustrated belowWe often use one start bit and one stop bit to frame the data, which is usually 8-data bits with or without parity Usually a byte of data*

  • The 16550 UART: Functional DescriptionTotally independent Transmitter (TX) and Receiver (RX) Sections This allows communication in the following modes: - Simplex: Only TX or RX is used (one direction all the time)- Half Duplex: TX then RX (two directions at different times)- Full Duplex: TX and RX simultaneously (two directions at the same time)Can control a modem using six signals, e.g. #DSR (Data Set Ready) input, #DTR (Data Terminal Ready) output.Here the UART is the data terminal and modem is the dataset.

    40 pin DIP*

  • The 16550 UART: Typical ConfigurationUARTmPControlReceiverTransmitterSerialComm.LinkSINSOUTMemoryDataDMA Data Transfers:Memory UART Directly Without going through the mP16-byte FIFO Input Buffer16-byte FIFO Output BufferPSPSSerial to ParallelOr Parallel to SerialConverters*

  • The 16550 UART: Pin Assignments40 pin DIP3 I/O Address bits from Processor(Table 11-5)Baud rate Clock outputChip Select Inputs(Multiple I/Ps)Modem Interface: Inputs & OutputsData bus to ProcessorInterrupt ProcessorMaster Reset (tie to mP Reset I/P)Serial data INput from RXSerial data OUTput to TXReceiver Clock inputRead & Write Control inputs from mP(with complements for versatility User defined outputsCrystal orExternal Clock InputTX ready for data. Put data intoUART by DMARX ready with data. Take data fromUART by DMAAddress Strobe (not needed with Intels)*

  • UARTs in the PCUsed to control the COM ports of the PC- UART at I/O address 3F8-3FF: COM Port 0- UART at I/O address 2F8-2FF: COM Port 2*

  • Programming the UARTTwo Stages:

    a. Initialization Dialog: (Setup)- Follows RESET- Has two steps:1. Program the line control register (Set asynchronous transmission parameters: # of stop, data, and parity bits, etc.) 2. Program the baud rate generator for the required baud rate

    b. Operation Dialog: (Actual Communication) *

  • The 8 I/O Byte Locations on the UART*

    A2A1A0Function000Receiver buffer (read data from RX) and transmitter holding (write data to TX). Also write LS byte of baud rate divisor001Interrupt enable. Also write MS byte of baud rate divisor010Interrupt identification (read) and FIFO control Register (write)- Used for operation dialog programming 011Line control Register (Write into the line control register to program asynchronous communication at initialization)100Modem control101Line status LSTAT (Read the line status register to see if TX or RX are ready and to check for errors )

    110Modem status111Scratch

  • 1. Programming the Line Control RegisterI/O Address: A2 A1 A0 = 011Data Length = 5 bitsData Length > 5 bitsParity ControlSee next slideTo allow programmingThe baud rate generatorSee Table on next slideA break is a minimum of 2 frames of 0sa. InitializationDialogProgrammingDL bit must be setbefore you can load the divisorfor the baud generator*

  • The 3 Parity Control Bits in the Line Control Register *

    STPPEFunction000No parity001Odd parity010No parity011Even parity100Undefined101Send/receive 1 (send 1 in place of the parity bit)110Undefined111Send/receive 0 (send 0 in place of the parity bit)

  • Baud rate is programmed by loading a 16-bit divisor for the crystal oscillator (or external input) frequency into the I/O port addresses:

    {A2 A1 A0} = 000: LS Byte of divisor {A2 A1 A0} = 001: MS Byte of divisor

    Divisor value is determined by the Oscillator frequency and the baud rate required:

    Divisor = Oscillator frequency / (16 * Baud rate)

    Table shows divisor values required for various baud rates for osc frequency = 18.432 MHz

    2. Programming the Baud rate Generator*

    Baud RateDivisor Value11010,4733003840120092024004804800240960012019,2006038,4003057,60020115,20010

  • (Active Low)*

  • ;Initialization dialog for Figure 11-45;Baud rate 9600, 7 bit data, odd parity, 1 stop bitLINEEQU0F3H; A2 A1 A0 = 011 for the Line Control RegisterLSBEQU0F0H; A2 A1 A0 = 000 for LSB of divisorMSBEQU0F1H; A2 A1 A0 = 001 for MSB of divisorFIFOEQU0F2H; A2 A1 A0 = 010 for the FIFO Control Register

    INITPROCNEARMOV AL,10001010BOUT LINE,AL ; Enable Baud rate programming See slide 108 ; program Baud 9600; Divisor = 120d (see Table on slide 110) MOV AL,120; LSB of divisorOUT LSB,ALMOV AL,0; MS Byte of divisorOUT MSB,ALMOV AL,00001010B;program 7 bit data, oddOUT LINE,AL;parity, 1 stop bit ;(& disable baud rate programming?)MOV AL,00000111B;enable transmitter and receiverOUT FIFO,AL;by writing into the FIFO control Reg.RETINITENDPMust write this into FIFO Registerto enable communicationand operation dialog programming*

  • 16550 FIFO Control Register (Write)111I/O Address: A2 A1 A0 = 010Required to enableactual communication(Operation Dialog)*

  • 16550 Line Status Register (LSTAT)I/O Address: A2 A1 A0 = 101Before writing datafor transmission, Ensure TX is ready to take it [TH (bit 5) = 1]Before reading datafrom receiver, ensureRX has data [DR (bit 1) = 1]Error status bitsAny being 1 indicatesAn errorb. OperationDialogProgramming*

  • *

  • D/A and A/D ConvertersInterfacing with 8086*

  • Digital to Analog (D/A) ConvertersD/A converter converts the binary word into corresponding Voltage or Current.The DAC is used in applications Digitally controlled gains, Motor speed controls, Programmable gain amplifiers.Compact Disc Audio & Video Players.*

  • Op-Amp D/A Converter (DAC)This DAC is based on summing point Op-amp.The output analog voltage generated is proportional to the binary value of the input digital voltage.The Binary weighted Resistors Produce Binary currents which are summed by the Op-amp to produce a proportional output voltage.4-bit DAC*

  • MC1408 : 8-bit D/A converterThe MC1408-8 is an 8-bit monolithic digital-to-analog converter which provides High-speed performance Low cost. Resolution: 1 part in 256.The output current is a linear product of an 8-bit digital word and an analog reference voltage.

    *

  • MC1408 Block diagram*

  • MC1408 DescriptionThe MC1408-8 consists:8 high-speed current switches:The switches are non-inverting in operation. A high state on the input turns on the specified output current component.R-2R ladder:The R-2R ladder divides the reference amplifier current into binary-related components, These are fed to the remainder current which is equal to the least significant bit. The maximum output current is 255/256 of the reference amplifier current.*

  • MC1408 DescriptionReference current amplifier:The reference voltage source supplies the full reference current through R14 resistor for Reference current amplifier

    Typical Performance Characteristics:

    *

  • Instruction Timing and Delay LoopsThe rate at which an instruction is determined by the Processor Clock.For 8086, the Clock frequency is 5 MHz and the Clock cycle takes 0.2us.Each Instruction takes some time for Execution.Examples:MOV AX,BX takes two clock cycles (0.4us).DAA takes four clock cycles (0.8us).*

  • Calculation of Delay LoopWhen a delay need to be inserted in a program, Initialize CX register according to delay time.LOOP instruction be used to produce the Delay.NOP can be used in between the Loop.Calculation:Calculate the clock cycles for each instruction inside and outside the loop.Find the no. of clock cycles according to delay time and processor clock.Equate these two values to obtain the CX initialize value.*

  • A/D ConverterA/D Converter produces digital word which represents the magnitude of analog voltage or current.Specifications:ResolutionAccuracy:The difference between a measurement reading and the true value of that measurementLinearityConversion Time :The Conversion Time of A/D Converter is more than D/A converter.

    *

  • Parallel Comparator A/D Converter*

  • Parallel Comparator A/D ConverterIt is a N-bit Flash ADC using Parallel Comparators.The Voltage divider sets the reference voltages on the inverting inputs of the comparator.If the Vin applied to non-inverting terminal is more than the Vref at the inverting terminal, then Vout is High and Vice-versa.The Comparator output is given Encoder to produce actual digital word.Advantage:Less Conversion time : Propagation delay of Comparators.Disadvantage:Low Resolution : No. of Comparators (2n-1) required are more.*

  • Dual Slope A/D Converter*

  • Dual Slope A/D ConverterWhen Control switch is towards the input positive Voltage, The capacitor charges linearly with rate of Vin/RC for fixed timeProduces a negative, variable-slope ramp. Comparator Output is High.And gate enables 1 MHz clock into counter chain with fixed counts.After fixed time, the Control switch is towards the negative reference Voltage.Resets the counter values to zero.The capacitor then discharges linearly with rate of Vref/RC for variable timeProduces a positive, fixed-slope ramp.

    *

  • Dual Slope A/D ConverterWhen Output voltage crosses 0v, Comparator Output is Low.And gate disables 1 MHz clock into counter chain.Then the counter runs, yielding a count proportional to the input voltage. This method is commonly used with voltmeters and other test equipment.Advantages:Higher resolutionHigher accuracyLower costGood noise immunityDisadvantages:Slow Conversion Time

    *

  • Successive Approximation ADC*

  • Successive Approximation ADCThis ADC is the most commonly used in many applications.Successive Approximation ADC Components:D/A converterComparatorSuccess-approximation register.Conversion Process:The bits of the D/A converter are enabled one at a time, starting with the MSB.As each bit is enabled, the comparator produces an output. It indicates whether the analog input voltage is greater or less than the output of the D/A converter.

    *

  • Successive Approximation ADCIf the D/A output is greater than the analog input, the comparator output is LOW and the bit is set LOW. If the D/A output is less than the analog input, the comparator output is HIGH and the bit is set HIGH.This process is repeated for each bit.PropertiesReliableCapable of high speedConversion time is clock rate times number of bits.*

  • Generic 4-bit Successive- Approximation ADC*

  • Summary of Convert Types*

  • Interfacing different A/D ConvertersParallel Comparator A/D Converter:The A/D conversion is much faster than a processor could read them.So, DMA (Direct Memory Access) is used to store directly the output into memory irrespective of the processor.Dual Slope A/D Converter:Processor reads the digital output by polling method.It polls the bit corresponding to strobe line.When it is high, processor puts the data into memory.This polling process is repeated until all the data is transferred.

    *

  • Interfacing different A/D ConvertersSuccessive Approximation ADC:Before the A/D conversion starts The Microprocessor sends SOC (Start of Conversion) signal to ADC.After the conversion is over, The ADC sends EOC (End of Conversion) signal The result is ready at the output buffer of the ADC.Conversion Delay of the ADC.The time taken by the ADC from the active edge of SOC pulse till the active edge of EOC signalThese tasks are carried out by the Microprocessor using 8255 I/O ports.*

  • A/D Converter - ADC 0808ADC 0808 is a 8-bit CMOS, Successive Approximation A/D Converter.The conversion delay is 100s at a clock frequency of 640 KHz.It has a 3:8 analog multiplexer At a time, eight different analog conversions by using 3 address lines.The microprocessor may drive these lines using output port lines in case of multi-channel applications.It is a Uni-polar analog to digital converterthey are able to convert only positive analog input voltage to their digital equivalent.

    *

  • ADC 0808 Block Diagram*

  • Interfacing ADC 0808 with 8086*

    ******************************************************************************