Kinetis L Series

TM

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire,

ColdFire+, C-Ware, the Energy Efficient Solutions logo, Kinetis, mobileGT, PowerQUICC,

Processor Expert, QorIQ, Qorivva, StarCore, Symphony and VortiQa are trademarks of

Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack,

CoreNet, Flexis, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine,

Ready Play, SafeAssure, the SafeAssure logo, SMARTMOS, TurboLink, Vybrid and

Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service

names are the property of their respective owners. 2012 Freescale Semiconductor, Inc.

powered by

ARM Cortex-M0+ Processors

Kinetis L Series

2 TM

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, ColdFire+, C-Ware, the Energy Efficient Solutions logo, Kinetis,

mobileGT, PowerQUICC, Processor Expert, QorIQ, Qorivva, StarCore, Symphony and VortiQa are trademarks of Freescale Semiconductor, Inc.,

Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, CoreNet, Flexis, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine,

Ready Play, SafeAssure, the SafeAssure logo, SMARTMOS, TurboLink, Vybrid and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All

other product or service names are the property of their respective owners. 2012 Freescale Semiconductor, Inc.

powered by

ARM Cortex-M0+ ARM Cortex-M4(F)

3 TM






Real-time, highly integrated

solutions with best-in-class

2D graphics to enable

your system to control,

interface, connect,

secure and scale.

Industrys most versatile solutions for multimedia and

display applications, with

multicore scalability and

market-leading power,

performance & integration.

Industrys most scalable ultra-low-power, mixed-

signal MCU solutions

based on the ARM

Cortex-M4 and Cortex-M0+ architectures.

Industrys first software-aware, core-agnostic

networking system

architecture for the smarter,

more capable networks of

tomorrow end to end.

Consumer

Automotive

Industrial

Consumer

Industrial

Consumer

Automotive

Industrial

Networking

Kinetis

Microcontrollers Design Potential. Realized

Vybrid

Controller

Solutions Rich Apps in Real Time.

i.MX

Application

Processors Your Interface to the World.

QorIQ Processors

built on Layerscape

Architecture Accelerating the Networks IQ

Freescale has the industrys broadest range of solutions built on ARM technology for automotive, industrial, consumer and networking applications. Find your ideal solution at the price, performance and power level you desire, and leverage

the extensive software and tool bundles available to speed and ease your design process.

Industrial

4 TM






Kinetis K Series Kinetis L Series

ARM Cortex-M0+ ARM Cortex-M4 ( with optional SPFPU )

Processor

Typical ~50uA/MHz

( VLPR Mode )

Typical ~200uA/MHz

( VLPR Mode ) Ultra Low Power

8kB 256kB Flash 1kB 32kB SRAM

32kB 1MB Flash 8kB 128kB SRAM

Memory

16 121 Pin 32 256 Pin Pin-Count

Baseline / Mixed-Signal

and optional

Segment LCD,

USB

Baseline / Mixed-Signal

and optional

FlexMemory, USB,

Segment LCD, CAN,

Ethernet, Graphic LCD,

DRAM-CTRL, NAND-Flash-

CTRL, Crypto, Anti-Tamper

Features

From $0.49

( MKL02x, 8KB, 16QFN )

From $0.99

( MK10x, 32KB, 32QFN ) Price

Up to

48MHz

Up to

50 / 72 / 100 / 120 / 150MHz Performance

www.freescale.com/FREEDOM

www.freescale.com/TOWER Demo Board

www.freescale.com/KINETIS Note: Availability

device dependent

Freescale free

RTOS called MQX www.freescale.com/MQX

including USB /

Ethernet / MS File

System /

Peripherals Driver MQX-Lite

+USB and Peripherals

Drivers (also within Processor

Expert Code Generator)

5 TM






Feature rich

Easy-to-use

Increased control

Sleek design

Extended battery life

Kinetis L Series MCUs powered by

ARM Cortex-M0+ Processors

Sensor

Motor

HMI

Medical

Data Logger Communication

Industrial IO

Instrumentation

6 TM






+ -

sin log n

x

n

Scalable, reusable platforms with

modern software techniques/$

Unique platforms,

MCU dependent/$$$

Broad MCU portfolios,

multi-source

Limited choice,

single-source

32-bit MCU 8/16-bit MCU

Maximum

energy-efficiency

(CoreMark/mW)

Ultra low sleep/

power-down

currents

Connectivity

User Interface

Power

Consumption

Computation

Software/Cost

of Ownership

Scalability

7 TM






http://www.youtube.com/watch?v=cbEx-vY9GSk

8 TM






MCU Enablement Bundle

Operating Voltage: 1.71Volt to 3.6Volt

Operating Temperature: -40C to +105C

ARM Cortex-M0+ Core 48MHz, 1.77 CoreMark/MHz,

2-Stage Pipeline, 1-Cycle GPIO,

Micro Trace Buffer

System Asynchronous DMA

Bit Manipulation Engine

Cross Bar Switch

90nm TFS Memory Low-power, high-reliability

8-256KB Flash

1-32KB SRAM

Energy Management Clock & Power Gating, LVD

RUN/WAIT/STOP modes

9 TM






High End MCU Low Cost MCU FPGA

ARM Cortex-M4(F)

ARM Cortex-M3

ARM Cortex-M0

ARM Cortex-M0+

Kinetis K Series

Kinetis L Series

ARM Cortex-M1

High End MCU Low Cost MCU FPGA

Perf

orm

an

ce / F

un

cti

on

ality

11 TM






ARM Cortex-M0+ Whats the + stand for?

Processor consumption as low as 9A/MHz 30% power reduction from Cortex-M0 56% increased energy efficiency from Cortex-M0

Outstanding result of 1.77 CoreMark/MHz 2 to 40 times higher performance compared to 8/16-bit architectures

including TI MSP430, Microchip PIC18 & PIC24, and Atmel ATXmega

9% increased performance from Cortex-M0

ARMv6-M architecture, NVIC, etc Single-cycle fast I/O access port facilitates

bit-banging and software protocol emulation,

keeping an 8-bit look and feel Up to 50% faster than normal I/O

Micro Trace Buffer (MTB) for faster debug Interrupt latency decreased by 1 cycle Single-cycle 32b x 32b multiply instruction Re-locatable Vector Table

Ultra Low Power embedded systems or mixed signals devices

Enhanced

Enhanced Enhanced

Enhanced

Enhanced

New

New

12 TM







27

42.14

18.6

10.09

5.29 6.04

0

5

10

15

20

25

30

35

40

45

Cortex-M0 Cortex-M0+ A (16-bit) B (16-bit) C (8-bit) D (8/16-bit)

Processor

Energy Efficiency

in CoreMark/mA x 2.25

Most energy-efficient 32-bit processor on the market.

Power reduction

leading to consumption

as low as 9uA/MHz

(core only)

2-stage pipeline

improving energy

efficiency with

increased

throughput/mA

Interrupt latency

decreased by 1 cycle

Increased performance

with CoreMark/MHz

raised to 1.77

13 TM







Decreasing

interrupt

latency by

1 cycle

Enhanced

Reduced 2 stage

pipeline

14 TM






4,896

6,446

10,206 10,066

5,418

0

2,000

4,000

6,000

8,000

10,000

12,000

Corex-M0+ A (16-bit) B (16-bit) C (8-bit) D (8/16-bit)


CoreMark Code in kB

CoreMark code compiled optimized for

size. Same MCUs as for CoreMark/mA

benchmark.

48cycles*, 48Byte Code Size

8cycles,

8Byte Code Size

1 cycle

2 Byte Code Size

*8051 needs at

least 1cycle per

instruction byte

fetch as they only

have an 8-bit

interface

16-bit Multiplication Example

15 TM






0

10

20

30

40

50

60

40nm 90nm

180nm

3

11

52

42

1 0

uW for

minimal

configuration Static Dynamic

Optimizing consumption

Gate count optimized, starting 12kGate

Reduced accesses to the program memory

Dynamic Power scales well with process

But beware of static consumption

90nm is a good trade-off

Save precious runtime cycle:

32-bit processing capability

Shorter 2-stage pipeline:

faster non-sequential accesses

Kinetis L Series Technology

Kinetis

MCUs

Best trade-off between static

and dynamic power

consumption.

17 TM






Kinetis L Series Technology / Power Modes

Mode Definition

Run

MCU can be run at full speed. Supports Compute Operation clocking option where bus and system

clock are disabled for lowest power core processing and energy-saving peripherals with an alternate

asynchronous clock source are operational.

VLP Run

(VLPR)

MCU maximum frequency is restricted to 4MHz core/platform and 1 MHz bus/flash clock. Supports

Compute Operation clocking option. LVD protection is off and flash programming is disallowed.

Wait Allows all peripherals to function, while CPU goes to sleep reducing power consumption. No Compute

Operation clocking option.

VLP Wait

(VLPW) Similar to VLP Run, with CPU in sleep to further reduce power. No Compute Operation clocking option.

Stop

MCU is in static state with LVD protection on. Energy-saving peripherals are operational with

Asynchronous DMA (ADMA) feature that can wake-up DMA to perform transfer and return to current

mode when complete. AWIC detects wake-up source for CPU. Lowest power mode with option to keep

PLL active. Partial stop clocking options for more peripheral functionality available.

VLP Stop

(VLPS)

MCU is in static state with LVD protection off. Energy-saving peripherals are operational with ADMA

feature. AWIC detects wake-up source for CPU.

LL Stop

(LLS)

MCU is in low leakage state retention power mode. LLWU detects wake-up source for CPU including

LPTMR, RTC, TSI, CMP, and select pin interrupts. Fast

18 TM






Kinetis L Series Technology / Power Modes

Mode CPU/Bus

Freq. Details

Peripheral

Clocks

Typical Idd

@ 3V, 25C

Recovery

Time

RUN

48/24 MHz

MAXIMUM CPU/Bus frequency.

Compute clocking option SUPPORTED

ENABLED 6.38mA (133uA/MHz) -

48/24 MHz DISABLED 4.44mA (93uA/MHz) -

48/- MHz Compute

Operation* 3.98mA (83uA/MHz) -

VLPR

4/1 MHz

RESTRICTED CPU/Bus frequency.

Compute clocking option SUPPORTED

LVD OFF. Flash programming NOT supported

ENABLED 219uA (55uA/MHz) -

4/1 MHz DISABLED 170uA (43uA/MHz) -

4/- MHz Compute

Operation* 156uA (39uA/MHz) -

WAIT 48/24 MHz MAXIMUM CPU/Bus frequency. CPU in SLEEP, peripherals functional.

Compute clocking option NOT supported DISABLED 3.88mA -

VLPW 4/1 MHz RESTRICTED CPU/Bus frequency. CPU in SLEEP, peripherals functional.

Compute clocking option NOT supported.

LVD OFF. Flash programming NOT supported

DISABLED 112uA 4us

STOP - MCU in static state, LVD ON. Energy-saving peripherals functional with ADMA.

AWIC detects wake-up source for CPU. - 309uA 4.3us

VLPS - Same as STOP mode. LVD OFF. - 2379nA 4.3us

LLS - MCU in low-leakage state retention power mode. LLWU detects wake-up source for

CPU including LPTMR, RTC, TSI, CMP, and select pin interrupts. Fast wake-up. - 1738nA 4.6us

VLLS3 - MCU in low-leakage mode, most internal logic OFF. All RAM contents retained and

I/O states held. LLWU controls wake-up source for CPU similar to LLS mode. - 1344nA 53us

VLLS1 - Similar to VLLS3 - 713nA 115us

VLLS0 - Pin wakeup supported. LPTMR, RTC, TSI and CMP wake-up supported with external

clock. Optional POR brown-out detection circuitry. -

411nA (POR) /

205nA (no POR) 115us

*Compute Operation shuts off bus and system clock for lowest power core processing. Peripherals with an alternate asynchronous clock source can continue to operate.

Note: device dependent

AW

IC

LLW

U

19 TM






Note: Availability device dependent

Kinetis L Series AWIC and LLWU

Wake-up source Description

Available system resets RESET pin when LPO is its clock source

Low-voltage detect Power management controller - functional in Stop mode

Low-voltage warning Power management controller - functional in Stop mode

Pin interrupts Port control module - any enabled pin

ADC The ADC is functional when using internal clock source

CMP0 Interrupt in normal or trigger mode

I2C Address match wakeup

UART0 Any interrupt provided clock remains enabled

UART1 and UART2 Active edge on RXD

RTC Alarm or seconds interrupt

TSI Any interrupt

NMI NMI pin

TPMx Any interrupt provided clock remains enabled

LPTMR Any interrupt provided clock remains enabled

SPI Slave mode interrupt

Asynchronous

Wake-up

Interrupt

Controller

Multiple

wake-

sources

selectable

20 TM







Kinetis L Series AWIC and LLWU

Wake-up source

PTB0

PTC1

PTC3

PTC4

PTC5

PTC6

PTD4

PTD6

LPTMR0

CMP0

TSI0

RTC Alarm

RTC Seconds

The LLWU

implements

optional 3-

cycle glitch

filters, based

on the LPO

clock.

Low

Leakage

Wake-up

Unit

21 TM






Kinetis L Series Technology / Clock

Internal RC OSCs

FLL

External

Clock

Input

32 kHz to

40 kHz or

3 MHz to

32 MHz

crystal

RTC RTC Output

Power Management

Low Voltage

Detection, POR

Power- and

Clock Gating

Low Power Boot

configure reset time to eliminate

power spikes

Note:

Availability

device

dependent

PLL

1kHz

LPO

22 TM






Kinetis L Series Technology / System

Bit

Manipulation

Engine

Crossbar

ARM

Cortex-M0+

and NVIC

Flash

Memory

Controller

Rapid

GPIOs

(Fast IO)

SRAM

Asynchronous

Direct

Memory

Access

Support

concurrent

access from

Master (Core

and DMA) to

Slaves

(Memory and

Peripherals)

Support

concurrent

access from

Master (Core

and DMA) to

Slaves

(Memory and

Peripherals)

Speculation pre-fetch and

4-Way by 4-set x 32-bit

for a total of 64bytes

Support

decorate

load and

store

Up to

50%

faster

than

normal

I/O

Vector re-location

provide 0 wait

state access

times when hit Note: Availability

device dependent

MTB

Micro-Trace buffer is

an efficient way of

expanding debug

capabilities

23 TM







Kinetis L Series SWD & MTB

SWD Serial Wire Debug

ARM Implementation:

2 wire debug interface low cost trace solution information is read back

over serial wire interface

Stores change of flow information is

a user defined area of system RAM

Address branched from Address branched to Encodes cause of the branch

(exception/instruction)

Debugger can read back the trace packets and

recreate an instruction by instruction trace.

Can be configured either by application code or by the debugger

Tracing can be halted when the buffer is full or can be allowed to wrap

Watch points offer trace start/stop based on address or data value

MTB Macro-Trace Buffer

Micro-Trace buffer is an efficient way of expanding debug capabilities

New to the ARM Cortex M0+

When enabled, the MTB records changes in program

flow (branches and interrupts) reported by the processor

into a configurable region of the SRAM.

Subsequently either an on-chip or off-chip debugger may

extract the trace information which would allow

reconstruction of an instruction flow.

MTB

Low cost

and pin

count

Fasten your

development

24 TM







Kinetis L Series Bit Manipulation Engine (BME)

Provides hardware support for atomic read-modify-write operations to the

peripheral address space.

Uses "decorated storage as a means for providing additional semantics for load and store operations.

decoration is additional information encoded into the peripheral address used to reference the peripheral memory space.

GPIOA_PDOR ^= 0x02; // Logical XOR

0000005E 0x.... LDR R0,??DataTable6_5 ;; 0x400ff000

00000060 0x6800 LDR R0,[R0, #+0]

00000062 0x2102 MOVS R1,#+2

00000064 0x4041 EORS R1,R1,R0

00000066 0x.... LDR R0,??DataTable6_5 ;; 0x400ff000

00000068 0x6001 STR R1,[R0, #+0]

Uses 12 Bytes

BME

25 TM







Kinetis L Series Bit Manipulation Engine (BME)

Provides hardware support for atomic read-modify-write operations to the

peripheral address space.

Uses "decorated storage as a means for providing additional semantics for load and store operations.

decoration is additional information encoded into the peripheral address used to reference the peripheral memory space. AND OR XOR Bit Field Insert (BFI) Decorated Loads Load and Clear One Bit (LAC1) Load and Set One Bit (LAS1) Unsigned Bit Field Extract (UBFX)

// Macro used to generate hardcoded XOR address

#define BME_XOR_ADDR(ADDR) (*(volatile uint32_t

*)(((uint32_t)ADDR) | (3

26 TM






Kinetis L Series Energy Saving Peripherals (1)

Peripheral Low Power Functionality

DMA

Allows energy-saving peripherals (ex. ADC, UART and Timer/PWM) to trigger asynchronous

DMA request in STOP/VLPS modes to perform DMA transfer and return to current power

mode with no CPU intervention

UART

Supports asynchronous transmit and receive operations to the bus clock supporting

communication down to STOP/VLPS modes. Configurable receiver baud rate oversampling

ratio from 4x to 32x allowing higher baud rates with lower clock sources

SPI Supports slave mode address match wake-up function and first message capture down to

STOP/VLPS modes

I2C Supports multiple address match wake-up function down to STOP/VLPS modes

USB Supports asynchronous wakeup on resume signaling down to STOP/VLPS

LPTPM

(Timer/PWM)

Supports 16-bit timer input capture, output compare and PWM functions down to

STOP/VLPS modes

LPTMR

(Timer/Pulse

Counter)

Supports 16-bit timer and pulse counter functions in all power modes

RTC Supports 32-bit seconds counter with seconds interrupt and programmable alarm in all power

modes with include temperature and voltage compensation

Intelligent peripherals increasing time in deep sleep modes with no CPU


27 TM






Kinetis L Series Energy Saving Peripherals (2)

Intelligent peripherals increasing time in deep sleep modes with no CPU

Peripheral Low Power Functionality

ADC Supports single conversions in multiple result registers down to STOP/VLPS modes with

hardware averaging and automatic compare modes

CMP (Analog

Comparator)

Supports threshold crossing detection in all power modes along with a triggered compare

mode for lower average power compares

DAC Supports static reference in all power modes

Segment

LCD Supports alternate displays and blink capability in all power modes

TSI

(Capacitive

Touch Sense

Interface)

Supports wake-on capacitive touch on single channel in all power modes


28 TM







Kinetis L Series asynchronous DMA (aDMA)

Inter-module-connection with aDMA

Peripheral Wakeup source

Touch Sense

Interface

End of scan

Scan out of range

CMP Compare detected

I2S Receive data ready

Transmit data needed

LPUART Receive data ready

Transmit data needed

LPTPM Compare/capture detected

Counter overflow

Port Control

and Interrupts External edge detected

ADC Conversion complete

Kinetis L-Series devices support DMA operation in low power modes

Stop modes can be entered with the System Clock enabled

Allows peripherals with STOP mode functionality to trigger asynchronous DMA

request

The MCU will wake from STOP mode to WAIT, process the DMA request and then re-

enter the STOP mode with no CPU

intervention

The MCU can be placed in a Compute mode with peripherals configured for STOP.

In this mode, the CPU can continue to

process data at very low dynamic power

Peripherals with STOP mode functionality

can continue to operate and trigger DMA

transfers

Use Case: ADC performing conversions, DMA transferring

conversion results into RAM buffer and CPU processing/filtering

the data all done with minimal power ~ 300uA at 4MHz Core speed

29 TM






12-bit / 16-bit SAR Up 4 pairs of differential (DP)

and 24 single-ended (SE) inputs

Output modes: DP: up to 16-bit, 13-bit, 11-bit, 9-bit SE: up to 16-bit, 12-bit, 10-bit, 8-bit

Single or continuous conversion Hardware averaging Configurable sample time conversion speed/power conversion and average

complete flag / interrupt

4 input clock sources operation in Low-Power modes

Automatic compare with interrupt for less-than, greater-than or equal-to, within

range, or out-of-range, programmable

value

Selectable voltage reference Temperature sensor Self-Calibration mode


Kinetis L Series

CPU offload

Reduce # of

interrupts

CPU offload

Reduce # of

interrupts

30 TM






Kinetis L Series

Operational over the entire supply range Programmable hysteresis control Selectable interrupt: on rising-edge falling-edge or both rising or falling edges

Selectable inversion on comparator output

Two software selectable performance levels

higher power: short propagation delay low power: longer propagation delay

DMA transfer support

Internal 6-bit DAC as comparator reference


Embedded

6-bit DAC

Integration

CMP_OUT

31 TM






Kinetis L Series

12-bit resolutions guaranteed monotonic On-chip programmable reference

generator output, 14096 Vin to Vin and step 14096 Vin

Vin can be selected from two reference sources

2-word data buffer Hardware or software triggering DMA support


Data buffer

can be

configured to

operate in

Normal

mode, Swing

mode, or

One-Time

Scan mode

Supports static

reference in all

power modes

32 TM






Kinetis L Series

Up to 6ch and 2ch 16-bit Timer Clock source selectable Prescaler 1, 2, 4, 8, 16, 32, 64, or 128 Can increment on every edge of the

asynchronous counter clock

Can increment on rising edge of an external clock input synchronized to the

asynchronous counter clock

Free-running counter or modulo counter Counting can be up or up-down Can be configured for input capture,

output compare, or edge-/center-aligned

PWM mode

Input capture mode the capture can occur on rising edges, falling edges or

both edges

Output compare mode the output signal can be set, cleared, pulsed, or toggled

on match

Interrupt and/or DMA request per channel

Support module interconnect trigger


Measure

and

control

33 TM






Kinetis L Series

2ch 32-bit Independent timeout periods for each

channel

Generate triggers at periodic intervals, when enabled (single shot, continues)

Can trigger aDMA Can generate interrupts


Reduce

interrupts

and cycles

offload CPU

34 TM






Kinetis L Series

LPTMR

16-bit Timer / Pulse Counter Prescaler for clock source Configurable input source for pulse

counter (rising-edge or falling-edge)

Support for glitch filtering Supports free-running mode

or reset on compare

Hardware trigger output Interrupt can generate asynchronous

wakeup from any low-power mode


Real Time Clock (RTC)

32-bit seconds counter with roll-over protection and 32-bit alarm

16-bit prescaler with compensation that can correct errors between 0.12 ppm and

3906 ppm

Register write protection Lock register requires POR or software

reset to enable write access

1 Hz square wave output

Pulse

Counter

35 TM






Kinetis L Series


USB

USB 1.1 and USB 2.0 compliant Low- and full-speed device controller On-The-Go protocol logic Supports On-The-Go (OTG) Host Device

16 bidirectional end points DMA or FIFO data stream interfaces Low-power consumption

USB Voltage Regulator

The USB Voltage Regulator

module is a LDO linear voltage

regulator to provide 3.3V

power from an input power

supply varying from 2.7 V to 5.5

V. It consists of one 3.3 V

power channel. When the input

power supply is below 3.6 V, the

regulator goes to pass through

mode.

Low drop-out linear voltage regulator with one power channel (3.3V) voltage: 300 mV

Output current: 120 mA. 3 power modes: RUN, STANDBY and SHUTDOWN Low quiescent current in RUN mode (typ. 120uA) Very low quiescent current in STANDBY mode (typ. 1

uA)

Automatic current limiting (290mA) Automatic power-up Pass-through mode for regulator (input voltages

36 TM






Kinetis L Series

Operation in Master or Slave mode Modes: Full-duplex Single-wire bidirectional

Programmable transmit bit rate Double-buffered TX and RX data register Serial clock phase and polarity options Slave select output Mode fault error flag with CPU interrupt Selectable shifting MSB-first LSB-first

Programmable 8- or 16-bit data transmission length

Hardware match feature on receive 64-bit FIFO mode for high speed/large

amounts of data transfers

Support transmission of both Transmit and Receive by DMA


Flexibility

37 TM






Kinetis L Series

Compatible with The I2C-Bus Specification Support for System Management Bus

(SMBus) Specification, version 2

Multimaster operation Software programmable for one of 64

different serial clock frequencies

Software-selectable acknowledge bit Interrupt-driven byte-by-byte data transfer Arbitration-lost interrupt with automatic

mode switching from master to slave

Calling address identification interrupt START / STOP signal generation/detection Repeated START signal

generation/detection

Acknowledge bit generation and detection Bus busy detection General call recognition 10-bit address extension Programmable glitch input filter Wakeup on slave address match Range slave address support DMA support


SMBus

38 TM






Kinetis L Series

Full-duplex, standard non-return-to-zero (NRZ) format

Double-buffered transmitter and receiver with separate enables

Programmable baud rates (13-bit modulo div.) Interrupt-driven or polled operation: Transmit data register empty

and transmission complete

Receive data register full Receive overrun, parity error,

framing error, and noise error

Idle receiver detect Active edge on receive pin Break detect supporting LIN

Hardware parity generation and checking Programmable

8-bit or 9-bit character length 1-bit or 2-bit stop bits

Receiver wakeup by idle-line or address-mark Optional 13-bit break character generation / 11-bit break character detection Selectable transmitter output polarity 5-channel DMA interface (on UART1 and UART2)


UART0 supports

4x to 32x over

sampling ratio

Support

for LIN

39 TM






Transmitter with independent bit clock and frame sync supporting

1 data channel

Receiver with independent bit clock and frame sync supporting

1 data channel

Maximum Frame Size of 2 words Word size of between 8-bits and

32-bits

Word size configured separately for first word and remaining

words in frame

Asynchronous 1 32-bit FIFO for each transmit and receive

channel

Supports graceful restart after FIFO error


Kinetis L Series

Perfect for

audio data

transfer /

applications

40 TM






Kinetis L Series

Support up to 16 electrodes Configurable up to 4096 scan times Configurable software or hardware scan

trigger

Internal reference oscillator for high-accuracy measurement

Compensate for temperature and supply voltage variations

High sensitivity change with 16-bit resolution register

Capability to wake MCU from low power modes

Support DMA data transfer

Fully supported by touch sensing library www.freescale.com/TSS


Free API

Avoid high cost/ high power consumption ! GPIO & Software method requires ext. components,

not low power (needs CPU) ,

offer poor noise immunity

External ASIC method cost of external component, increased PCB space

41 TM






Kinetis L Series

Up to 64 LCD pins Selectable front plane/back plane Up to 63 front plane signals Up to 8 back plane signals

Programmable LCD frame frequency Blink modes and frequency LCD duty cycle from static to 1/8 LCD power supply switch

(ext. VLL3 power supply option)

All segments blank during blink period Blink operation in low-power modes Internal charge pump (LCD bias

voltages, requires only 4 external capacitors)

Internal regulated voltage source with a 4-bit trim register (contrast control)

Waveform storage registers (WF) Back plane reassignment to assist in

vertical scrolling on dot-matrix displays

Low power consumption Support for segment fault detection


Ideal for

battery

powered

applications

Reduced BOM

LCD display fault detect circuit (LFD)

Most failures, where an LCD segment is

either unexpectedly on or off, result in

erroneous information that can mislead.

LFD function finds faults in the LCD

display, display connector, and board

connections between the MCU and the

display.

42 TM






Kinetis L Series

Reducing the gray area under the energy curve.

Very Low Active

and Standby

Power Consumption

Energy

Saving

Peripherals

Reduced

Processing

Time

Po

wer

Initialization Collect Data Compute

(Deep) Sleep Mode

EN

ER

GY

SA

VIN

GS

Ultra-low

Standby

Current

Ultra-low

Active Current

(Deep) Sleep Mode (Deep) Sleep Mode

43 TM






Kinetis L Series

http://www.youtube.com/watch?v=FfsMCwUjNxw

44 TM






Kinetis L Series Family

Common Features

System

ARM Cortex-M0+ Core, 48MHz

Multiple low-power modes & peripherals,

low-power Boot, Clock Gating

1.71-3.6V, -40 to 105C [1]

Memory

90nm TFS Flash, SRAM

Internal Memory Security/Protection

Analog Peripherals

12/16-Bit ADC, 12-bit DAC

High-Speed Comparator

Serial Interfaces

UART (Including 1 LPUART)

SPI, IIC

Timers

Real Time Clock [2]

16bit Low Power TPMs (GP Timer/PWM)

Low Power Timers

32bit Periodic Interrupt Timer

Optional Features

Family Flash SRAM Pin

Count

Key Features

USB

OTG

Seg

LCD DMA ADC DAC I2S TSI

[1] Feature not available on CSP packages

[2] For KL02, use software to support

KL05 8-32KB 1-4KB 24-48 Y 12-bit 12-bit Y

KL04 8-32KB 1-4KB 24-48 Y 12-bit

KL02 8-32KB 1-4KB 16-32 12-bit

KL26 128-256KB 16-32KB 64-121 Y Y 16-bit 12-bit Y Y

KL25 32-128KB 4-16KB 32-80 Y Y 16-bit 12-bit Y

KL24 32-64KB 4-8KB 32-80 Y Y 12-bit

KL16 256KB 16-32KB 64-80 Y 16-bit 12-bit Y Y

KL15 32-128KB 4-16KB 32-80 Y 16-bit 12-bit Y

KL14 32-64KB 4-8KB 32-80 Y 12-bit

KL46 128-256KB 16-32KB 64-121 Y Y Y 16-bit 12-bit Y Y

KL36 64-256KB 8-32KB 64-121 Y Y 16-bit 12-bit Y Y

KL34 64KB 8KB 64-100 Y Y 12-bit

45 TM






Kinetis L Series Family

USB + Seg. LCD

KL3x

KL1x KL1x

KL1x KL1x

KL2x KL2x KL2x

KL2x

KL2x KL2x KL2x

KL2x KL2x

KL4x

KL3x

KL4x

KL4x

KL3x

KL4x

KL2x

KL1x

KL2x

KL1x

KL1x

KL1x

KL2x

KL1x KL1x KL1x

KL3x

KL2x

KL3x

KL2x

KL2x

KL1x

KL2x

KL1x

KL1x

Segment LCD

USB

General Purpose

Entry Level

Flash

Memory

128KB

64KB

32KB

16KB

8KB

256KB

KL0x

KL0x

KL0x

KL0x

KL0x

100 LQFP /

121 MBGA 80 LQFP 64 LQFP 48 LQFP

/QFN

32 LQFP

/ QFN 24 QFN 35

WLCSP

KL2x

KL1x

KL0x

KL0x

KL0x

16 QFN

KL0x

KL0x

KL0x

Small Footprint Package

KL3x

20

WLCSP

KL0x

Package

46 TM






Kinetis MCU Series Ecosystem & Enablement

Hardware IDE & Code Generation Run-Time Software &

Product Selector

Freescale Freedom Platform FRDM-KL25Z

www.freescale.com/FRDM-KL25Z Low -cost/power platform for entry-level

developers ($12.95 / 10 SRP) Integrates a fully featured debugger, that

works with all featured tool chains.

Freescale Tower System TWR-KL25Z48M

www.freescale.com/TWR-KL25Z48M Modular, open-source development

platform with reusable peripheral modules

offering connectivity, analog, graphics

LCD and motor control functionality

Freescale MQX Lite RTOS www.freescale.com/mqx

Free, light-weight MQX kernel customised

for small resource MCUs

Packaged as a Processor Expert component

Upwards compatible with MQX RTOS

Solution Advisor www.freescale.com/sa

Web-based interactive MCU selector

Filters for operating characteristics,

packaging, memory configuration &

peripherals. Verifies muxing compatibility

Save, download and print summary reports

and pin muxing configurations

Freescale & 3rd party IDEs Freescale CodeWarrior v10.3: free 64KB

Keil MDK: free 32KB

IAR EWARM: free 32KB

Atollic TrueStudio: free 8KB

GCC ARM Embedded via Launchpad.net

Additional tool support from Code Red

and others in Q412

Freescale Processor Expert

Code Generator Free software generation tool for device

drivers / start-up code

7 steps from project creation to debug dramatically reduces development time

Available within CodeWarrior or as a

standalone plug-in for IAR/Keil/GNU IDEs

GNU

New New

52 TM







Multilink

Universal

Multilink

Universal FX

Cyclone

stand-alone

automated

programmers

Tracelink

J-Link Ultra Segger Flasher

I-jet JTAGjet for

ARM JTAGjet-Trace

for ARM JTAGjet-Trace

for Cortex-M

ULINK2 ULINK Pro

Enablement HW Debugger

53 TM







CodeWarrior IDE or

3rd Party Solutions

(i.e. IAR, KEIL, )

+ Processor Expert

+ Tower System

Processor Module TWR-PROTO

+ +

Peripherals

as a Real-time Monitor, non intrusive

+ MQX RTOS or 3rd Party Solutions

(i.e. Greenhills (-velOSity),

CMX, C/OS-III, Emcraft

Systems (CLinux), FreeRTOS,

SEGGER embOS, Quadros

(RTXC), )

+

Productivity

54 TM







ARM Ecosystem

Easy to use Ready-made Components

Libraries

Tool

chains Stacks

MQX

RTOS

BSP

Teaming up

Productivity

56 TM






+ LCD

K20

K30

K10 K40

+ USB

+ LCD + USB

Kinetis K Series MCUs, ARM Cortex-M4 Processor

Kinetis L Series MCUs, ARM Cortex-M0+ Processor

Freescale Kinetis MCU portfolio

consists of multiple hardware- and

software-compatible devices powered

by ARM Cortex-M4 and ARM Cortex-M0+. Kinetis family concept enable memory and feature

scalability as well as exceptional low power and performance.

All Kinetis MCUs are supported by a comprehensive Freescale

and third-party hardware and software enablement system.

KL0

KL2

KL1 KL4

KL3

+ USB

+ LCD

+ LCD

+ USB

K50

K60

K70

+ Ethernet & Crypto

+ Graphic LCD

+ Measurement

57 TM






K20

K30

Kinetis K Series MCUs, ARM Cortex-M4 Processor

K10

K50

K60

K40

K70

KL1

KL2

KL0

KL4

KL3

Kinetis L Series MCUs, ARM Cortex-M0+ Processor

KM3

+ LCD

+ USB

Baseline

+ Measurement

+ Ethernet & Crypto

+ USB and LCD

+ Graphic LCD

K Series L Series M Series 24-bit

sigma

delta ADC

& PGA

W Series Sub 1-GHz

Radio

S08Px Bridge to MC9S08Px

W Series 2.4 GHz

802.15.4

RF

KW01

KW20

HC9S08

Series 8-bit Core

more to come

MC9S08Px MCUs, proprietary HC9S08 Core

58 TM






Real-time, highly integrated

solutions with best-in-class

2D graphics to enable

your system to control,

interface, connect,

secure and scale.

Industrys most versatile solutions for multimedia and

display applications, with

multicore scalability and

market-leading power,

performance & integration.

Industrys most scalable ultra-low-power, mixed-

signal MCU solutions

based on the ARM

Cortex-M4 and Cortex-M0+ architectures.

Industrys first software-aware, core-agnostic

networking system

architecture for the smarter,

more capable networks of

tomorrow end to end.

Consumer

Automotive

Industrial

Consumer

Industrial

Consumer

Automotive

Industrial

Networking

Kinetis

Microcontrollers Design Potential. Realized

Vybrid

Controller

Solutions Rich Apps in Real Time.

i.MX

Application

Processors Your Interface to the World.

QorIQ Processors

built on Layerscape

Architecture Accelerating the Networks IQ

Freescale has the industrys broadest range of solutions built on ARM technology for automotive, industrial, consumer and networking applications. Find your ideal solution at the price, performance and power level you desire, and leverage

the extensive software and tool bundles available to speed and ease your design process.

Industrial

59 TM






Kinetis MCU Series Solution Advisor

The Solution Advisor helps you

quickly identify best-fit processor

solutions.

Interactive MCU selector guide

based on: Operating characteristics Packaging and memory options A library of configurable

hardware modules

Dynamic, sort able, downloadable

solution matrix

Pin Muxing verification and

suggested placement

Session and Contact Management Save, restore, invite, and share

Generates session summary

reports

www.freescale.com/SolutionAdvisor

60 TM






Energy-efficiency

Class-leading

Coremark/mW

Scalability &

Integration

Kinetis L to K Series

(Cortex M0+ to M4)

Enablement

Freescale bundle +

ARM ecosystem

Ultra Low Static

Documents

Kinetis L Series