LT1182/LT1183/LT1184/LT1184F - CCFL/LCD Contrast Switching ... · CCFL VC Offset Sink Current CCFL VC = 1.5V, Positive Current Measured into Pin –5 5 15 µA ∆CCFL V C Source Current

1

LT1182/LT1183/LT1184/LT1184F

CCFL/LCD ContrastSwitching Regulators

Wide Input Voltage Range: 3V to 30V Low Quiescent Current High Switching Frequency: 200kHz CCFL Switch : 1.25A, LCD Switch: 625mA Grounded or Floating Lamp Configurations Open-Lamp Protection Positive or Negative Contrast Capability

FEATURES DESCRIPTION

U

APPLICATIONSU

The LT®1182/LT1183 are dual current mode switchingregulators that provide the control function for Cold Cath-ode Fluorescent Lighting (CCFL) and Liquid Crystal Display(LCD) Contrast. The LT1184/LT1184F provide only theCCFL function. The ICs include high current, high efficiencyswitches, an oscillator, a reference, output drive logic,control blocks and protection circuitry. The LT1182 per-mits positive or negative voltage LCD contrast operation.The LT1183 permits unipolar contrast operation and pinsout an internal reference. The LT1182/LT1183 supportgrounded and floating lamp configurations. The LT1184Fsupports grounded and floating lamp configurations. TheLT1184 supports only grounded lamp configurations. The

Notebook and Palmtop Computers Portable Instruments Automotive Displays Retail Terminals

90% Efficient Floating CCFL Configuration with Dual Polarity LCD Contrast

TYPICAL APPLICATIONU

, LTC and LT are registered trademarks of Linear Technology Corporation.

C12 2.2µF 35V

BAT 8V TO 28V

POSCON

NEGCON

1182/3 TA01

EITHER NEGCON OR POSCON MUST BE GROUNDED. GROUNDING NEGCON GIVES VARIABLE POSITIVE CONTRAST FROM 10V TO 30V. GROUNDING POSCON GIVES VARIABLE NEGATIVE CONTRAST FROM –10V TO –30V.

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

ICCFL

DIO

CCFL VC

AGND

SHDN

LCD VC

CCFL VSW

BULB

BAT

ROYER

VIN

FBP

FBN

LCD VSW

CCFL PGND

LCD PGND

LT1182

LAMP

UP TO 6mA

10 6

L1

L3

R1 750Ω

L2 100µH

3 2 1 54

+

+

+

ALUMINUM ELECTROLYTIC IS RECOMMENDED FOR C3B WITH AN ESR ≥ 0.5Ω TO PREVENT DAMAGE TO THE LT1182 HIGH-SIDE SENSE RESISTOR DUE TO SURGE CURRENTS AT TURN-ON.

C7, 1µF

C1* 0.068µF

D1 1N5818

D2 1N914

D4 1N914

V (PWM) 0V TO 5V

1kHz PWM

SHUTDOWNC8, 0.68µF

R7, 10K

C5 1000pF

R2 220k

R3 100k

C3A 2.2µF 35V

C11 22µF 35V

R13 8.45k

1%

R14 1.21k

1%

5VR10, 10k, 1%R9, 4.99k, 1%

C4 2.2µF

VIN ≥ 3V

D3 1N5934A 24V

C3B 2.2µF 35V

C2 27pF 3kV

+

C1 MUST BE A LOW LOSS CAPACITOR, C1 = WIMA MKP-20

Q1, Q2 = ZETEX ZTX849 OR ROHM 2SC5001

L1 = COILTRONICS CTX210605

L2 = COILTRONICS CTX100-4


*DO NOT SUBSTITUTE COMPONENTS

COILTRONICS (407) 241-7876

Q2* Q1*

N = 1:2

0µA TO 45µA ICCFL CURRENT GIVES 0mA TO 6mA BULB CURRENT. THIS IS EQUAL TO 0% TO 90% DUTY CYCLE FOR THE PWM SIGNAL.

R12 20k

R5, 43.2k, 1%

C6 2.2µF

R4 46.4k 1%

+

D5 BAT85

C10 0.01µF

R11, 20k, 1%

C9, 0.01µF

2

4

6

9

+

CCFL BACKLIGHT APPLICATION CIRCUITS CONTAINED IN THIS DATA SHEET ARE COVERED BY U.S. PATENT NUMBER 5408162 AND OTHER PATENTS PENDING

2

LT1182/LT1183/LT1184/LT1184F

DESCRIPTION

U

current. An active low shutdown pin typically reduces totalsupply current to 35µA for standby operation. A 200kHzswitching frequency minimizes the size of required mag-netic components. The use of current mode switchingtechniques with cycle-by-cycle limiting gives high reliabil-ity and simple loop frequency compensation. The LT1182/LT1183/LT1184/LT1184F are all available in 16-pin nar-row SO packages.

LT1184/LT1184F pin out the reference for simplified pro-gramming of lamp current.

The LT1182/LT1183/LT1184/LT1184F operate with inputsupply voltages from 3V to 30V. The ICs also have abattery supply voltage pin that operates from 4.5V to 30V.The LT1182/LT1183 draw 9mA typical quiescent currentwhile the LT1184/LT1184F draw 6mA typical quiescent

VIN, BAT, Royer, Bulb .............................................. 30VCCFL VSW, LCD VSW ............................................... 60VShutdown ................................................................. 6VICCFL Input Current .............................................. 10mADIO Input Current (Peak, < 100ms) .................... 100mALT1182: FBP, FBN, LT1183: FB Pin Current ......... ±2mA

ABSOLUTE MAXIMUM RATINGS

W WW U

PACKAGE/ORDER INFORMATION

W UU

TJMAX = 100°C, θJA = 100°C/W TJMAX = 100°C, θJA = 100°C/W

Consult factory for Industrial and Military grade parts

LT1183CS

ORDER PARTNUMBER

TJMAX = 100°C, θJA = 100°C/W TJMAX = 100°C, θJA = 100°C/W

LT1182CS

ORDER PARTNUMBER

LT1184CS

ORDER PARTNUMBER

LT1184FCS

LT1183/LT1184/1184F: REF Pin Source Current .... 1mAJunction Temperature (Note 1) ............................ 100°COperating Ambient Temperature Range ..... 0°C to 100°CStorage Temperature Range ................. –65°C to 150°CLead Temperature (Soldering, 10 sec) .................. 300°C

ORDER PARTNUMBER

TOP VIEW

S PACKAGE 16-LEAD PLASTIC SO

CCFL PGND

ICCFL

DIO

CCFL VC

AGND

SHUTDOWN

LCD VC

LCD PGND

CCFL VSW

BULB

BAT

ROYER

VIN

FBP

FBN

LCD VSW

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

TOP VIEW


CCFL PGND

ICCFL

DIO

CCFL VC

AGND

SHUTDOWN

NC

NC

CCFL VSW

BULB

BAT

NC

VIN

REF

NC

NC

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

TOP VIEW


CCFL PGND

ICCFL

DIO

CCFL VC

AGND

SHUTDOWN

LCD VC

LCD PGND

CCFL VSW

BULB

BAT

ROYER

VIN

REF

FB

LCD VSW

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

TOP VIEW


CCFL PGND

ICCFL

DIO

CCFL VC

AGND

SHUTDOWN

NC

NC

CCFL VSW

BULB

BAT

ROYER

VIN

REF

NC

NC

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

3

LT1182/LT1183/LT1184/LT1184F

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

IQ Supply Current LT1182/LT1183: 3V ≤ VIN ≤ 30V 9 14 mALT1184/LT1184F: 3V ≤ VIN ≤ 30V 6 9.5 mA

ISHDN SHUTDOWN Supply Current SHUTDOWN = 0V, CCFL VC = LCD VC = Open (Note 2) 35 70 µA

SHUTDOWN Input Bias Current SHUTDOWN = 0V, CCFL VC = LCD VC = Open 3 6 µA

SHUTDOWN Threshold Voltage 0.6 0.85 1.2 V

f Switching Frequency Measured at CCFL VSW and LCD VSW, ISW = 50mA, 175 200 225 kHzICCFL = 100µA, CCFL VC = Open, (LT1182) FBN = FBP =1V, (LT1183) FB = 1V, (LT1182/LT1183) LCD VC = Open 160 200 240 kHz

DC(MAX) Maximum Switch Duty Cycle Measured at CCFL VSW and LCD VSW 80 85 % 75 85 %

BV Switch Breakdown Voltage Measured at CCFL VSW and LCD VSW 60 70 V

Switch Leakage Current VSW = 12V, Measured at CCFL VSW and LCD VSW 20 µAVSW = 30V, Measured at CCFL VSW and LCD VSW 40 µA

ICCFL Summing Voltage 3V ≤ VIN ≤ 30V, Measured on LT1182/LT1183 0.41 0.45 0.49 V 0.37 0.45 0.54 V

3V ≤ VIN ≤ 30V, Measured on LT1184/LT1184F 0.425 0.465 0.505 V 0.385 0.465 0.555 V

∆ICCFL Summing Voltage for ICCFL = 0µA to 100µA 5 15 mV∆Input Programming Current

CCFL VC Offset Sink Current CCFL VC = 1.5V, Positive Current Measured into Pin –5 5 15 µA

∆CCFL VC Source Current for ICCFL = 25µA, 50µA, 75µA, 100µA, 4.70 4.95 5.20 µA/µA∆ICCFL Programming Current CCFL VC = 1.5V

CCFL VC to DIO Current Servo Ratio DIO = 5mA out of Pin, Measure IVC at CCFL VC = 1.5V 94 99 104 µA/mA

CCFL VC Low Clamp Voltage VBAT – VBULB = Bulb Protect Servo Voltage 0.1 0.3 V

CCFL VC High Clamp Voltage ICCFL = 100µA 1.7 2.1 2.4 V

CCFL VC Switching Threshold CCFL VSW DC = 0% 0.6 0.95 1.3 V

CCFL High-Side Sense Servo Current ICCFL = 100µA, IVC = 0µA at CCFL VC = 1.5V 0.93 1.00 1.07 A

CCFL High-Side Sense Servo Current BAT = 5V to 30V, ICCFL = 100µA, 0.1 0.16 %/VLine Regulation IVC = 0µA at CCFL VC = 1.5V

CCFL High-Side Sense Supply Current Current Measured into BAT and Royer Pins 50 100 150 µA

Bulb Protect Servo Voltage ICCFL = 100µA, IVC = 0µA at CCFL VC = 1.5V, 6.5 7.0 7.5 VServo Voltage Measured Between BAT and Bulb Pins

Bulb Input Bias Current ICCFL = 100µA, IVC = 0µA at CCFL VC = 1.5V 5 9 µA

ILIM1 CCFL Switch Current Limit Duty Cycle = 50% 1.25 1.9 3.0 ADuty Cycle = 75% (Note 3) 0.9 1.6 2.6 A

VSAT1 CCFL Switch On-Resistance CCFL ISW = 1A 0.6 1.0 Ω ∆IQ Supply Current Increase During CCFL ISW = 1A 20 30 mA/A∆ISW1 CCFL Switch On-Time

VREF Reference Voltage Measured at REF (Pin 11) on LT1183/LT1184/LT1184F 1.224 1.244 1.264 V 1.214 1.244 1.274 V

Reference Output Impedance Measured at REF (Pin 11) on LT1183 20 45 70 ΩMeasured at REF (Pin 11) on LT1184/LT1184F 5 15 30 Ω

ELECTRICAL CHARACTERISTICSTA = 25°C, VIN = 5V, BAT = Royer = Bulb = 12V, ICCFL = SHUTDOWN = CCFL VSW = Open, DIO = GND, CCFL VC = 0.5V,(LT1182/LT1183) LCD VC = 0.5V, LCD VSW = Open, (LT1182) FBN = FBP = GND, (LT1183) FB = GND,(LT1183/LT1184/LT1184F) REF = Open, unless otherwise specified.

4

LT1182/LT1183/LT1184/LT1184F

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

VREF – ICCFL Summing Voltage Measured on LT1183 0.760 0.795 0.830 V 0.725 0.795 0.865 V

VREF – ICCFL Summing Voltage Measured on LT1184/LT1184F 0.740 0.775 0.810 V 0.705 0.775 0.845 V

REF1 LCD FBP/FB Reference Voltage LT1182: Measured at FBP Pin, FBN = 1V, LCD VC = 0.8V 1.224 1.244 1.264 VLT1183: Measured at FB Pin, LCD VC = 0.8V 1.214 1.244 1.274 V

REF1 Voltage Line Regulation 3V ≤ VIN ≤ 30V, LCD VC = 0.8V 0.01 0.03 %/V

FBP/FB Input Bias Current LT1182: FBP = REF1, FBN = 1V, LCD VC = 0.8VLT1183: FB = REF1, LCD VC = 0.8V 0.35 1.0 µA

LCD FBN/FB Offset Voltage LT1182: Measured at FBN Pin, FBP = 0V, LCD VC = 0.8V –20 –12 –4 mVLT1183: Measured at FB Pin, LCD VC = 0.8V –27 –12 –1 mV

Offset Voltage Line Regulation 3V ≤ VIN ≤ 30V, LCD VC = 0.8V 0.01 0.2 %/V

FBN/FB Input Bias Current LT1182: FBN = Offset Voltage, FBP = 0V, LCD VC = 0.8VLT1183: FB = Offset Voltage, LCD VC = 0.8V –3.0 – 1.0 µA

gm FBP/FB to LCD VC Transconductance LT1182: ∆IVC = ±25µA, FBN = 1V 650 900 1150 µmhosLT1183: ∆IVC = ±25µA 500 900 1300 µmhos

FBN/FB to LCD VC Transconductance LT1182: ∆IVC = ±25µA, FBP = GND 550 800 1050 µmhosLT1183: ∆IVC = ±25µA 400 800 1200 µmhos

LCD Error Amplifier Source Current LT1182: FBP = FBN = 1V or 0.25V, 50 100 175 µALT1183: FB = 1V or 0.25V

LCD Error Amplifier Sink Current LT1182: FBP = FBN = 1.5V or –0.25V, 35 100 175 µALT1183: FB = 1.5V or –0.25V

LCD VC Low Clamp Voltage LT1182: FBP = FBN = 1.5V, LT1183: FB = 1.5V 0.01 0.3 V

LCD VC High Clamp Voltage LT1182: FBP = FBN = 1V, LT1183: FB = 1V 1.7 2.0 2.4 V

LCD VC Switching Threshold LT1182: FBP = FBN = 1V, LT1183: FB = 1V, VSW DC = 0% 0.6 0.95 1.3 V

ILIM2 LCD Switch Current Limit Duty Cycle = 50% 0.625 1.00 1.5 ADuty Cycle = 75% (Note 3) 0.400 0.85 1.3 A

VSAT2 LCD Switch On-Resistance LCD ISW = 0.5A 1.0 1.65 Ω ∆IQ Supply Current Increase During LCD ISW = 0.5A 20 30 mA/A∆ISW2 LCD Switch On-Time

Switch Minimum On-Time Measured at CCFL VSW and LCD VSW 0.45 µs

TA = 25°C, VIN = 5V, BAT = Royer = Bulb = 12V, ICCFL = SHUTDOWN = CCFL VSW = Open, DIO = GND, CCFL VC = 0.5V,(LT1182/LT1183) LCD VC = 0.5V, LCD VSW = Open, (LT1182) FBN = FBP = GND, (LT1183) FB = GND,(LT1183/LT1184/LT1184F) REF = Open, unless otherwise specified.

The denotes specifications which apply over the specified operatingtemperature range.Note 1: TJ is calculated from the ambient temperature TA and powerdissipation PD according to the following formula:LT1182CS/LT1183CS/LT1184CS/LT1184FCS: TJ = TA + (PD × 100°C/W)

Note 2: Does not include switch leakage.Note 3: For duty cycles (DC) between 50% and 75%, minimumguaranteed switch current is given by ILIM = 1.4(1.393 – DC) for the CCFLregulator and ILIM = 0.7(1.393 – DC ) for the LCD contrast regulator due tointernal slope compensation circuitry.

5

LT1182/LT1183/LT1184/LT1184F

TEMPERATURE (°C)–75

LCD

DUTY

CYC

LE (%

)

87

91

95

93

89

85

81

77

125 150

LT1182 • G09

83

79

75–25 0–50 25 50 75 100 175


CCFL

DUT

Y CY

CLE

(%)

87

91

95

93

89

85

81

77

125 150

LT1182 • G07

83

79

75–25 0–50 25 50 75 100 175

TYPICAL PERFORMANCE CHARACTERISTICS

UW

LT1184/LT1184F Supply Currentvs Temperature

LT1182/LT1183 Supply Currentvs Temperature

Shutdown Input Bias Currentvs Temperature

TEMPERATURE (°C)

0

SHUT

DOW

N IN

PUT

BIAS

CUR

RENT

(µA)

2

4

6

5

3

1

–25 25 75 125

LT1182 G04

175–50–75 0 50 100 150

VIN = 5V

VIN = 3V

VIN = 30V

Shutdown Threshold Voltagevs Temperature

TEMPERATURE (°C)

0.6

SHUT

DOW

N TH

RESH

OLD

VOLT

AGE

(V)

0.8

1.0

1.2

1.1

0.9

0.7

–25 25 75 125

LT1182 G05

175–50–75 0 50 100 150TEMPERATURE (°C)

–75

CCFL

FRE

QUEN

CY (k

Hz) 220

240

125

LT1182 • G06

200

180

160–25 25 75 175

210

230

190

170

100–50 0 50 150

VIN = 30V

VIN = 3V

CCFL Frequency vs Temperature

LCD Duty Cycle vs TemperatureLCD Frequency vs TemperatureCCFL Duty Cycle vs Temperature

Shutdown Currentvs Temperature


SUPP

LY C

URRE

NT (m

A)

10

12

14

13

11

9

7

5

125

LT1182 G01

8

6

4–25–50 0 50 100 15025 75 175

VIN = 30V

VIN = 3V


SHUT

DOW

N CU

RREN

T (µ

A)

60

8O

100

90

70

50

30

10

125

LT1182 G03

40

20

0–25–50 0 50 100 15025 75 175

VIN = 30V

VIN = 5V

VIN = 3V


SUPP

LY C

URRE

NT (m

A)

6

8

10

9

7

5

3

1

125

LT1182 G02

4

2

0–25– 50 0 50 100 15025 75 175

VIN = 30V

VIN = 3V


LCD

FREQ

UENC

Y (k

Hz) 220

240

125

LT1182 • G08

200

180

160–25 25 75 175

210

230

190

170

100–50 0 50 150

VIN = 3V

VIN = 30V

6

LT1182/LT1183/LT1184/LT1184F


UW

ICCFL Summing Voltagevs Temperature

TEMPERATURE (°C)

I CCF

L SU

MM

ING

VOLT

AGE

(V)

0.530.520.510.500.490.480.470.460.450.440.430.420.410.400.390.38

–25 25 75 125

LT1182 • G10

175–50–75 0 50 100 150

VIN = 5V

VIN = 3V

VIN = 30V

∆CCFL VC Source Current for∆ICCFL Programming Currentvs Temperature

CCFL VC to DIO Current ServoRatio vs Temperature

ICCFL PROGRAMMING CURRENT (µA)

543210

–1–2–3–4–5–6–7–8–9

–1040 80 120 160

LT1182 • G11

200200 60 100 140 180

T = –55°C

T = 25°C

T = 125°C∆I

CCFL

SUM

MIN

G VO

LTAG

E (m

V)

TEMPERATURE (°C)

–3

CCFL

VC

SINK

OFF

SET

CURR

ENT

(µA)

–1

10

–2

109

6

87

5

32

4

–75 125 150–25 0– 50 25 50 75 100 175

CCFL VC = 0.5V

CCFL VC = 1.0V

CCFL VC = 1.5V

LT1182 • G12

TEMPERATURE (°C)

0

POSI

TIVE

DIO

VOL

TAGE

(V)

0.4

0.2

0.8

0.6

1.2

1.0

–25 25 75 125

LT1182 • G14

175–50–75 0 50 100 150

I(DIO) = 1mA

I(DIO) = 5mA

I(DIO) = 10mA

Positive DIO Voltagevs Temperature

Negative DIO Voltagevs Temperature

CCFL VC High Clamp Voltagevs Temperature

CCFL VC Low Clamp Voltagevs Temperature

TEMPERATURE (°C)

0

CCFL

VC

LOW

CLA

MP

VOLT

AGE

(V)

0.10

0.05

0.20

0.15

0.30

0.25

–25 25 75 125

LT1182 • G17

175–50–75 0 50 100 150

ICCFL Summing VoltageLoad Regulation

CCFL VC Offset Sink Currentvs Temperature


1.7

CCFL

VC

HIGH

CLA

MP

VOLT

AGE

(V)

1.8

2.0

2.1

2.2

2.4

– 50 50 100

LT1182 • G18

1.9

2.3

25 150 175–25 0 75 125

TEMPERATURE (°C)

4.80

∆CCF

L V C

SOU

RCE

CURR

ENT

FOR

∆I

CCFL

PRO

GRAM

MIN

G CU

RREN

T (µ

A/µA

)

4.90

4.85

5.00

4.95

5.10

5.05

–25 25 75 125

LT1182 • G13

175–50–75 0 50 100 150

ICCFL = 10µA

ICCFL = 50µA

ICCFL = 100µA


CCFL

VC

DIO

CURR

ENT

SERV

O RA

TIO

(µA/

mA)

101

103

125

LT1182 • G16

99

97

95–25 25 75 175

100

102

98

96

100– 50 0 50 150

I(DIO) = 1mA

I(DIO) = 5mA

I(DIO) = 10mA


NEGA

TIVE

DIO

VOL

TAGE

(V)

1.2

1.6

125

LT1182 • G15

0.8

0.4

0–25 25 75 175

1.0

1.4

0.6

0.2

100–50 0 50 150

I(DIO) = 1mA

I(DIO) = 5mA

I(DIO) = 10mA

7

LT1182/LT1183/LT1184/LT1184F


UW

CCFL VC Switching ThresholdVoltage vs Temperature


0.6CCFL

VC

SWIT

CHIN

G TH

RESH

OLD

VOLT

AGE

(V)

0.7

0.9

1.0

1.1

1.3

– 50 50 100

LT1182 • G19

0.8

1.2

25 150 175–25 0 75 125

LCD VC Low Clamp Voltagevs Temperature

TEMPERATURE (°C)–50–75

0

LCD

V C L

OW C

LAM

P VO

LTAG

E (V

)

0.10

0.03

0.04

0.05

1.00

0.07

0 50 75

LT1182 • G20

0.02

0.08

0.09

0.06

–25 25 100 125

LCD VC High Clamp Voltagevs Temperature


1.7

LDC

V C H

IGH

CLAM

P VO

LTAG

E (V

)

1.8

2.0

2.1

2.2

2.4

– 50 50 100

LT1182 • G21

1.9

2.3

25 150 175–25 0 75 125

LCD VC Switching ThresholdVoltage vs Temperature


0.6LDC

V C S

WIT

CHIN

G TH

RESH

OLD

VOLT

AGE

(V)

0.7

0.9

1.0

1.1

1.3

–50 50 100

LT1182 • G22

0.8

1.2

25 150 175–25 0 75 125

CCFL High-Side Sense NullCurrent vs Temperature

TEMPERATURE (°C)

0.940

CCFL

HIG

H-SI

DE S

ENSE

NUL

L CU

RREN

T (A

)

0.980

0.960

1.020

1.000

1.060

1.040

–25 25 75 125

LT1182 • G23

175–50–75 0 50 100 150

CCFL High-Side Sense Null CurrentLine Regulation vs Temperature


CCFL

HIG

H-SI

DE S

ENSE

LIN

E RE

GULA

TI0N

(%V)

0.120

0.160

125

LT1182 • G24

0.080

0.040

0.000–25 25 75 175

0.100

0.140

0.060

0.020

100– 50 0 50 150


CCFL

HIG

H-SI

DE S

ENSE

SUP

PLY

CURR

ENT

(µA)

110

130

150

140

120

100

80

60

125 150

LT1182 • G25

90

70

50–25 0–50 25 50 75 100 175

CCFL High-Side Sense SupplyCurrent vs Temperature

Bulb Protect Servo Voltagevs Temperature


BULB

PRO

TECT

SER

VO V

OLTA

GE (V

)

7.1

7.3

7.5

7.4

7.2

7.0

6.8

6.6

125 150

LT1182 • G26

6.9

6.7

6.5–25 0– 50 25 50 75 100 175

ICCFL = 10µA

ICCFL = 50µA

ICCFL = 100µA

Bulb Input Bias Currentvs Temperature

TEMPERATURE (°C)

BULB

INPU

T BI

AS C

URRE

NT (µ

A)

6

8

10

LT1182 • G27

4

2

0–75 125 150–25 0– 50 25 50 75 100 175

8

LT1182/LT1183/LT1184/LT1184F


UW

FBP Input Bias Currentvs Temperature

FBP to LCD VC Transconductancevs Temperature

LCD FBP Referencevs Temperature

TEMPERATURE (°C)

1.214

LCD

FBP

REFE

RENC

E VO

LTAG

E (V

)

1.234

1.224

1.254

1.244

1.274

1.264

–25 25 75 125

LT1182 • G28

175– 50–75 0 50 100 150


FBP

INPU

T BI

AS C

URRE

NT (µ

A)

0.6

0.8

1.0

0.9

0.7

0.5

0.3

0.1

125 150

LT1182 • G30

0.4

0.2

0–25 0– 50 25 50 75 100 175

LCD FBN Offset Voltagevs Temperature

TEMPERATURE (°C)

–27

LCD

FBN

OFFS

ET V

OLTA

GE (m

V)

–23

–19–21

–25

–1–3

–9

–5–7

–11

–15–17

–13

–75 125 150–25 0– 50 25 50 75 100 175

FBN to LCD VC Transconductancevs Temperature

LT1184/84F REF OutputImpedance vs Temperature


FBN

TO L

CD V

C TR

ANSC

ONDU

CTAN

CE (µ

mho

s)

1000

1200

125

LT1182 • G34

800

600

400–25 25 75 175

900

1100

700

500

100– 50 0 50 150


FBP

TO L

CD V

C TR

ANSC

ONDU

CTAN

CE (µ

mho

s)

1100

1300

125

LT1182 • G33

900

700

500–25 25 75 175

1000

1200

800

600

100– 50 0 50 150

TEMPERATURE (°C)

0

FBP

REFE

RENC

E VO

LTAG

E LI

NE R

EGUL

ATIO

N (%

/V)

0.010

0.005

0.020

0.015

0.03

0.025

–25 25 75 125

LT1182 • G29

175–50–75 0 50 100 150

FBP Reference Voltage LineRegulation vs Temperature

LT1183 REF Output Impedancevs Temperature


LT11

83 R

EF 0

UTPU

T IM

PEDA

NCE

(Ω)

50

60

70

65

55

45

35

25

125 150

LT1182 • G35

40

30

20–25 0–50 25 50 75 100 175

TEMPERATURE (°C)

LT11

84/8

4F R

EF O

UTPU

T IM

PEDA

NCE

(Ω)

20

25

30

LT1182 • G36

15

10

5–75 125 150–25 0–50 25 50 75 100 175

FBN Input Bias Currentvs Temperature

TEMPERATURE (°C)

0

FBN

INPU

T BI

AS C

URRE

NT (µ

A)

1.0

0.5

2.0

1.5

3.0

2.5

–25 25 75 125

LT1182 • G32

175–50–75 0 50 100 150

9

LT1182/LT1183/LT1184/LT1184F


UW

CCFL VSW Current Limitvs Duty Cycle

CCFL VSW Sat Voltagevs Switch Current

SWITCH CURRENT (A)0

CCFL

VSW

SAT

VOL

TAGE

(V)

0.6

0.8

1.0

1.2

LT1182 • G37

0.4

0.2

0.5

0.7

0.9

0.3

0.1

00.3 0.6 0.9 1.5

T = –5°CT = 125°C

T = 25°C

DUTY CYCLE (%)0

0

CCFL

VSW

CUR

RENT

LIM

IT (A

)

0.5

1.5

2.0

2.5

20 40 50 90

LT1182 • G39

1.0

10 30 60 70 80

T = 25°C

T = 125°C

MINIMUM

T = 0°C

LCD VSW Sat Voltagevs Switch Current

SWITCH CURRENT (A)0

LCD

VSW

SAT

VOL

TAGE

(V)

1.2

1.6

2.0

1.2

LT1182 • G38

0.8

0.4

00.3 0.6 0.9 1.5

T = –5°CT = 125°C

T = 25°C

DUTY CYCLE (%)0

0

LCD

V SW

CUR

RENT

LIM

IT (A

)

0.3

0.9

1.2

1.5

20 40 50 90

LT1182 • G40

0.6

10 30 60 70 80

T = 25°C

T = 125°C

MINIMUM

T = 0°C

LCD VSW Current Limitvs Duty Cycle Forced Beta vs ISW on CCFL VSW

CCFL ISW (A)0

FORC

ED B

ETA

60

80

110

100

1.6

LT1182 • G41

40

20

50

70

90

30

10

00.4 0.8 1.20.2 1.80.6 1.0 1.4 2.0

LCD ISW (A)0

FORC

ED B

ETA

60

80

100

1.6

LT1182 • G42

40

20

50

70

90

30

10

00.4 0.8 1.20.2 1.80.6 1.0 1.4 2.0

Forced Beta vs ISW on LCD VSW

10

LT1182/LT1183/LT1184/LT1184F

LT1182/LT1183/LT1184/LT1184F

CCFL PGND (Pin 1): This pin is the emitter of an internalNPN power switch. CCFL switch current flows throughthis pin and permits internal, switch-current sensing. Theregulators provide a separate analog ground and powerground(s) to isolate high current ground paths from lowcurrent signal paths. Linear Technology recommends theuse of star-ground layout techniques.

ICCFL (Pin 2): This pin is the input to the CCFL lamp currentprogramming circuit. This pin internally regulates to 450mV(LT1182/LT1183) or 465mV (LT1184/LT1184F). The pinaccepts a DC input current signal of 0µA to 100µA fullscale. This input signal is converted to a 0µA to 500µAsource current at the CCFL VC pin. By shunt regulating theICCFL pin, the input programming current can be set withDAC, PWM or potentiometer control. As input program-ming current increases, the regulated lamp current in-creases. For a typical 6mA lamp, the range of inputprogramming current is about 0µA to 50µA.

DIO (Pin 3): This pin is the common connection betweenthe cathode and anode of two internal diodes. The remain-ing terminals of the two diodes connect to ground. In agrounded lamp configuration, DIO connects to the lowvoltage side of the lamp. Bidirectional lamp current flowsin the DIO pin and thus the diodes conduct alternately onhalf cycles. Lamp current is controlled by monitoring one-half of the average lamp current. The diode conducting onnegative half cycles has one-tenth of its current diverted tothe CCFL VC pin. This current nulls against the sourcecurrent provided by the lamp-current programmer circuit.A single capacitor on the CCFL VC pin provides both stableloop compensation and an averaging function to the half-wave-rectified sinusoidal lamp current. Therefore, inputprogramming current relates to one-half of average lampcurrent. This scheme reduces the number of loop com-pensation components and permits faster loop transientresponse in comparison to previously published circuits.If a floating-lamp configuration is used, ground the DIOpin.

CCFL VC (Pin 4): This pin is the output of the lamp currentprogrammer circuit and the input of the current compara-

tor for the CCFL regulator. Its uses include frequencycompensation, lamp-current averaging for grounded lampcircuits, and current limiting. The voltage on the CCFL VCpin determines the current trip level for switch turnoff.During normal operation this pin sits at a voltage between0.95V (zero switch current) and 2.0V (maximum switchcurrent) with respect to analog ground (AGND). This pinhas a high impedance output and permits external voltageclamping to adjust current limit. A single capacitor toground provides stable loop compensation. This simpli-fied loop compensation method permits the CCFL regula-tor to exhibit single-pole transient response behavior andvirtually eliminates transformer output overshoot.

AGND (Pin 5): This pin is the low current analog ground.It is the negative sense terminal for the internal 1.24Vreference and the ICCFL summing voltage in the LT1182/LT1183/LT1184/LT1184F. It is also a sense terminal forthe LCD dual input error amplifier in the LT1182/LT1183.Connect external feedback divider networks that terminateto ground and frequency compensation components thatterminate to ground directly to this pin for best regulationand performance.

SHUTDOWN (Pin 6): Pulling this pin low causes completeregulator shutdown with quiescent current typically re-duced to 35µA. The nominal threshold voltage for this pinis 0.85V. If the pin is not used, it can float high or be pulledto a logic high level (maximum of 6V). Carefully evaluateactive operation when allowing the pin to float high.Capacitive coupling into the pin from switching transientscould cause erratic operation.

CCFL VSW (Pin 16): This pin is the collector of the internalNPN power switch for the CCFL regulator. The powerswitch provides a minimum of 1.25A. Maximum switchcurrent is a function of duty cycle as internal slope com-pensation ensures stability with duty cycles greater than50%. Using a driver loop to automatically adapt base drivecurrent to the minimum required to keep the switch in aquasi-saturation state yields fast switching times and highefficiency operation. The ratio of switch current to drivercurrent is about 50:1.

PIN FUNCTIONS

UUU

11

LT1182/LT1183/LT1184/LT1184F

Bulb (Pin 15): This pin connects to the low side of a 7Vthreshold comparator between the BAT and Bulb pins.This circuit sets the maximum voltage level across theprimary side of the Royer converter under all operatingconditions and limits the maximum secondary outputunder start-up conditions or open lamp conditions. Thiseases transformer voltage rating requirements. Set thevoltage limit to insure lamp start-up with worst-case, lampstart voltages and cold-temperature system operatingconditions. The Bulb pin connects to the junction of anexternal divider network. The divider network connectsfrom the center tap of the Royer transformer or the actualbattery supply voltage to the top side of the current source“tail inductor”. A capacitor across the top of the dividernetwork filters switching ripple and sets a time constantthat determines how quickly the clamp activates. Whenthe comparator activates, sink current is generated to pullthe CCFL VC pin down. This action transfers the entireregulator loop from current mode operation into voltagemode operation.

BAT (Pin 14): This pin connects to the battery or batterycharger voltage from which the CCFL Royer converter andLCD contrast converter operate. This voltage is typicallyhigher than the VIN supply voltage but can be equal or lessthan VIN. However, the BAT voltage must be at least 2.1Vgreater than the internal 2.4V regulator or 4.5V minimumup to 30V maximum. This pin provides biasing for thelamp current programming block, is used with the Royerpin for floating lamp configurations, and connects to oneinput for the open lamp protection circuitry. For floatinglamp configurations, this pin is the noninverting terminalof a high-side current sense amplifier. The typical quies-cent current is 50µA into the pin. The BAT and Royer pinsmonitor the primary side Royer converter current throughan internal 0.1Ω top side current sense resistor. A 0A to 1Aprimary side, center tap converter current is translated toan input signal range of 0mV to 100mV for the currentsense amplifier. This input range translates to a 0µA to500µA sink current at the CCFL VC pin that nulls against thesource current provided by the programmer circuit. TheBAT pin also connects to the top side of an internal clampbetween the BAT and Bulb pins.

PIN FUNCTIONS

UUU

Royer (Pin 13): This pin connects to the center-tappedprimary of the Royer converter and is used with the BATpin in a floating lamp configuration where lamp current iscontrolled by sensing Royer primary side converter cur-rent. This pin is the inverting terminal of a high-sidecurrent sense amplifier. The typical quiescent current is50µA into the pin. If the CCFL regulator is not used in afloating lamp configuration, tie the Royer and BAT pinstogether. This pin is only available on the LT1182/LT1183/LT1184F.

VIN (Pin 12): This pin is the supply pin for the LT1182/LT1183/LT1184/LT1184F. The ICs accept an input voltagerange of 3V minimum to 30V maximum with little changein quiescent current (zero switch current). An internal,low dropout regulator provides a 2.4V supply for most ofthe internal circuitry. Supply current increases as switchcurrent increases at a rate approximately 1/50 of switchcurrent. This corresponds to a forced Beta of 50 for eachswitch. The ICs incorporate undervoltage lockout by sens-ing regulator dropout and lockout switching for inputvoltages below 2.5V. Hysteresis is not used to maximizethe useful range of input voltage. The typical input voltageis a 3.3V or 5V logic supply.

LT1182/LT1183

LCD VC (Pin 7): This pin is the output of the LCD contrasterror amplifier and the input of the current comparator forthe LCD contrast regulator. Its uses include frequencycompensation and current limiting. The voltage on theLCD VC pin determines the current trip level for switchturnoff. During normal operation, this pin sits at a voltagebetween 0.95V (zero switch current) and 2.0V (maximumswitch current). The LCD VC pin has a high impedanceoutput and permits external voltage clamping to adjustcurrent limit. A series R/C network to ground providesstable loop compensation.

LCD PGND (Pin 8): This pin is the emitter of an internalNPN power switch. LCD contrast switch current flowsthrough this pin and permits internal, switch-currentsensing. The regulators provide a separate analog groundand power ground(s) to isolate high current ground pathsfrom low current signal paths. Linear Technology recom-mends star-ground layout techniques.

12

LT1182/LT1183/LT1184/LT1184F

PIN FUNCTIONS

UUU

LCD VSW (Pin 9): This pin is the collector of the internalNPN power switch for the LCD contrast regulator. Thepower switch provides a minimum of 625mA. Maximumswitch current is a function of duty cycle as internal slopecompensation ensures stability with duty cycles greaterthan 50%. Using a driver loop to automatically adapt basedrive current to the minimum required to keep the switchin a quasi-saturation state yields fast switching times andhigh efficiency operation. The ratio of switch current todriver current is about 50:1.

LT1182

FBN (Pin 10): This pin is the noninverting terminal for thenegative contrast control error amplifier. The invertingterminal is offset from ground by –12mV and defines theerror amplifier output state under start-up conditions. TheFBN pin acts as a summing junction for a resistor dividernetwork. Input bias current for this pin is typically 1µAflowing out of the pin. If this pin is not used, force FBN togreater than 0.5V to deactivate the negative contrastcontrol input stage. The proximity of FBN to the LCD VSWpin makes it sensitive to ringing on the switch pin. A smallcapacitor (0.01µF) from FBN to ground filters switchingripple.

FBP (Pin 11): This pin is the inverting terminal for thepositive contrast control error amplifier. The noninvertingterminal is tied to an internal 1.244V reference. Input biascurrent for this pin is typically 0.5µA flowing into the pin.If this pin is not used, ground FBP to deactivate the positivecontrast control input stage. The proximity of FBP to theLCD VSW pin makes it sensitive to ringing on the switchpin. A small capacitor (0.01µF) from FBP to ground filtersswitching ripple.

LT1183

FB (Pin 10): This pin is the common connection betweenthe noninverting terminal for the negative contrast error

amplifier and the inverting terminal for the positive-con-trast error amplifier. In comparison to the LT1182, the FBNand the FBP pins tie together and come out as one pin. Thisscheme permits one polarity of contrast to be regulated.The proximity of FB to the LCD VSW pin makes it sensitiveto ringing on the switch pin. A small capacitor (0.01µF)from FB to ground filters switching ripple.

The FB pin requires attention to start-up conditions whengenerating negative contrast voltages. The pin has twostable operating points; regulating to 1.244V for positivecontrast voltages or regulating to –12mV for negativecontrast voltages. Under start-up conditions, the FB pinheads to a positive voltage. If negative contrast voltagesare generated, tie a diode from the FB pin to ground. Thisensures that the FB pin will clamp before reaching thepositive reference voltage. Switching action then pulls theFB pin back to its normal servo voltage.

LT1183/LT1184/LT1184F

REF (Pin 11): This pin brings out the 1.244V reference. Itsfunctions include the programming of negative contrastvoltages with an external resistor divider network (LT1183only) and the programming of lamp current for the ICCFLpin. LTC does not recommend using the REF pin for bothfunctions at once. The REF pin has a typical outputimpedance of 45Ω on the LT1183 and a typical outputimpedance of 15Ω on the LT1184/LT1184F. Referenceload current should be limited to a few hundred microam-peres, otherwise reference regulation will be degraded.REF is used to generate the maximum programmingcurrent for the ICCFL pin by placing a resistor between thepins. PWM or DAC control subtracts from the maximumprogramming current. A small decoupling capacitor (0.1uF)is recommended to filter switching transients.

13

LT1182/LT1183/LT1184/LT1184F

BLOCK DIAGRAM

W

LT1182/LT1183 CCFL/LCD Contrast Regulator Top Level Block Diagram

FBN10

–

+ILIM

AMP2

COMP2COMP1

UNDER- VOLTAGE LOCKOUT

THERMAL SHUTDOWN

2.4V REGULATORSHUTDOWN

200kHz OSC

DRIVE 2

SHUTDOWN

9

6

LCD VSW

LCD PGND

LCD VC

FBP ICCFL AGND DIO BULB CCFL VC

CCFL PGND

CCFL VSW

ROYERBATVIN

LOGIC 2

ANTI- SAT2

LOGIC 1 DRIVE 1

LCD

GAIN = 4.4GAIN = 4.4

Q3 2 ×

Q5 1 ×

Q4 5 ×

Q8 1 ×

Q10 2 ×

R1 0.125Ω

R4 0.1Ω

LT1183: FBP AND FBN ARE TIED TOGETHER TO CREATE FB AT PIN 10. THE REFERENCE IS BROUGHT OUT TO PIN 11.

R2 0.25Ω

Q6 2 ×

R3 1k

D2 6V

D1

Q11

Q1Q2

131412

Q7 9 ×

Q9 3 ×

8 7 11 2 5 3 15 4

16

1

V2 1.24V

V1 0.45V

–

+CCFL

0µA TO 100µA

–12mV

– +gm

– –+ +

–

+ILIM

AMP1

ANTI- SAT1

1182 BD01

+

–

14

LT1182/LT1183/LT1184/LT1184F

BLOCK DIAGRAM

W

LT1184/LT1184F CCFL Regulator Top Level Block Diagram

COMP1

UNDER- VOLTAGE LOCKOUT

THERMAL SHUTDOWN

2.4V REGULATORSHUTDOWN

200kHz OSC

SHUTDOWN 6

REF ICCFL AGND DIO BULB CCFL VC

CCFL PGND

CCFL VSW

ROYERBATVIN

LOGIC 1 DRIVE 1

GAIN = 4.4Q3 2 ×

Q5 1 ×

Q4 5 ×

Q8 1 ×

Q10 2 ×

R1 0.125Ω

R4 0.1Ω

LT1184/LT1184F: REFERENCE IS BROUGHT OUT TO PIN 1. PINS 7, 8, 9, 10 ARE NO CONNECT.

Q6 2 ×

R3 1k

D2 6V

D1

Q11

Q1

131412

Q7 9 ×

Q9 3 ×

11 2 5 3 15 4

16

1

VREF 1.24V V1

0.465V

–

+CCFL0µA TO

100µA

– +gm

–

+ILIM

AMP1

ANTI- SAT1

1184 BD02

LT1184: HIGH-SIDE SENSE RESISTOR R4 AND GM AMPLIFIER ARE REMOVED. PIN 13 IS NO CONNECT.

APPLICATIONS INFORMATION

WU UU

Introduction

Current generation portable computers and instrumentsuse backlit Liquid Crystal Displays (LCDs). These displaysalso appear in applications extending to medical equip-ment, automobiles, gas pumps, and retail terminals. ColdCathode Fluorescent Lamps (CCFLs) provide the highestavailable efficiency in backlighting the display. Providingthe most light out for the least amount of input power is themost important goal. These lamps require high voltage ACto operate, mandating an efficient high voltage DC/AC

converter. The lamps operate from DC, but migrationeffects damage the lamp and shorten its lifetime. Lampdrive should contain zero DC component. In addition togood efficiency, the converter should deliver the lampdrive in the form of a sine wave. This minimizes EMI andRF emissions. Such emissions can interfere with otherdevices and can also degrade overall operating efficiency.Sinusoidal CCFL drive maximizes current-to-light conver-sion in the lamp. The circuit should also permit lampintensity control from zero to full brightness with nohysteresis or “pop-on”.

15

LT1182/LT1183/LT1184/LT1184F


WU UU

Manufacturers offer a wide array of monochrome andcolor displays. LCD display types include passive matrixand active matrix. These displays differ in operating volt-age polarity (positive and negative contrast voltage dis-plays), operating voltage range, contrast adjust range, andpower consumption. LCD contrast supplies must regu-late, provide output adjustment over a significant range,operate over a wide input voltage range, and provide loadcurrents from milliamps to tens of milliamps.

The small size and battery-powered operation associatedwith LCD equipped apparatus dictate low componentcount and high efficiency for these circuits. Size con-straints place severe limitations on circuit architecture andlong battery life is a priority. Laptop and handheld portablecomputers offer an excellent example. The CCFL and itspower supply are responsible for almost 50% of thebattery drain. Displays found in newer color machines canhave a contrast power supply battery drain as high as 20%.

Additionally, all components including PC board and hard-ware, usually must fit within the LCD enclosure with aheight restriction of 5mm to 10mm.

The CCFL switching regulator in the LT1182/LT1183/LT1184/LT1184F typically drives an inductor that acts asa switched mode current source for a current driven Royerclass converter with efficiencies as high as 90%. Thecontrol loop forces the regulator to pulse-width modulatethe inductor’s average current to maintain constant cur-rent in the lamp. The constant current’s value, and thuslamp intensity is programmable. This drive techniqueprovides a wide range of intensity control. A unique lampcurrent programming block permits either grounded-lamp or floating-lamp configurations. Grounded-lamp cir-cuits directly control one-half of actual lamp current.Floating-lamp circuits directly control the Royer’s primaryside converter current. Floating-lamp circuits providedifferential drive to the lamp and reduce the loss from straylamp-to-frame capacitance, extending illumination range.

The LCD contrast switching regulator in the LT1182/LT1183 is typically configured as a flyback converter andgenerates a bias supply for contrast control. Other topol-ogy choices for generating the bias supply include a boostconverter or a boost/charge pump converter. The supply’svariable output permits adjustment of contrast for the

majority of available displays. Some newer types of dis-plays require a fairly constant supply voltage and providecontrast adjustment through a digital control pin. A unique,dual polarity, error amplifier and the selection of a flybackconverter topology allow either positive or negative LCDcontrast voltages to be generated with minor circuitchanges. The difference between the LT1182 and LT1183is found in the pinout for the inputs of the LCD contrasterror amplifier. The LT1182 brings out the error amplifierinputs individually for setting up positive and negativepolarity contrast capability. This feature allows an outputconnector to determine the choice of contrast operatingpolarity by a ground connection. The LT1183 ties the erroramplifier inputs together and brings out an internal refer-ence. The reference may be used in generating negativecontrast voltages or in programming lamp current.

Block Diagram Operation

The LT1182/LT1183/LT1184/LT1184F are fixed frequency,current mode switching regulators. Fixed frequency, cur-rent mode switchers control switch duty cycle directly byswitch current rather than by output voltage. Referring tothe block diagram for the LT1182/LT1183, the switch foreach regulator turns ON at the start of each oscillator cycle.The switches turn OFF when switch current reaches apredetermined level. The operation of the CCFL regulatorin the LT1184/LT1184F is identical to that in the LT1182/LT1183. The control of output lamp current is obtained byusing the output of a unique programming block to setcurrent trip level. The contrast voltage is controlled by theoutput of a dual-input-stage error amplifier, which setscurrent trip level. The current mode switching techniquehas several advantages. First, it provides excellent rejec-tion of input voltage variations. Second, it reduces the 90°phase shift at mid-frequencies in the energy storageinductor. This simplifies closed-loop frequency compen-sation under widely varying input voltage or output loadconditions. Finally, it allows simple pulse-by-pulse cur-rent limiting to provide maximum switch protection underoutput overload or short-circuit conditions.

The LT1182/LT1183/LT1184/LT1184F incorporate a lowdropout internal regulator that provides a 2.4V supply formost of the internal circuitry. This low dropout designallows input voltage to vary from 3V to 30V with little

16

LT1182/LT1183/LT1184/LT1184F

change in quiescent current. An active low shutdown pintypically reduces total supply current to 35µA by shuttingoff the 2.4V regulator and locking out switching action forstandby operation. The ICs incorporate undervoltage lock-out by sensing regulator dropout and locking out switch-ing below about 2.5V. The regulators also provide thermalshutdown protection that locks out switching in the pres-ence of excessive junction temperatures.

A 200kHz oscillator is the basic clock for all internal timing.The oscillator turns on an output via its own logic anddriver circuitry. Adaptive anti-sat circuitry detects theonset of saturation in a power switch and adjusts basedrive current instantaneously to limit switch saturation.This minimizes driver dissipation and provides rapid turn-off of the switch. The CCFL power switch is guaranteed toprovide a minimum of 1.25A in the LT1182/LT1183/LT1184/LT1184F and the LCD power switch is guaranteedto provide a minimum of 0.625A in the LT1182/LT1183.The anti-sat circuitry provides a ratio of switch current todriver current of about 50:1.

Simplified Lamp Current Programming

A programming block in the LT1182/LT1183/LT1184/LT1184F controls lamp current, permitting either grounded-lamp or floating-lamp configurations. Grounded configu-rations control lamp current by directly controlling one-half of actual lamp current and converting it to a feedbacksignal to close a control loop. Floating configurationscontrol lamp current by directly controlling the Royer’sprimary side converter current and generating a feedbacksignal to close a control loop.

Previous backlighting solutions have used a traditionalerror amplifier in the control loop to regulate lamp current.This approach converted an RMS current into a DC voltagefor the input of the error amplifier. This approach usedseveral time constants in order to provide stable loopfrequency compensation. This compensation schememeant that the loop had to be fairly slow and that outputovershoot with startup or overload conditions had to becarefully evaluated in terms of transformer stress andbreakdown voltage requirements.

The LT1182/LT1183/LT1184/LT1184F eliminate the erroramplifier concept entirely and replace it with a lamp

current programming block. This block provides an easy-to-use interface to program lamp current. The program-mer circuit also reduces the number of time constants inthe control loop by combining the error signal conversionscheme and frequency compensation into a single capaci-tor. The control loop thus exhibits the response of a singlepole system, allows for faster loop transient response andvirtually eliminates overshoot under startup or overloadconditions.

Lamp current is programmed at the input of the program-mer block, the ICCFL pin. This pin is the input of a shuntregulator and accepts a DC input current signal of 0µA to100µA. This input signal is converted to a 0µA to 500uAsource current at the CCFL VC pin. The programmer circuitis simply a current-to-current converter with a gain of five.By regulating the ICCFL pin, the input programming currentcan be set with DAC, PWM or potentiometer control. Thetypical input current programming range for 0mA to 6mAlamp current is 0µA to 50µA.

The ICCFL pin is sensitive to capacitive loading and willoscillate with capacitance greater than 10pF. For example,loading the ICCFL pin with a 1× or 10× scope probe causesoscillation and erratic CCFL regulator operation becauseof the probe’s respective input capacitance. A currentmeter in series with the ICCFL pin will also produce oscil-lation due to its shunt capacitance. Use a decouplingresistor of several kilo-ohms between the ICCFL pin and thecontrol circuitry if excessive stray capacitance exists. Thisis basically free with potentiometer or PWM control asthese control schemes use resistors. A current outputDAC should use an isolating resistor as the DAC can havesignificant output capacitance that changes as a functionof input code.

Grounded-Lamp Configuration

In a grounded-lamp configuration, the low voltage side ofthe lamp connects directly to the LT1182/LT1183/LT1184/LT1184F DIO pin. This pin is the common connectionbetween the cathode and anode of two internal diodes. Inprevious grounded-lamp solutions, these diodes werediscrete units and are now integrated onto the IC, savingcost and board space. Bi-directional lamp current flows inthe DIO pin and thus, the diodes conduct alternately on half


WU UU

17

LT1182/LT1183/LT1184/LT1184F

cycles. Lamp current is controlled by monitoring one-halfof the average lamp current. The diode conducting onnegative half cycles has one-tenth of its current diverted tothe CCFL pin and nulls against the source current providedby the lamp current programmer circuit. The compensa-tion capacitor on the CCFL VC pin provides stable loopcompensation and an averaging function to the rectifiedsinusoidal lamp current. Therefore, input programmingcurrent relates to one-half of average lamp current.

The transfer function between lamp current and inputprogramming current must be empirically determined andis dependent on the particular lamp/display housing com-bination used. The lamp and display housing are a distrib-uted loss structure due to parasitic lamp-to-frame capaci-tance. This means that the current flowing at the highvoltage side of the lamp is higher than what is flowing atthe DIO pin side of the lamp. The input programmingcurrent is set to control lamp current at the high voltageside of the lamp, even though the feedback signal is thelamp current at the bottom of the lamp. This insures thatthe lamp is not overdriven which can degrade the lamp’soperating lifetime.

Floating-Lamp Configuration

In a floating-lamp configuration, the lamp is fully floatingwith no galvanic connection to ground. This allows thetransformer to provide symmetric, differential drive to thelamp. Balanced drive eliminates the field imbalance asso-ciated with parasitic lamp-to-frame capacitance and re-duces “thermometering” (uneven lamp intensity along thelamp length) at low lamp currents.

Carefully evaluate display designs in relation to the physi-cal layout of the lamp, it leads and the construction of thedisplay housing. Parasitic capacitance from any highvoltage point to DC or AC ground creates paths forunwanted current flow. This parasitic current flow de-grades electrical efficiency and losses up to 25% havebeen observed in practice. As an example, at a Royeroperating frequency of 60kHz, 1pF of stray capacitancerepresents an impedance of 2.65MΩ. With an operatinglamp voltage of 400V and an operating lamp current of6mA, the parasitic current is 150µA. The efficiency loss is2.5%. Layout techniques that increase parasitic capaci-

tance include long high voltage lamp leads, reflectivemetal foil around the lamp, and displays supplied in metalenclosures. Losses for a good display are under 5%whereas losses for a bad display range from 5% to 25%.Lossy displays are the primary reason to use a floating-lamp configuration. Providing symmetric, differential driveto the lamp reduces the total parasitic loss by one-half.

Maintaining closed-loop control of lamp current in afloating lamp configuration now necessitates deriving afeedback signal from the primary side of the Royer trans-former. Previous solutions have used an external preci-sion shunt and high side sense amplifier configuration.This approach has been integrated onto the LT1182/LT1183/LT1184F for simplicity of design and ease of use.An internal 0.1W resistor monitors the Royer convertercurrent and connects between the input terminals of ahigh-side sense amplifier. A 0A to 1A Royer primary side,center tap current is translated to a 0µA to 500uA sinkcurrent at the CCFL VC pin to null against the sourcecurrent provided by the lamp current programmer circuit.The compensation capacitor on the CCFL VC pin providesstable loop compensation and an averaging function to theerror sink current. Therefore, input programming currentis related to average Royer converter current. Floating-lamp circuits operate similarly to grounded-lamp circuits,except for the derivation of the feedback signal.

The transfer function between primary side convertercurrent and input programming current must be empiri-cally determined and is dependent upon a myriad offactors including lamp characteristics, display construc-tion, transformer turns ratio, and the tuning of the Royeroscillator. Once again, lamp current will be slightly higherat one end of the lamp and input programming currentshould be set for this higher level to insure that the lampis not overdriven.

The internal 0.1Ω high-side sense resistor on the LT1182/LT1183/LT1184F is rated for a maximum DC current of 1A.However, this resistor can be damaged by extremely highsurge currents at start-up. The Royer converter typicallyuses a few microfarads of bypass capacitance at the centertap of the transformer. This capacitor charges up when thesystem is first powered by the battery pack or an AC walladapter. The amount of current delivered at start-up can be


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LT1182/LT1183/LT1184/LT1184F

very large if the total impedance in this path is small andthe voltage source has high current capability. LinearTechnology recommends the use of an aluminum electro-lytic for the transformer center tap bypass capacitor withan ESR greater than or equal to 0.5Ω. This lowers the peaksurge currents to an acceptable level. In general, the wireand trace inductance in this path also help reduce the di/dt of the surge current. This issue only exists with floatinglamp circuits as grounded-lamp circuits do not make useof the high-side sense resistor.

Optimizing Optical Efficiency vs Electrical Efficiency

Evaluating the performance of an LCD backlight requiresthe measurement of both electrical and photometric effi-ciencies. The best optical efficiency operating point doesnot necessarily correspond to the best electrical effi-ciency. However, these two operating points are generallyclose. The desired goal is to maximize the amount of lightout for the least amount of input power. It is possible toconstruct backlight circuits that operate with over 90%electrical efficiency, but produce significantly less lightoutput than circuits that operate at 80% electrical effi-ciency.

The best electrical efficiency typically occur’s just as theCCFL’s transformer drive waveforms begin to exhibitartifacts of higher order harmonics reflected back from theRoyer transformer secondary. Maximizing electrical effi-ciency equates to smaller values for the Royer primaryside, resonating capacitor and larger values for the Royersecondary side ballast capacitor. The best optical effi-ciency occurs with nearly ideal sinusoidal drive to thelamp. Maximizing optical efficiency equates to largervalues for the Royer primary side resonating capacitor andsmaller values for the Royer secondary side ballast capaci-tor. The preferred operating point for the CCFL converteris somewhere in between the best electrical efficiency andthe best optical efficiency. This operating point maximizesphotometric output per watt of input power.

Making accurate and repeatable measurements of electri-cal and optical efficiency is difficult under the best circum-stances. Requirements include high voltage measure-ments and equipment specified for this operation, special-

ized calibrated voltage and current probes, wideband RMSvoltmeters, a photometer, and a calorimeter (for thebacklight enthusiast). Linear Technology’s ApplicationNote 55 and Design Note 101 contain detailed informationregarding equipment needs.

Input Supply Voltage Operating Range

The backlight/LCD contrast control circuits must operateover a wide range of input supply voltage and provideexcellent line regulation for the lamp current and thecontrast output voltage. This range includes the normalrange of the battery pack itself as well as the AC walladapter voltage, which is normally much higher than themaximum battery voltage. A typical input supply is 7V to28V; a 4 to 1 supply range.

Operation of the CCFL control circuitry from the AC walladapter generates the worst-case stress for the CCFLtransformer. Evaluations of loop compensation for over-shoot on startup transients and overload conditions areessential to avoid destructive arcing, overheating, andtransformer failure. Open-lamp conditions force the Royerconverter to operate open-loop. Component stress isagain worst-case with maximum input voltage conditions.The LT1182/LT1183/LT1184/LT1184F open-lamp pro-tection clamps the maximum transformer secondary volt-age to safe levels and transfers the regulator loop fromcurrent mode operation into voltage mode operation.Other fault conditions include board shorts and compo-nent failures. These fault conditions can increase primaryside currents to very high levels, especially at maximuminput voltage conditions. Solutions to these fault condi-tions include electrical and thermal fuses in the supplyvoltage trace.

Improvements in battery technology are increasing bat-tery lifetimes and decreasing battery voltages required bythe portable systems. However, operation at reducedbattery voltages requires higher, turns-ratio transformersfor the CCFL to generate equivalent output drive capability.The penalty incurred with high ratio transformers is higher,circulating currents acting on the same primary sidecomponents. Loss terms increase and electrical efficiencyoften decreases.


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LT1182/LT1183/LT1184/LT1184F

Size Constraints

Tighter length, width, and height constraints for CCFL andLCD contrast control circuitry are the result of LCD displayenclosure sizes remaining fairly constant while displayscreen sizes have increased. Space requirements forconnector hardware include the input power supply andcontrol signal connector, the lamp connector, and thecontrast output voltage connector.

Even though size requirements are shrinking, the highvoltage AC required to drive the lamp has not decreased.In some cases, the use of longer bulbs for color, portableequipment has increased the high voltage requirement.Accommodating the high voltage on the circuit boarddictates certain layout spacings and routings, involvesproviding creepages and clearances in the transformerdesign, and most importantly, involves routing a holeunderneath the CCFL transformer. Routing this hole mini-mizes high voltage leakage paths and prevents moisturebuildup that can result in destructive arcing. In addition tohigh voltage layout techniques, use appropriate layouttechniques for isolating high current paths from low-current signal paths.

This leaves the remaining space for control circuitry at apremium. Minimum component count is required andminimum size for the components used is required. Thissqueeze on component size is often in direct conflict withthe goals of maximizing battery life and efficiency. Com-promise is often the only remaining choice.

LCD Contrast Circuits

The LCD contrast switching regulator on the LT1182/LT1183 operates in many standard switching configura-tions and is used as a classic DC/DC converter. The dual-input-stage error amplifier easily regulates either positiveor negative contrast voltages. Topology choices for theconverter include single inductor and transformer-basedsolutions. The switching regulator operates equally welleither in continuous mode or discontinuous mode. Effi-ciencies for LCD contrast circuits range from 75% to 85%and depend on the total power drain of the particulardisplay. Adjustment control of the LCD contrast voltage isprovided by either potentiometer, PWM, or DAC control.

Applications Support

Linear Technology invests an enormous amount of time,resources, and technical expertise in understanding, de-signing and evaluating backlight/LCD contrast solutionsfor system designers. The design of an efficient andcompact LCD backlight system is a study of compromisein a transduced electronic system. Every aspect of thedesign is interrelated and any design change requirescomplete re-evaluation for all other critical design param-eters. Linear Technology has engineered one of the mostcomplete test and evaluation setups for backlight designsand understands the issues and tradeoffs in achieving acompact, effficient and economical customer solution.Linear Technology welcomes the opportunity to discuss,design, evaluate, and optimize any backlight/LCD contrastsystem with a customer. For further information on back-light/LCD contrast designs, consult the references listedbelow.

References

1. Williams, Jim. August 1992. Illumination Circuitry forLiquid Crystal Displays. Linear Technology Corporation,Application Note 49.

2. Williams, Jim. August 1993. Techniques for 92% Effi-cient LCD Illumination. Linear Technology Corporation,Application Note 55.

3. Bonte, Anthony. March 1995. LT1182 Floating CCFLwith Dual Polarity Contrast. Linear Technology Corpora-tion, Design Note 99.

4. Williams, Jim. April 1995. A Precision Wideband Cur-rent Probe for LCD Backlight Meaasurement. Linear Tech-nology Corporation, Design Note 101.


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LT1182/LT1183/LT1184/LT1184F

TYPICAL APPLICATIONS N

U

90% Efficient Grounded CCFL Configuration with Negative Polarity LCD Contrast

BAT 8V TO 28V

NEGCON

1182 TA02

VARYING THE V(CONTRAST) VOLTAGE FROM 0V TO 5V GIVES VARIABLE NEGATIVE CONTRAST FROM –10V TO –30V

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

ICCFL

DIO

CCFL VC

AGND

SHDN

LCD VC

CCFL VSW

BULB

BAT

ROYER

VIN

REF

FB

LCD VSW

CCFL PGND

LCD PGND

LT1183

LAMP

UP TO 6mA

10 6

L1

L3

R1 750Ω

L2 100µH

3 2 1 4 5

+

C12 2.2µF 35V

+

+

C7, 1µF

C1* 0.068µF

D1 1N5818

D5 BAT85

D2 1N914

D4 1N914

V (PWM) 0V TO 5V

1kHz PWM

SHUTDOWN C8,0.68µF

R7, 10k

R4 38.3k 1%

C5 1000pF

R2 220k

R3 100k

C3A 2.2µF 35V

C11 22µF 35V

V (CONTRAST) 0V TO 5V

R11 40.2k 1%R10, 10k, 1%

C4 2.2µF

VIN ≥ 3V

D3 1N5934A 24V

C3B 2.2µF 35V

C2 27pF 3kV

+







COILTRONICS (407) 241-7876 THE ICCFL CURRENT REQUIRED FOR AN RMS BULB CURRENT IS: ICCFL (9 × 10–3) (IBULB). 0% TO 90% DUTY CYCLE FOR THE PWM SIGNAL CORRESPONDS TO 0 TO 6mA.

Q2* Q1*

N = 1:2

C6 2.2µF

R5,38.3k, 1%

R9, 4.99k, 1%

D5 1N4148

C10 0.1µF

64

2 9

C9 0.01µF

+

+

21

LT1182/LT1183/LT1184/LT1184F


U

LT1184F Floating CCFL with Potentiometer Control of Lamp Current

16

15

14

13

12

11

10

9

BAT 8V TO 28V

1

2

3

4

5

6

7

8

ICCFL

DIO

CCFL VC

AGND

SHDN

NC

CCFL VSW

BULB

BAT

ROYER

VIN

REF

NC

CCFL PGND

NC

LT1184F

LAMP

UP TO 6mA

10 6

L1

R1 750Ω

L2 100µH

3 2 1 54

+

+

ALUMINUM ELECTROLYTIC IS RECOMMENDED FOR C3B WITH AN ESR ≥ 0.5Ω TO PREVENT DAMAGE TO THE LT1184F HIGH-SIDE SENSE RESISTOR DUE TO SURGE CURRENTS AT TURN-ON.

C7, 1µF

C1* 0.068µF

D1 1N5818

C5 1000pF

R2 220k

R3 100k

C3A 2.2µF 35V

C4 2.2µF

1182 TA03

VIN ≥ 3V

C3B 2.2µF 35V

C2 27pF 3kV

+






COILTRONICS (407) 241-7876

Q2* Q1*

SHUTDOWN

0µA TO 45µA ICCFL CURRENT GIVES 0mA TO 6mA LAMP CURRENT FOR A TYPICAL DISPLAY.

R5 50k

10 TURN

R4 15.4k 1%

D5 BAT85

NC

22

LT1182/LT1183/LT1184/LT1184F


U

R2 40.5k

1182 TA04

1182 TA05

1182 TA08

1182 TA09

1182 TA10

1182 TA06

1182 TA07

1182 TA12

C1 2.2µF

R1 40.5k

+TO ICCFL PIN

LT1182/LT1183 ICCFL PWM Programming LT1183 ICCFL PWM Programming with VREF

LT1184/LT1184F ICCFL PWM Programming

LT1183 ICCFL Programming with Potentiometer Control

R1 AND R2 ARE IDEAL VALUES. USE NEAREST 1% VALUE.

R2 40.35k

C1 2.2µF

R1 40.35k

+TO ICCFL PIN


+

FROM VREF

TO ICCFL PIN

Q1 VN2222L

R1 330Ω

R2 7.15k

R3 7.15k

C1 22µF R1 PREVENTS OSCILLATION.


FROM VREF

TO ICCFL PIN

Q1 VN2222L

R1 3.57k R2

3.57kR3

7.15k

C1 22µF

V (PWM) 0V TO 5V

1kHz PWM 10 to 100% DC =

50µA TO 0µA R1, R2 AND R3 ARE IDEAL VALUES. USE NEAREST 1% VALUE.

+

VREF

R2 50k

R1 15.9k

TO ICCFL PINR1 AND R2 ARE IDEAL VALUES. USE NEAREST 1% VALUE. ICCFL = 12µA TO 50µA.

LT1184/LT1184F ICCFL Programming with Potentiometer Control

LT1182/LT1183/LT1184/LT1184F ICCFL Programming with DAC Control

VREF

R2 50k

R1 15.5k

TO ICCFL PINR1 AND R2 ARE IDEAL VALUES. USE NEAREST 1% VALUE. ICCFL = 12µA TO 50µA.

LT1184/LT1184F ICCFL PWM Programming with VREF

LT1183 ICCFL PWM Programming with VREF

+

FROM VREF

TO ICCFL PIN

Q1 VN2222L

R1 330Ω

R2 6.98k

R3 6.98k

C1 22µF

V (PWM) 0V TO 5V

1kHz PWM 0% to 90% DC =

0µA to 50µA

V (PWM) 0V TO 5V


0µA to 50µA

V (PWM) 0V TO 5V


0µA to 50µA

V (PWM) 0V TO 5V


0µA to 50µA

R1 PREVENTS OSCILLATION. R2 AND R3 ARE IDEAL VALUES. USE NEAREST 1% VALUE.

1182 TA11

FROM VREF

TO ICCFL PIN

Q1 VN2222L

R1 3.48k R2

3.48kR3

6.98k

C1 22µF

V (PWM) 0V TO 5V

1kHz PWM 10 to 100% DC =

50µA TO 0µA R1, R2 AND R3 ARE IDEAL VALUES. USE NEAREST 1% VALUE.

+

LT1184/LT1184F ICCFL PWM Programming with VREF

DAC

R1 5k

TO ICCFL PIN

R1 DECOUPLES THE DAC OUTPUT CAPACITANCE FROM THE ICCFL PIN.

STRAY OUTPUT CAPACITANCE

CURRENT SOURCE DAC

23

LT1182/LT1183/LT1184/LT1184F


U

LT1182 LCD Contrast Positive Boost Converter

C13 2.2µF 35V

BAT 8V TO 28V

POSCON VOUT ≥ VIN

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

ICCFL

DIO

CCFL VC

AGND

SHDN

LCD VC

CCFL VSW

BULB

BAT

ROYER

VIN

FBP

FBN

LCD VSW

CCFL PGND

LCD PGND

LT1182

+

C8 0.068µF R7

33K

R13 8.45k 1%

R14 1.21k 1%

C4 2.2µF

VIN ≥ 3V

R12 20k

+

C10 0.01µF

L3 50µH COILTRONICS CTX50-4

D5 1N914

+ C11 22µF 35V

1182 TA12

LT1182 LCD Contrast Positive Boost/Charge Pump Converter

C13 2.2µF 35V

BAT 8V TO 28V

POSCON VOUT ≥ VIN

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

ICCFL

DIO

CCFL VC

AGND

SHDN

LCD VC

CCFL VSW

BULB

BAT

ROYER

VIN

FBP

FBN

LCD VSW

CCFL PGND

LCD PGND

LT1182

+

C8 0.068µF R7

33K

R13 8.45k 1%

R14 1.21k 1%

C4 2.2µF

VIN ≥ 3V

R12 20k

+

C10 0.01µF

1182 TA13

L3 50µH COILTRONICS CTX50-4

D4 1N914

C11 22µF 35V

D5 1N914

+

+ C11 22µF 35V

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

24

LT1182/LT1183/LT1184/LT1184F


U

Linear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7487(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977

LT/GP 0495 10K • PRINTED IN USA

LINEAR TECHNOLOGY CORPORATION 1995

LT1182 LCD Contrast Positive to Negative/Charge Pump Converter

C13 2.2µF 35V

BAT 8V TO 28V

NEGCON |VOUT| ≥ VIN

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

ICCFL

DIO

CCFL VC

AGND

SHDN

LCD VC

CCFL VSW

BULB

BAT

ROYER

VIN

FBP

FBN

LCD VSW

CCFL PGND

LCD PGND

LT1182

+

C8 0.068µF R7

33K

5V

R10 10k 1%

R9 4.99k 1%

C4 2.2µF

VIN ≥ 3V

+

R11 20k 1%

C9 0.01µF

L3 CTX50-4 COILTRONICS CTX50-4

D4 1N914

C11 22µF 35V

D5 1N914

+

+

C11 22µF 35V

1182 TA14

PART NUMBER FREQUENCY SWITCH CURRENT DESCRIPTION

LT1107 63kHz 1A Micropower DC/DC Converter for LCD Contrast ControlHysteretic

LT1172 100kHz 1.25A Current Mode Switching Regulator for CCFL or LCDContrast Control

LT1173 24kHZ 1A Micropower DC/DC Converter for LCD Contrast ControlHysteretic

LT1186 200kHz 1.25A CCFL Switching Regulator with DAC for “Bits toBrightness Control”

LT1372 500kHz 1.5A Current Mode Switching Regulator for CCFL or LCDContrast Control

Dimensions in inches (millimeters) unless otherwise noted.PACKAGE DESCRIPTION

U

0.016 – 0.050 0.406 – 1.270

0.010 – 0.020 (0.254 – 0.508)

× 45°

0° – 8° TYP0.008 – 0.010

(0.203 – 0.254)

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006 INCH (0.15mm).

1 2 3 4 5 6 7 8

0.150 – 0.157* (3.810 – 3.988)

16 15 14 13

0.386 – 0.394* (9.804 – 10.008)

0.228 – 0.244 (5.791 – 6.197)

12 11 10 90.053 – 0.069 (1.346 – 1.752)

0.014 – 0.019 (0.355 – 0.483)

0.004 – 0.010 (0.101 – 0.254)

0.050 (1.270)

TYP

S Package16-Lead Plastic SOIC

RELATED PARTS

Documents

LT1182/LT1183/LT1184/LT1184F - CCFL/LCD Contrast Switching ... · CCFL VC Offset Sink Current CCFL VC = 1.5V, Positive Current Measured into Pin –5 5 15 µA ∆CCFL V C Source Current