GaN on Si HEMT Process Transfer and Qualification

Nitronex Corporation &

Global Communication Semiconductors

Nitronex Corporation 2

Overview

• Purpose of outsourcing wafer fabrication– Goal: Improve manufacturability and

technology leadership– Partnership: Long-term agreement with GCS

to provide exclusive foundry services– Implementation: Three Phase Project

• Module: Groups of process steps• Integration: Start to finish lot processing• Qualification: Verification of entire process

– Results: GCS process met all qualification requirements

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Technological Considerations

• Critical Aspects– Epi (unchanged)– Schottky Contact– Alignment– Passivation– Same Materials– Dimensions

• Less Critical– Interconnects– Backend

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Project Flow

no

Planning

yesModule Development

Module Acceptance

Process Integration Lots

yes

no

Meet unit specs?

Meet electrical specs?

All modules complete?yes

Module & Qual Requirements

Map to GCS Tool Set

Meet all specs?

Process Qualification Lots

no

yes

no

Meet Qual specs?

yes

GCS processqualified

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Planning Phase

• Process engineering teams collaborate – Nitronex NRF1 process reviewed “hands-on”– GCS equipment and process capabilities reviewed

• Identified major gaps– Purchase tools and facilitate

• Ohmic RTA• Sputter Tool• 200V SMU

– GCS hired additional technical staff• Adopted improved GCS processes

– Positive tone photoresist• Improved stripping• Does not require aggressive chemical strippers• Less residues

– Novellus PECVD

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Process Module Acceptance Criteria• Fab Process Divided into Modules

• Acceptance Criteria Established for Each Module

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Module Flow

• For module development we used a hybrid process to determine whether module met acceptance criteria– Initial lot processing at Nitronex – Specific module lot processing at GCS

• Only after successful module development

– Balance of lot processing at Nitronex

• PCM Testing at Both Fabs• Data Review / Follow-up Actions• Formal Report / Acceptance

See appendix for test limits

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PECVD Module Challenge

Difficulty matching Nitronex Silicon Nitride

• GCS Plasma-Therm PECVD– no backup tool; primarily development use– Film had 100% higher wet etch rate

• GCS Novellus PECVD – Primary Choice– Two Production tools; provides redundancy – Met all unit specs, except stress– Required significant development

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PECVD Solution

• Novellus film’s tensile stress decreased adding low frequency RF component

• Concern of damage to GaN surface prevented using low frequency RF

• Unaxis film’s low tensile stress obtained by controlling carrier flow ratio1 without LF RF

• Acceptably low stress film achieved on Novellus without LF RF by controlling carrier gas flow ratio

[1] Kenneth D. Mackenzie, Brad Reelfs, Michael W. DeVre, Russell Westerman, and David J. Johnson, CS Mantech (2004)

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New GCS Novellus PECVD Film Meets All Specs

GCS PECVD Nitronex

GCS Module Lot Meets Acceptance Criteria for On-Wafer Saturated Power

GCS Passivation Module LotsOn-wafer Saturated Power*

Psa

t (W

/mm

)

target

USL

Device2mm CPW10x200um

Test Planf=2.14GhzCWVds=28VIdsq=55mAFixed standardproductionimpedance

* Testing performed at Nitronex

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Integration Phase

• Successful completion of all modules• Integration lots processed entirely at GCS• New drain leakage problem surfaced 1st Integration lot

Integration Phase

100V IDLK*

Id: mA/mmVds=100V Vgs=-8V Wg=100um

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Leakage Problem

• Wafer process timeline points to Ohmic module cause of leakage

• Leakage not historically associated with ohmic module at Nitronex

• Available qual lot converted into DOE

• DOE Isolated problem to Ohmic RTA• 2nd DOE Confirmed RTA Problem

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Leakage Problem Resolved

• Logsheet indicated RTA system ran GaAs wafers before integration phase

• Problem correlated to visual appearance– Alloyed ohmic morphology changed

• New quartz chamber resolved issue

• Concluded ohmic module leakage problem caused by contaminated chamber

• Segregated GaN and GaAs to prevent reoccurrence

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Ohmic Metal Morphology Difference

CONTROLS

1. Temperature: both at 880 °C

2. Atmosphere: both in N2

3. No Exhaust Leak

4. Pre-alloy descum: both at NTX

GCS OH RTA

Nitronex OH RTA

After replacing RTA chamber,GCS RTA’ed film looks similarto Nitronex alloyed ohmic film

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Qualification Phase

• 4 distinct lot sampled

• Followed Nitronex standard production assembly flow

• NPTB00025 Device– 8mm 25 Watt Broadband HFET

• GCS fabricated devices passed all Nitronex process qualification specifications (see table next slide)

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GCS NRF1 Process Qualification Requirements

Note: All sample sizes reflect LTPD level 5

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Conclusions

• Nitronex GaN HEMT NRF1 process successfully transferred and qualified at GCS– Meets in-line PCM specifications– Meets process qualification requirements

• Including 1000 hour HTOL• MMIC process also qualified

– NRF1 GaN process is highly compatible with existing GaAs process fabrication, but requires:

• Specifically tailored Silicon Nitride film• Separate Ohmic RTA due to susceptibility to GaAs contamination

– Partnership with GCS Provides Additional Benefits• Production tool set reduces handling defects• Redundant equipment providing backup• Lower overall cost and increased capacity• All positive tone photoresist provides improved resolution, metal

liftoff and cleanliness• 0.25µm capability enables future X- and Ku-band devices/MMIC’s

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Acknowledgements

• Nitronex Team– John Bell, Jeannette James, John Kearney,

Brad Krongard, Tom Lepkowski, Pradeep Rajagopal, Brook Raymond, James Shen, Keith Will

• GCS Team Members– Chung-hsu Chen, Minkar Chen, Daniel Hou,

Chuanxin Lian, Libo Song, William Sutton, Alex Vigo, Chao Wang, David Wang, Shiguang Wang

Appendix

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Parameter Description Units LSL TGT USL

BVDG Two Terminal Off-State Breakdown Voltage V 135 160 -BVDS Three Terminal Off-State Breakdown Voltage V 95 130 -GMX Maximum Extrinsic Transconductance mS/mm 250 290 330

IDLK_100 Drain Leakage at 100V mA/mm - 0.2 1.0IDMAX Maximum Open Channel Current mA/mm 760 830 900

LOG_ISO Isolation Leakage Current - LOG10 Log(A) - -9 -8RC_TLM Contact Resistance Ohm mm - 0.38 0.55

RDON On Resistance Ohm mm 2.4 3.0 3.6RSH_CRBME Epitaxial Layer Sheet Resistance Ohm/sq 440 490 530

VP Pinchoff Voltage V -1.50 -1.25 -1.00

Parameter Description Units LSL TGT USLW_CRBME Epitaxial Effective Line Width (9um nominal) um 8.5 9 9.5

RSH_CRBTF Thin Film Sheet Resistance Ohm/sq 19.0 20.0 21.0W_CRBTF Thin Film Effective Line Width (10um nom.) um 8.5 9 9.5

TF_TCR_RSH Temerature Coeficient - Thin Film Sheet Resistance ppm/C - 100 -

CAP_MIM MIM Capacitance fF/um2 0.144 0.15 0.156

MIM_ILK_100 MIM Capacitance Leakage Current at 100V uA/mm2- 3.00E-03 1

Parameter Description Units LSL TGT USLNPSAT_W_MM Saturated Output Power W/mm 3.4 3.9 -

DEFF_MAX Drain Efficiency at Maximum Saturated Power % 57 62 -

Discrete + MMIC Process Specifications

DC Specifications

DC Specifications – MMIC Specific

RF Specifications

The wafers are tested against requirements at key points in the process similar to a GaAs foundry