Monday, March 7Monday, March 7 Homework #2Homework #2

Solutions is postedSolutions is posted Homework #3 (in class)Homework #3 (in class)

Solutions will be posted tomorrowSolutions will be posted tomorrow Homework #4 is postedHomework #4 is posted Quiz 4 on WednesdayQuiz 4 on Wednesday

Program #5 is due FridayProgram #5 is due Friday Evaluation criteria are postedEvaluation criteria are posted If you haven’t used your late allowance, absolute If you haven’t used your late allowance, absolute

deadline is midnight Sunday.deadline is midnight Sunday. Questions?Questions?

Today's topicsToday's topics

MASM: advanced featuresMASM: advanced features

Ripple carry adderRipple carry adder

““Growing” an Growing” an ALUALU from from gatesgates

Full-adder Full-adder 2s-complementer2s-complementerShifterShifterComparatorComparator

““Growing” an Growing” an ALUALU from from gatesgates

““Growing” a Growing” a CPUCPU from gates from gates

ALUALU

RegistersRegisters

Control UnitControl UnitClockClock

Instruction pointerInstruction pointer

Instruction fetch, decode, executeInstruction fetch, decode, execute

Operand fetch, storeOperand fetch, store

Addressing unitAddressing unit

CPU ChipsCPU Chips

Tying things together:Tying things together:the the internal businternal bus

Control Unit, ALU, Registers, Addressing Unit Control Unit, ALU, Registers, Addressing Unit communicate via a bus.communicate via a bus.

Speed depends onSpeed depends on Bus width: number of bits that can transfer Bus width: number of bits that can transfer

simultaneouslysimultaneously Bus lengthBus length

Synchronous vs asynchronous busesSynchronous vs asynchronous buses Synchronous means “tied to clock pulse”Synchronous means “tied to clock pulse”

Bus arbitrationBus arbitration Multiple busesMultiple buses

““Growing” Growing” memorymemory from from gatesgates

LatchesLatcheschipschips RAM (Random Access Memory)RAM (Random Access Memory)

SRAM (Static RAM)SRAM (Static RAM) DRAM (Dynamic RAM)DRAM (Dynamic RAM) SDRAM (Synchronous DRAM)SDRAM (Synchronous DRAM)

ROM (Read-Only Memory)ROM (Read-Only Memory) PROM (Programmable ROM)PROM (Programmable ROM) EPROM (Erasable PROM)EPROM (Erasable PROM) EEPROM (Electrically EPROM)EEPROM (Electrically EPROM)

Memory organizationMemory organization Memory addressingMemory addressing

MemoryMemory

Digital logic:Digital logic: Clocked Clocked SRSR latches ( latches (SSet / et / RReset)eset) Clocked D latchesClocked D latches D flip-flopsD flip-flops

Memory refreshMemory refresh OrganizationOrganization

matrixmatrix

Memory typesMemory types

TypeType CategoryCategory ErasableErasable Byte Byte alterablealterable VolitileVolitile UseUse

SRAMSRAM Read/writeRead/write ElectricElectric YesYes YesYes CacheCache

DRAMDRAM Read/writeRead/write ElectricElectric YesYes YesYes Main Main memorymemory

SDRAMSDRAM Read/writeRead/write ElectricElectric YesYes YesYes Main Main memorymemory

ROMROM Read-onlyRead-only NoNo NoNo NoNo BootBoot

PROMPROM Read-onlyRead-only NoNo NoNo NoNo SpecialtySpecialty

EPROMEPROM Read-Read-mostlymostly

UV lightUV light NoNo NoNo PrototypinPrototypingg

EEPROEEPROMM

Read-Read-mostlymostly

ElectricElectric YesYes NoNo PrototypinPrototypingg

FlashFlash Read/writeRead/write ElectricElectric NoNo NoNo Digital Digital film, etc.film, etc.

(Optional)(Optional)SRAM Feedback InvertersSRAM Feedback Inverters

(Optional) Latches (1)Latches (1)

(a) NOR(a) NOR latch in state 0. latch in state 0.(b) NOR(b) NOR latch in state 1. latch in state 1.(c) Truth table for (c) Truth table for NOR.NOR.

(Optional) Latches (2)Latches (2)

A clocked SR latch.A clocked SR latch.

(Optional) Latches (3)Latches (3)

A clocked D latch.A clocked D latch.

(Optional) Flip-FlopsFlip-Flops

Pulse generator

More features of MASMMore features of MASM Low-levelLow-level

Bit shiftingBit shifting Real-address modeReal-address mode Interrupts and interrupt handlersInterrupts and interrupt handlers

Higher-levelHigher-level Data structuresData structures Conditional directivesConditional directives Multi-module programsMulti-module programs High-level language interfaceHigh-level language interface Win32 console modeWin32 console mode

Bit shiftingBit shifting

Examples:Examples:movmov eax,10eax,10

shlshl eax,4eax,4 ;multiply by 16;multiply by 16

;zero-fills on right;zero-fills on right

movmov eax,10eax,10

shrshr eax,2eax,2 ;integer divide by 4;integer divide by 4

;zero-fill on left;zero-fill on left

;remainder is dropped;remainder is dropped

Useful for base 2 arithmetic, bit mask shiftingUseful for base 2 arithmetic, bit mask shifting

Real-address modeReal-address mode Permits access to all of memory (unlike Permits access to all of memory (unlike

Protected mode)Protected mode) Required for interrupt processingRequired for interrupt processing Addresses are 16-bit segment : 16-bit Addresses are 16-bit segment : 16-bit

offsetoffset OK to use DWORD and extended (32-bit OK to use DWORD and extended (32-bit

registers)registers) Setup required:Setup required:INCLUDEINCLUDE Irvine16.incIrvine16.inc.data.data; ...; ....code.codemainmain PROCPROC

movmov ax,@dataax,@datamovmov ds,axds,ax

Real-address modeReal-address mode INCLUDEINCLUDE Irvine16.incIrvine16.inc inserts the inserts the

following directivesfollowing directives

.MODEL.MODEL small,stdcallsmall,stdcall

;enables C-style parameters;enables C-style parameters

.STACK.STACK 200h200h ;doubles default stack size;doubles default stack size

.386.386 ;enables extended registers;enables extended registers

exitexit EQUEQU <.EXIT><.EXIT>

Interrupts, interrupt Interrupts, interrupt handlinghandling

All modern operating systems are All modern operating systems are interrupt-driveninterrupt-driven

Interrupts may come from Interrupts may come from External ports/devices (hardware External ports/devices (hardware

interrupts)interrupts) Mouse, keyboard, NIC, etc.Mouse, keyboard, NIC, etc.

Program statements (software interrupts)Program statements (software interrupts) Read/write, etc. from/to files/devicesRead/write, etc. from/to files/devices

Operating systemOperating system Exceptions, errorsExceptions, errors

Interrupts (in real-address Interrupts (in real-address mode)mode)

Interrupts are numbered (associated Interrupts are numbered (associated with an index in the with an index in the interrupt vectorinterrupt vector)) Interrupt vector is stored in static location Interrupt vector is stored in static location

(architecture-dependent)(architecture-dependent) Interrupt causes OS to look up address Interrupt causes OS to look up address

of of interrupt handlerinterrupt handler in the in the interrupt interrupt vectorvector

The CPU pushes all registers/flags, The CPU pushes all registers/flags, disables hardware interrupts, and calls disables hardware interrupts, and calls the appropriate interrupt handlerthe appropriate interrupt handler

The interrupt handler executes until it The interrupt handler executes until it hits hits IRETIRET

Example MASM interruptsExample MASM interrupts

10h10h video servicesvideo services 1Ah1Ah time of daytime of day 21h21h many I/O functionsmany I/O functions

In general, “parameter” flags are set In general, “parameter” flags are set in the AH or AX registerin the AH or AX register

Examples: Firing an Examples: Firing an interruptinterrupt

movmov ah,1ah,1 ;select “getChar” ;select “getChar”

intint 21h21h ;get keyboard ;get keyboard character character

; into AL.; into AL.

movmov ax,716Chax,716Ch ;select “open file”;select “open file”

movmov bx,0bx,0 ;read-only;read-only

movmov cx,0cx,0 ;normal attribute;normal attribute

movmov dx,1dx,1 ;file exists;file exists

movmov si,OFFSET fileNamesi,OFFSET fileName

intint 21h21h

Real-mode programmingReal-mode programming

Experiment!Experiment! Real-mode programming can be Real-mode programming can be

challenging and funchallenging and fun Real-mode programming can cause Real-mode programming can cause

bizarre problemsbizarre problems

Questions?Questions?

Do Homework #4Do Homework #4