Operating Systems I
Stephen [email protected]
18 January 2010
These exercises are intended to cover all the main points of understandingin the lecture course. There are roughly 1112 questions per lecture, and eachquestion is supposed to take roughly the same amount of time to complete.Dont expect to be able to answer everything. You are advised not to spendmore than an hour on any one question unless you really want to.
Compared to Tripos questions, these questions will generally be morestructured and require smaller steps of reasoning. However, with the excep-tion of the first few, they should be no more or less difficult conceptually.Unlike most Tripos questions, most of these can be answered quite briefly,so you should expect to spend more time reading and thinking than youspend writing answers.
Be warned that Tripos exams frequently contain bookwork questions,and you will be expected to remember incidental facts from the lecture noteswhich are not covered here.
Criticisms or comments about any aspect of these questions would bevery gratefully received, however large or small.
1. Architecture, memory hierarchy and the fetch-execute cycle
The following diagram shows a simple Von Neumann machine.
(a) Copy the diagram above, and add the following labels in theappropriate places:
register file control unit execution unit cache memory processor bus memory bus main memory I/O bus
Draw arrows to show the paths of communication between theregister file, control unit and execution unit.Draw a dashed box around any data paths which were not presentin architectures predating the Von Neumann machine.
(b) An execution unit may contain many different functional sub-units, but three in particular are always present. Give the namesof these, and identify which of them might output a signal con-necting to an input on the control unit.
(c) (i) Explain why all modern systems have cache memory in ad-dition to main memory.
(ii) A naive system designer calculates a systems total memoryas the sum of sizes of its caches and the size of its main mem-ory. Explain why this does not give a meaningful result.
(iii) If one memory device is said to be below another in amemory hierarchy, what two comparisons can be deducedbetween the two devices storage technologies?
(iv) Suggest what lies above the cache memory in the memoryhierarchy of the machine you drew in part (a).
(d) Briefly describe the sequence of events occurring as the processorundergoes a series of clock cycles. Assume that the processor isinitially about to fetch an instruction. Make sure you explainthe roles of memory, execution unit, control unit and programcounter.
(e) The Harvard architecture is similar to the Von Neumann archi-tecture except that it has separate caches for instructions anddata. Suggest one plausible reason why this might be advanta-geous, and one situation where it might cause problems.
2. Arithmetic, memory access, addressing modes and endianness
(a) (i) In eight-bit signed twos complement binary arithmetic, writethe bit-patterns for the decimal numbers 0, 1, 127, -1, -127and -128. [The bits should be ordered from most-significantto least-significant.]
(ii) Explain why the range of an n-bit twos complement repre-sentation is always one greater than that of a sign/magnituderepresentation.
(iii) Explain why twos complement is used in preference to otherschemes in all modern architectures.
(b) (i) Explain what is meant by shifting, as might be done in thethe arithmetic & logical unit (ALU) of a processor.
(ii) Explain how shifting can sometimes be used instead of multi-plication and division, and why this can be advantageous.
(iii) Explain the distinction between logical and arithmetical shift-ing, with reference to signed arithmetic.
(c) (i) Apart from operands (arguments), give two examples of in-formation which information which might be included in therepresentation of a machine instruction.
(ii) Identify three ways in which arguments to an instruction canbe specified.
(iii) Explain the benefits and drawbacks of a fixed-length instruc-tion encoding (such as on the ARM architecture) comparedto a variable-length encoding (such as on x86).
(d) (i) Explain the term byte order (or endianness) by drawinga diagram to show how how the 32-bit hexadecimal number00C0FFEE is represented differently in the memory of 32-bitbig- and little-endian machines.
(ii) Similarly, draw a digram showing how the string Hello,world! is stored in memory on big- and little-endian ma-chines. You need not convert the characters to numericalrepresentations, and should assume a one-byte-per-characterencoding.
(iii) Explain why there is no need for architectures offering only8-bit arithmetic and 8-bit memory accesses to specify a byteordering convention.
(iv) Suppose you wanted to write an assembly-language routinewhich counted the length of a null-terminated string by iter-ating over the characters until you reached the end. Explainhow you would store the current location in the string, andwhich addressing mode you would use when reading the nextcharacter. Assuming you could only read and compare fourbytes at a time, what arithmetic and/or logical instructionscould you use to detect the strings null terminator?
[A null-terminated string is one which is represented in mem-ory as a sequence of character values followed by a zero-valued null byte. You should assume a one-byte encodingas previously. An answer in pseudo-assembly code is accept-able.]
3. I/O: buses, interrupts and direct memory access
(a) Briefly explain the term bus. Explain the purpose of address, dataand control lines. In a synchronous bus, what specific control lineis always found?
(b) Explain the terms master and slave in relation to buses. Givean example of a device which is always a master, and one whichis always a slave.
(c) Explain what an interrupt line is, and why it is used. Suggestwhich functional unit of the processor it connects to. Explainwhat happens to the processors flow of execution when an inter-rupt line is asserted.
(d) Explain the key difference between direct memory access (DMA)and simple interrupt-driven I/O. Why might DMA introduce ad-ditional complexity to the processors cache memory?
4. Operating system concepts and structure
(a) Consider the statement that an operating system should securelymultiplex a computers hardware resources. Give four examplesof resources to which this statement might be referring. Ex-plain the term multiplex. Give an example of an insecure wayto multiplex one of the resources you mentioned.
(b) Explain the term multiprogramming. Explain why a systemwhich is not multiprogrammed does not need secure multiplexingof resources. Suggest what function(s) an operating system mightstill be used for on such a system.
(c) Consider multiplexing of CPU time, I/O devices and memory. Ineach case, explain what hardware support is necessary to ensuresecure multiplexing.
(d) What is a software interrupt? Explain why these might not nec-essarily be found in a monolithic operating system, but are alwaysfound in kernel-based systems. [Note that, for reasons which willbecome clear, most monolithic OSes do, in fact, provide softwareinterrupts.]
(e) How does a microkernel differ from a conventional kernel? Brieflylist the motivations and difficulties behind this.
5. Processes and scheduling
(a) Briefly explain the terms terms process and context switch.
(b) Draw a state diagram showing the three basic states a processmay be in, and the events which cause it to transition betweenthese. Give a specific example of an event which might cause aprocess to transition from blocked to ready.
(c) Explain why non-preemptive scheduling is more likely to be fairfor I/O-bound processes than for CPU-bound processes.
(d) For each of the following scheduling algorithms, briefly describetheir operation and list their advantages and disadvantages.
(i) first-come-first-served (FCFS)
(ii) shortest job first (SJF)
(iii) round robin (RR)
(iv) shortest remaining time first (SRTF)
(e) Explain the concepts of priority and quantum in scheduling al-gorithms. Which of the above algorithms make use of these con-cepts?
(f ) Explain the difference between static and dynamic priority, andthe motivation behind the latter. In what way might SJF andSRTF be considered dynamic priority algorithms?
6. Memory management basics: the relocation problem
A simple assembler outputs a program executable in the form of a listof instructions (or text), a list of words containing global constant dataand a list of words containing initialised global variable data. Whenthe program is loaded, each of these is read into a particular area ofmemory.
(a) Name two other regions of memory which will typically be al-located when the program is run, and will be accessible by theinstructions of the program. Briefly state the purpose of each.
(b) A direct branch instruction transfers control to an instruction ata known position (or offset) within the program text, where thisoffset is included as an argument to the instruction. How mightthe presence of this kind of instruction in a program lead to aninstance of the relocation problem?
(c) Describe a way of expressing the destination address of a di-rect branch, such that code which uses this instruction may beposition-independent, without requiring virtual addressing.
(d) DOS, a single-tasking monolithic operating system, allows someexecutables to directly specify the physical memory addresses oftheir constitue