Output compare

Structure of Microcontroller

ROM CO

UN

TER

INPU

TS

OSC

INTERRUPTCONTROL

4 I/OPORTS

BUSCONTROL

SERIALPORT

EXTERNALINTERRUPTS

CPU

ON - CHIPRAM

ETC

TIMER 0

TIMER 1

ADDRESS/DATA

TXD RXDP0 P1 P2 P3EA, RST, ALE, PSEN

Structure of Microcontroller

U 1

A T8 9 C 5 1

3 1

1 91 8

9

1 21 31 41 5

12345678

3 93 83 73 63 53 43 33 2

2 12 22 32 42 52 62 72 8

1 71 6

2 93 01 1

1 0

4 0

2 0

E A / V P

X1X2

R E S E T

I N T0I N T1T0T1

P 1 . 0P 1 . 1P 1 . 2P 1 . 3P 1 . 4P 1 . 5P 1 . 6P 1 . 7

P 0 . 0P 0 . 1P 0 . 2P 0 . 3P 0 . 4P 0 . 5P 0 . 6P 0 . 7

P 2 . 0P 2 . 1P 2 . 2P 2 . 3P 2 . 4P 2 . 5P 2 . 6P 2 . 7

R DW R

P S E NA L E / PTXD

R XD

V C C

V S S

What are Interrupts?

• A hardware event is something that happens in the micro-controller's hardware.

• An example of an event is the RESET that occurs when pin 9 is set low.

• Micro-controllers are micro-computers whose architecture has been optimized to respond quickly to external events.

Output Compare Interrupts

• Output compare interrupts are hardware interrupts that are tied to timer events and this means that they can be used by a micro-controller to enforce the real-time processing of events.

• The output compare event can also be used to effect specific output pins.


• In particular, you will use the output compare interrupt to build a system that outputs a specified voltage using a pulse-width modulation scheme.


• In the Microcontroller output compare events are tied to a 16-bit hardware register (also called a timer)

• This register is incremented at a rate that can be specified by the programmer.


• When the value of timer register equals the value stored in another output compare register, then an output compare event occurs and the Microcontroller responds by issuing an output compare interrupt.

• The counter register cannot be reset or stopped by the user.


• So to generate timing events, we compare the value in timer register against another number that is held in an output compare register.

• When the value in timer register matches the number in the output compare register, we trigger an output-compare event.


• Output compare events are generated in the micro-controller's hardware.

• This event will result in a hardware interrupt (also called an output compare interrupt) being generated if the interrupt is enabled


• Enabling the interrupt means that the software pays attention to the interrupt.

• We enable all interrupts by setting the I bit in the condition code register of the micro-controller. This is bit is usually set in the init() function

IEN0 - Interrupt enable register 0

CMOD - PCA counter mode register (address D9H) bit allocation

CMOD - PCA counter mode register (address D9H) bit allocation

CCON - PCA counter control register (address 0D8H) bit description

CCON - PCA counter control register (address 0D8H) bit description

CCAPMn - PCA modules compare/capture register

CCAPMn - PCA modules compare/capture register

PCA IN COMPARE MODE

PCA IN COMPARE MODE

• The 16-bit software timer mode is used to trigger interrupt routines, which must occur at periodic intervals.

• It is setup by setting both the ECOM and MAT bits in the module’s CCAPMn register

PCA IN COMPARE MODE

• The PCA timer will be compared to the module’s capture registers (CCAPnL and CCAPnH)

• when a match occurs, an interrupt will occur, if the ECCFn (CCAPMn SFR) bit for the module is set.

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vd3 Output Compare

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Output compare