Peps Lectures

Application of Power Electronics in Power SystemsB. G. Fernandes

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EE 660Application of Power Electronics

in Power Systems

B. G. FernandesDepartment of Electrical EngineeringI. I. T [email protected]


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Course Outline

• Introduction

• Load Compensation

• Shunt Compensation

• Series Compensation

• HVDC Transmission

TheoryEquipmentTheoryEquipment


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Books for Reference• T. J. E. Miller “Reactive power control in Electrical system,” John Wiley & Sons, New York, 1982.

• K. R. Padiyar “FACTS CONTROLLERS in Power Transmission & Distribution,” New Age International (P) Ltd.,” 2007.

• K. R. Padiyar “HVDC POWER TRANSMISSIONSYSTEMS Technology and System Interactions,” New Age International (P) Ltd.,” 1990.

• Hingorani N. G “Understanding FACTS Concepts & Technology of FACTS Systems,” IEEE PRESS, 2000.


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Introduction

“Power Electronics has grown as a major & extremely important discipline in Electrical Engg.”

What are major applications of Power Electronics ?

• Major role in Power Transmission & Distribution


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• Consumption of Electricity are Demanding Customers

• Loss of Power for single cycle can make computer screen go blank

• Can interrupt sensitive Electronic equipment


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• Consumption of Electricity is also

• Transmission lines are being operated close to their limits

• Power is being transmitted through long overhead transmission lines & they are interconnected


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• Voltage limit

• Stability limit

SIL

THERMAL LIMIT

Voltage and Stability Constraints

Distance

P

• Thermal limit (depends on ambientconditions)


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Type of conductors• Thermal limit No. of Conductors

Ambient conditions

• Voltage limitations• For typical 400 kV line Zc = 300 Ω

SIL = 540 MW• For cable SIL is large


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• Voltage profile along the line is flat if P = SIL

• If VS = VR = 1, V ↓ as we move towards the midpoint, if Ps > SIL

P < SIL

P > SIL

P = SIL

VS VR


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• Line absorbs reactive power

• V ↑ if PS < SIL

• Voltage swell, line generates ‘Q’

Transmission Lineis iR

VRVs

P, Q P, Q


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• To control VR & ↑ power transfer capacity of the line, ‘Q’ generation is required at the receiving end


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CXVQ

2

= ↓ As VR ↓

‘Q’ requirement ↑ as VR ↓

• Other limitations

• ‘L’ required during over voltage

• Separate ‘L’ & ‘C ’ are required


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• High ‘V’ & high KVar source

• 3-ph inverter can supply Q±

• Requires only ΔP


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O/P V => PWM

• 2- level inverter

• Harmonic spectrum depends on switching

frequency (FS)

• PWM Constant FS

Variable FS => Not suitable


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• What sort of PWM technique to use ?

• With low switching frequency how to improve the harmonic spectrum

• Do we need to change the power circuit configuration ?


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• To have sufficient stability margin max. length of line = 450 km

• Provide shunt reactive power compensation, there by P↑ & maintain V profile.

• Use a mid point compensator

δSinXVV RS=Ρ


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VVVV RSm ===

tedUncompensaPSinXVP 2

22 2

=⎟⎠⎞

⎜⎝⎛=δ

It can be shown, for loss- less line


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• “If shunt compensation is applied at sufficient close interval, it may be possible to transmit power up to thermal limit of line”

• P transmitted over long lines is limited by series reactance ‘X’


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Provide • Series capacitive compensation to cancel a

portion of series ‘X’

δ


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• C is not permanently connected in series• During fault condition, Xeff should be

increased• May require ‘L’ also

( ) δSinXK

VP−

=1

2

K = Degree of compensation = XXC

puVV RS 1==


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• Is it possible to change the phase angle difference between two ends of the line and there by control the power flow

• “Phase angle regulator” ?

• Inject a voltage in series with the line & proportional to the current flow (voltage should lag the I )


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δ


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• Injecting V in series with line and with any phase angle with respect to VS

δ

• Both magnitude & phase angle of I has changed

• Both P & Q flow has changed


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• Consider an AC network

• Power flow in Line-1 & 2 depends on circuit conditions

• Lower X line may be over loaded• Not possible to set the amount of power that

should flow through a particular line!


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• Definite amount of power that should flow through HVDC line can be set

• If power transfer over long distances• Two near by areas having different

frequencies ( Back to Back connection)


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• Power flow control through AC lines is not “FLEXIBLE”

• Depending upon the loading, there could be voltage swell or sag as we go towards the mid point

Review

V1 V2

R+jX


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• To control the power flow & to maintain voltage profile, provide

• Shunt compensation

• Series compensation

Passive elements with P.E switches or

Inverter

• At Tr. voltage levels PWM with high switching frequency may not be possible

• Modify the existing power circuit

• Can we regulate the power flow by converting AC-DC-AC => HVDC Transmission ?


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Load compensation• Loads are unbalanced• P.F is lagging

No compensation of harmonics

• Source should supply only active power &

see a balanced load

Introduction ( contd…)


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• Most of the loads are Non-linear

• Harmonics are generated

• Voltage at P.C.C is non sinusoidal

• P.F is lagging

• Circuit to filter the harmonics (on-line) + compensate the loads


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P.C.C Point of common coupling→


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Current drawn by the load fed from P.E. equipment flows through system impedance. Voltage at P.C.C is non-sinusoidal(We had assumed that 'V' is sinusoidal).


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5 7

1

a 02 3 1 1i = I sin t- sin t+ sin t-.............

5 7= 6N , Harmonics

Line Commutated converter causes notches in the source voltage waveform.

Source current has harmonics.

ω ω ωπ

⎡ ⎤⎢ ⎥⎣ ⎦

±⇒ →

→


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Effect of harm onics:A. In the Rotating m achine Increases heating.

They produce noise.Torque pulsations.

B. In Transform ers Cu losses .Audible noise & heating.

C. In Cables Additional heating.

D. P.F corre

→→→

→ ↑→

→

ction capacitors. Therm al voltage stress.

E. Electronic Equipm ents Affects control system .M aloperation of relays.

→

→→


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• Load compensation + Active filter

• Depending upon the voltage & power level, circuit configuration & control should change


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• Load compensator + Active filter to compensate non-linear loads

• Power flow in AC network is determined by circuit conditions

• Power transfer capability can be increased through shunt & series compensation

• HVDC can be used for bulk power transmission & to inter connect the systems of different frequencies

Conclusions


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• In ideal power system• V & F should be constant• V should be sinusoidal• P.F = 1

• The above should be independent of size & characteristics of load

• No interference between different loads

Load compensation


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• How nearly constant are V & F at the supply point ?

• How near to unity is the P.F ?

• In 3-ph system, degree to which V & I are balanced

Notation of quality of supply


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• What are the characteristics of power system & loads which can deteriorate the quality of supply ?

• How to compensate ?

Objectives of load compensation• Power factor correction• Improvement in voltage regulation• Load balancing


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• Correct the power factor to unity• Reduce the voltage regulation to an

acceptable value• Balance the load current => not expected to

compensate harmonics in V & I, also will not generate harmonics

• Should consume zero avg. power• Response time = 0

Ideal compensator


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• Large no. of uncompensated industrial loads, P.F is less than 0.8 ( they are non linear also)• Arc furnace, induction furnace, steel rolling

mills, large motor loads• ‘S’ rating of the compensator (P=0)

Load requires P.F correction

LLLLL SSQ Φ−=Φ== 2cos1sin

PL

QLSL

ФL


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• Which is the most important parameter of the load & supply system affects regulation ?

Voltage regulation

E

V

IS

RS+jXS

Sl = PL +jQL

YL = GL +jBL

IL


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VVE

VVE

Vreg

−=

−=

LS IZV =Δ

IL= IS

IS RS

I S X S ΔVX

ΔVR

ΔVV

ENo compensator IL= IS

LLL jQPVI +=*


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VjQPI LL

L−

=

( )V

jQPjXRV LLSS

−+=Δ

VQRPXj

VXQPR LSLSSLLS −

++

=

XR VjV Δ+Δ=• Change depends on both active & reactive power of the load


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E

V

IS

RS+jXS

IL IC

Replace QL by

( ) ( )222XR VVVE Δ+Δ+=

CLS QQQ +=

)(22

AV

QRPXV

XQPRV SSLSSSLS −−⎭⎬⎫

⎩⎨⎧ −

+⎭⎬⎫

⎩⎨⎧ +

+=

Such that

Adding a compensator in parallel with load

So that VE =


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IL

I S R S

jIS X

S

ΔV

V

E

ICIS

Vary QS => ΔV rotates till VE =

Solve (A) with VE =

• There is always a solution for QC for any value of P


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• If the compensation is used to make P.F unity then

VPjXPRV LSLS +

=Δ

( )VPjXR L

SS +=• Independent of QL

• Not under the control of compensator• Passive reactive compensator can not maintain constant V & unity P.F at the same time


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*

2*

SCSCSCSCSC Z

EEIjQPS ==+=

,SSSC jXRZ +=

SCSC ZZ =*

SCSC

SCSCS SEZR Φ=Φ= coscos

2

SCSC

SCSS SEZX Φ=Φ= sinsin

2

Short circuit at the load bus• Approximate relationship for voltage regulation

ISC → S.C Current


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• Change in V influenced by ΔVR

• Neglect ΔVX

VXQPRV SLLS

R+

=Δ

VZQZP SCSCLSCScL Φ+Φ

=sincos

1≈VE

SCLSCLSCR QP

VZ

VV

Φ+Φ=Δ sincos2

SCLSCLSC

QPS

Φ+Φ= sincos1

Assume

E

V ΔVR

ΔVX


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• If short circuit resistance of source=0

SC

L

SQ

VV=

Δ

SC

L

SQ

VVE=

−

⎥⎦

⎤⎢⎣

⎡+=

SC

L

SQVE 1

1

1−

⎥⎦

⎤⎢⎣

⎡+=

SC

L

SQEV

⎥⎦

⎤⎢⎣

⎡−≈

SC

L

SQE 1

Slope = -E/SSC

VΔV

QL

=> CosФSC = 0


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• Assume all loads are fully compensated for reactive VA

120,120

,0

∠=−∠=

∠=

Lca

Lbc

Lab

VVVVVV

Load balancing

bccac

abbcb

caaba

IIIIIIIII

−=−=−= Vca Vab

Vbc


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jXV

RVI caab

a −=

XV

RV

jXV

RV LL 3001200 ∠

−∠

=∠

−∠

=

( )

⎭⎬⎫

⎩⎨⎧

−−=

⎭⎬⎫

⎩⎨⎧ +−=

Xj

XRV

jXR

V

L

L

2231

30sin30cos11


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RV

jXV

RV

jXVI LLabbc

b0120 ∠

−−−∠

=−−

=

RV

XVL −∠

=30

)2(2

12

3−−−

⎭⎬⎫

⎩⎨⎧

−−=Xj

RXVL

jXV

jXV

jXV

jXVI LLbcca

c −−∠

−∠

=−

−=120120

)3(

3030

−−−=

−∠−

∠=

XVj

RV

XV

L

L


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120∠= cb II

⎟⎟⎠

⎞⎜⎜⎝

⎛+−=−⎟⎟

⎠

⎞⎜⎜⎝

⎛−

23

21

21

23 j

Xj

Xj

RX

XRX 231

23

−=⎟⎟⎠

⎞⎜⎜⎝

⎛−

RX 3=


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Review

• Using passive reactive element, it is possible to achieve ΔV = 0

• ΔVX has negligible effect on ΔV

• Determined by ΔVR (≠ iSRS)

IL= IS

IS RS

I S X S ΔVX

ΔVR

ΔVV

E

V ΔVR

ΔVX

E


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• Using passive reactive element it is not possible to have ΔV=0 & P.F =1

• Load balancing• All three line currents are balanced if

RX 3=

Contd..


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9033

10

210332

121

30332

121

∠=⎭⎬⎫

⎩⎨⎧ +=

∠=⎭⎬⎫

⎩⎨⎧ −−=

−∠=⎭⎬⎫

⎩⎨⎧ −=

RV

RjVI

RV

Rj

RVI

RV

Rj

RVI

LLc

LLb

LLa

• Rule: For the load connected between line a-b, capacitor should be connected between b-c, and Inductor should be connected between c-a

Load balancing (Contd..)


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• Branch currents of Δ are unbalanced• Reactive power is balanced within Δ• Reactive power generated by C connected

between line b & c = Q is absorbed by L connected between c & a

abL

abL

abL jBGY +=• If the load is

abL

abC BB −=• Compensating susceptance

Comments


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• Each branch of Δ will have 3-parallel compensating susceptances

⎟⎟⎠

⎞⎜⎜⎝

⎛ −+−=

⎟⎟⎠

⎞⎜⎜⎝

⎛ −+−=

⎟⎟⎠

⎞⎜⎜⎝

⎛ −+−=

3

3

3

abL

bcLca

LcaC

caL

abLbc

LbcC

bcL

caLab

LabC

GGBB

GGBB

GGBB


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• Any linear unbalanced 3-Ф load can be transformed into a equal 3-Ф balanced load

• Net real power is the same• Corresponding elements are purely reactive

Observations

Corresponding to power consumed by the load

As the power varies, X also should change

3RX =


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• May not be possible• Most of the loads are non-linear =>

Harmonics + lagging P.F

P.F ≠ cosIV


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δsin1

XVVP SC=

IC1

VS VC1

jωLIC1If δ = 0

SC VV >1If

• IC1 is leading VS


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• Can be shown that if SC VV <1

⎟⎠⎞

⎜⎝⎛ −

⇒=LVVVIVQ CS

SCS ω1

1

dcC mVV α1

• Ic1 is lagging


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• Non ideal case

• Var generated α m α Vdc

IC1 VS jωLIC1

VC1IC1R

δ

IC1jωLIC1

VC1

δ VS


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• M => Magnitude of sine wave (not very popular)• Magnitude of space vector• T1 & T2 are to be determined

60sinsin

.60sin

)60sin(

2

1

θ

θ

mTT

TmT

C

c

=

−=

Intelligent controller is required


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• Vary Vdc

• Var supplied α Vdc

• Var generated is controlled by varying VC1 & iC1

• O/P voltage of inverter• Indirect current controller Synchronous link converter Var compensator (SLCVC) or STATCOM


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Review

• Linear lagging load can be balanced using passive elements

bcLY

abLY

caLY

caCB

abCB

bcCB

• Difficult to realize in real life

• Use V.S.I to supply ‘Q’


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• Similar to over-excited Syn. motor on No-load

• Draws only small ‘P’• ‘δ’ is very small

• In V.S.I δ =VC1

VS

• ‘VC1’ is synthesized using PWM

E

Vδ

Contd..


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• If space vector PWM is used at the Z.C instant of supply voltage, VS

* should lag by angle ‘δ’

• In sinusoidal PWM technique, fundamental component of VC1 is in phase with modulating wave

Contd..


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Harmonic elimination Techniques

Undesirable harmonics can be eliminated and fundamental can be controlled by creating notches at pre-determined angles

If 'n' switchings / cycle⇒ 14

• At the Z.C of supply voltage, modulatingwave should lag by ‘δ’


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(n-1) harmonics are eliminated & magnitude of fundamental can be controlled

4 switchings /(1/4) cycle ⇒

⇒

(α1, α2, α3, α4)

α1 < α2 < α3 < α4 < π/2


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• 3 significant harmonics = 0• Fundamental can be controlled

• Square wave has quarter wave odd symmetry

• Coefficient of the fundamental & harmoniccomponents are given by

( ) ( )⎭⎬⎫

⎩⎨⎧

−+= ∑=

m

kk

kn n

nb

1cos1214 α

π


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• Assume that there are 5 switchings / (1/4) cycle

• 4 harmonics can be made zero• In 3 phase, 3 wire system, triple harmonics

can be ignored

• So harmonics to be eliminated are 5th, 7th, 11th and 13th

3211 cos2cos2cos214 αααπ

−+−=b

cos2cos2 54 αα −+


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1 2 3 4

5

1 2 3

4

b = 1-2cos5 +2cos5 -2cos5 +2cos5

-2cos5 = 0

b = 1-2cos7 +2cos7 -2cos7

+2cos7 -

5

7

4 α α α α5π

α4 α α α

7πα 5

1 2

5

1 2

2cos7 = 0

b = 1-2cos11 +2cos11 ........................

-2cos11 = 0

b = 1-2cos13 +2cos13 ........................

11

13

α4 α α

11πα

4 α α13π

5 -2cos13 = 0α


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• Non-linear transcendental equations• Solve numerically• Choose required value for b1

⇒ Fundamental component

b1 = 0.986 p.u.• Immediate dominant harmonic ‘V’ gets

amplified

α1 = 10.514, α2 = 23.228, α3 = 29.289, α4 = 46.421, α5 = 50.157


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• Var supplied α Vdc

• Var generated is controlled by varying VC1 or iC1

• O/P voltage of inverter

• Indirect current controller Synchronous link converter Var compensator (SLCVC) or STATCOM


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( ) tVVtIi mm ωω cos&cos =Φ−=

tItI qP ωω sincos +=

ttItIi qP ωωω cos.sincos2 +=∴

How to calculate Ref. Var ?

( ) tI

tI qP ωω 2sin2

2cos12

+−=

Multiply by cosωt


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• Use a low pass filter ⇒ IP/2 ≈ average

• Remaining ⇒ Reactive power

• Limitations: Response time is poor⇒ min. one cycle


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• Compensator current is actually sensed & controlled to follow the reference

Controlled current SLCVC

• Source should supply active component of load current + compensate inverter loss


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• Reactive component of load current (iqL) should come from inverter

iC = iPC + iqL

iqL ⇒ obtained from Var calculatoriPC ⇒ Accounts for loss

• If there is a mismatch in power supply and consumed ⇒ VdC will change


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Control strategy -I


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• To ↑iC close S4 & S3 , To ↓iC open S4 & S3

• Response is fast• Switching frequency varies• Var calculator is required


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Review

• In harmonic elimination technique, if there are ‘n’ switchings / (¼) cycle, (n-1) harmonics can be eliminated & fundamental can be controlled

⇒ If ‘F’ of pre-dominant harmonic is > 2kHz

at 50Hz, up to 40th harmonic should be absent

⇒ 5, 7, 11, 13, 17, 19, 23, 25, 29, 31, 35, 37

⇒ 12 harmonics should be eliminated


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• 13 switchings / (¼ ) cycle• 13 non linear transdential equations to be

solved

• H. S. Patel & R. G. Hoft “Generalized technique of harmonic elimination and voltage control in thyristor inverters,” Part-1 harmonic elimination., IEEE Trans. Ind. Applicat., vol. IA-9, pp 310-317, May 1973.

Contd..


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• Compensator current iC = iPC + iqL ⇒sinusoidal if load is linear

• If iqL has the information about the non-linear, ⇒ iC is non

Controlled current SLCVC

Contd..

- sinusoidal


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Control strategy -II• Sense source current iS

⇒ Compare with sinusoidal reference current iS*


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• iS* is in phase with vS• iS is also in phase with vS• VdC is held constant• All the active power is supplied by the source• Rest (‘Q’ + Harmonic I) supplied by inverter

• iS = iL + iC

⇒ To ↑iS, ↑ iC⇒ To ↓ iS, ↓iC Using inverter switchings


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• Once in every cycle• If active power demand of the load has changed

in between +ve Zero crossings• Power is supplied by inverter⇒ VdC will ↓

• VdC > Vm ⇒ peak of VS

⇒ Large size ‘C’ is required

How often iS* is changed ?


89/454

• If Inverter iS* is changed in between the cycle

• Source ‘I’ will have a DC component

• Smaller size ‘C’ may be sufficient


90/454

• Current control is suitable for low power

• For high power loads switching ‘F’ ↓• Inverter ⇒ Voltage control

• Harmonic spectrum is inferior

• Load current has harmonics

• In addition inverter with voltage control also generates harmonics


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• Use two compensators & connect them in parallel

• Var generator ⇒ High power inverter• High V & high I

• Harmonic filter ⇒ Low power inverter• Switching frequency is high• Since low power, use current controlled

PWM technique


92/454

Active filter +Var compensator for high power


93/454

• Main compensator ⇒ Voltage control mode

• Aux. compensator ⇒ controlled current mode

• Generate iref ⇒ ref. I of suitable magnitude & in phase with source V

• Force iS = iCm + iCx + iL to follow the reference within a hysterisis band

• Error decides the switching instant of aux. compensator devices


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• To ↑ iS, ↑ iCx ⇒ close S4 & S3

• To ↓ iS, ↓ iCx ⇒ open S4 & S3

• Now iref = iL(p) + iCm(p)

Where iL(p) = Real component of load IiCm(p) = Real component of the main

compensator current


95/454

θδ

∠−∠−

=ZVVi CmS

Cm1

1

( )θ

δδ∠

+−=

ZjKVmVV dCdCS sincos

⎟⎟⎠

⎞⎜⎜⎝

⎛+=

22

2)(1

2)(1

1qpCmrealpCm

Cm

III


96/454

Control block diagram


97/454

• Var calculator determines Vdc*

Vdc* - Vdc ⇒ determines δ

• µC ⇒ determines iref using Ip, δ, VdC & VS

• Compare iS & iref to generate switching signals for aux. inverter

(‘m’ is constant)


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Review

• For low power

Var generator + Active filter


99/454

• Used Var calculator to determine ‘Q’ required by the load

• Linear load is assumed

• For high power application

Use high power inverter for Var generation

To compensate harmonics use active filter

Contd..


100/454

[v] = [z] [i]

[v'] = [z'] [i']

[v] = [A] [v']

[i] = [A] [i']

[v] = [z] [i]

3-Phase to 2-phase conversion


101/454

[A] [v'] = [z] [A] [i'][v'] = [A]-1 [z] [A] [i]

Z'⇒ Inverse should exist

p = i1v1 + i2v2 + i3v3 = [i]t [v]

p' = i1'v1' + i2'v2' + i3'v3'

= [i']t [v']


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p = p'

[it][v] = [A] [i'] t [A] [v']

= [i']t [A]t [A] [v']

[A]t = [A-1] or [A] = [A]t-1

[U] ⇒ Unit matrix


103/454

iS = K[ia+ ibej2π/3 + ice-j2π/3]Has 2-components ⇒ (α, β)iα = Kd [ia- (1/2) ib – (1/2) ic]iβ = Kq [0 + √3/2 ib - √3/2 ic]i0 = K0 [ia + ib + ic]

• 3-current vectors ⇒ one vector ⇒ space vector

iβ

iα

Vector representation of instantaneous 3-phase quantities

iC

ia

ib


104/454

⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡−−−

=⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

c

b

a

qq

ddd

iii

KKKKK

KKK

iii

0000

)23()23(0)21()21(

β

α

[C]

[ ]⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

−−−=−

0

0

01

31313131313131032

KKKKKKKK

C

qd

qd

d


105/454

If Kd = Kq = 2/3 & K0 =√2/3

[C]-1 = 3/2 [C]t

[ ]⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

−−−=

0

0

0

)23()21()23()21(

0

KKKKKKKK

C

qd

qd

d

t


106/454

⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡−−−

=⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

c

b

a

vvv

eee

21212123230

21211

32

0

β

α

⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡−−−

=⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

c

b

a

iii

iii

21212123230

21211

32

0

β

α

Similarly 3-ph AC voltages ⇒ two phase voltages


107/454

p = vaia+ vbib + vcic

⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

−−−=

⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

02123212123212101

β

α

ee

vvv

c

b

a

p = eαiα+ (-1/2 eα+√3/2 eβ) (-1/2 iα+ √3/2 iβ) + (-1/2 eα-√3/2eβ) (-1/2iα-√3/2iβ)

p = 3/2 (eαiα+eβiβ) ( )ββαα ieie ..23 +=


108/454

Instantaneous reactive power compensation

Instantaneous real power

p = vaia+ vbib + vcic

Definition of instantaneous reactive current:

That part of the three phase current can be eliminated at any instant without affecting ‘P’


109/454

iβ

iα eα

eβiS VS

φψ

cos

sinS

S

e V

e Vα

β

ψ

ψ

=

=

( )( )

cos

sinS

S

i i

i iα

β

ϕ ψ

ϕ ψ

= +

= +

( ) ( ) 3 cos .cos sin .sin2 S Sp V i ψ ϕ ψ ψ ϕ ψ= + + +

( ) 3 3cos cos2 2S S S SV i V iψ ϕ ψ ϕ= − − =


110/454

3 2 sinS Sq V i ϕ=

( )( ) ( )

( ) ( )

3 2 sin

3 2 sin cos cos sin

3 2 cos . sin sin . cos

3 2 3 2

S S

S S

S S S S

V i

V i

V i V i

e i e i e i e iα β β α α β β α

ϕ ψ ψ

ϕ ψ ψ ϕ ψ ψ

ψ ϕ ψ ψ ϕ ψ

= + −

= + − +

= + − +

= − = × + ×

• Can be concluded that 3/2 iS sinφ component of current iS can be eliminated without effecting ‘P’

Reactive power


111/454

⎥⎦

⎤⎢⎣

⎡

⎥⎥⎦

⎤

⎢⎢⎣

⎡⎥⎦

⎤⎢⎣

⎡−

=⎥⎦

⎤⎢⎣

⎡

⎥⎦

⎤⎢⎣

⎡⎥⎦

⎤⎢⎣

⎡−

=⎥⎦

⎤⎢⎣

⎡

−

qp

eeee

ii

ii

eeee

qp

1

32

23

αβ

βα

β

α

β

α

αβ

βα

In matrix form

⎥⎦

⎤⎢⎣

⎡⎥⎦

⎤⎢⎣

⎡ −

+=

qp

eeee

ee αβ

βα

βα22

1*32


112/454

⎥⎦

⎤⎢⎣

⎡−⎥

⎦

⎤⎢⎣

⎡ −

+=⎥

⎦

⎤⎢⎣

⎡qee

eeeei

i

C

C01.

32

22αβ

βα

βαβ

α


113/454

( )22*

23.

βα

βα ee

qei

C +=

( )22*

23.

βα

αβ ee

qeiC +

−=

[ ]αββα ieieq −=23

Where


114/454


115/454

• Frequency of eα, iα, eβ & iβ is same as supply frequency

• ‘p’ & ‘q’ are calculated based on instantaneous values

• Assume supply voltages & currents are non-sinusoidal and have few common harmonic components


116/454

• Avg. power due to these common harmonic components is finite

• We can not eliminate these frequency components from source i !

• Source ‘i’ is non-sinusoidal


117/454

Review

Instantaneous real power

P = vaia+ vbib + vcic

( )ββααϕ ieieIVP SS ..23cos23

+==

Instantaneous reactive current:

That part of the three phase current can be eliminated at any instant without affecting ‘P’

iβ

iα eα

eβiS

VS

φψ


118/454

3 2 sinS Sq V i ϕ=

αββα ieie ×+×= 23

• If ‘v’ is sinusoidal, iL is non-sinusoidal

If q=0, then iS will be sinusoidal and in phase with Vs ( since average of the product of fundamental ‘ω’ & higher ‘ω’ term = 0)

⇒

Contd..

∑∞

=

=2

sinsinn

nn tnitvp ωω

Avg. of pn = 0


119/454

Contd..


120/454

• If ‘v’ is non-sinusoidal & iL is also non-sinusoidal

iS will have component corresponding to common frequency term of voltage & current

⇒

• H. Akagi, Y. Kanzawa, and A. Nabae“Instantaneous Reactive Power Compensators Comprising Switching Devices without Energy Storage Components,” Part-1 harmonic elimination., IEEE Trans. Ind. Applicat., vol. IA-20, No. 3,pp 625-630, May 1984.

Contd..


121/454

SS

dtd ωθ

=

⎥⎦

⎤⎢⎣

⎡⎥⎦

⎤⎢⎣

⎡−

=⎥⎦

⎤⎢⎣

⎡

⎥⎦

⎤⎢⎣

⎡⎥⎦

⎤⎢⎣

⎡ −=⎥

⎦

⎤⎢⎣

⎡

s

s

SS

SS

r

r

r

r

SS

SS

s

s

qd

qd

qd

qd

θθθθ

θθθθ

cossinsincos

cossinsincos

θS

dr

qr

dS

qS

ωS

Change of reference frame


122/454

( ) ( )( ) ( )

⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡+−−−−+−

=⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

cba

qd

ss

ss

r

r

S

S

21212132sin32sinsin

32cos32coscos

32

0πθπθθπθπθθ

3 - phase(St. Frame)50 Hz

2 - phase(St. Frame)50 Hz

2 - phase(rotating. Frame at ωS)D. C

⇒ ⇒


123/454

• Let us assume that vS is along dr- axis in the syn. Rotating frame & iS is making an angle φ

ϕcos23

SS IVP =

θS

dr

qr

dS

qS

ωS

φ vS

iSrr dS IV23=

rr qS IVq23

=and


124/454

• Transform all the variables to Syn. rotating frame (rotating at ωS)

• Fundamental component of v & i will become dc• Other components will pulsates • Use a filter to eliminate these pulsating

component• (Could have used a filter to eliminate harmonics

from input signal)


125/454

• AC filtering ⇒ phase shift• VS is filtered component• iq is made zero

dr

ψ

qr

VSidiq

iSqs

ds

φ


126/454


127/454

• Information about system frequency is required

• Frequency varies over a narrow range• Should be insensitive to harmonics or multiple

zero crossings


128/454

⎥⎦

⎤⎢⎣

⎡⎥⎦

⎤⎢⎣

⎡=

⎥⎥

⎦

⎤

⎢⎢

⎣

⎡

yx

y

x0 -

0 .

.

ωω

Harmonic Oscillator

• Has Eigen values at S = ωj±

• If x(0) = 0 and y(0) =1

ttx ωsin)( = tty ωcos)( =

yx ω=& xy ω−=&


129/454

ω

ω−

*

x

∫

∫

*

y

( )x t

( )y t

tyxx nn Δ+=+ ω1

txyy nn Δ−=+ ω1

yt

xx nn ω=Δ−+1

ωxt

yy nn −=Δ−+1


130/454

tx ωsin= ty ωcos=

1 3( 120)2 21 3( 240)2 2

a

b

c

v Cos t y

v Cos t y x

v Cos t y x

ω

ω

ω

= =

= − = − +

= − = − −

• Let ea, eb and ec are the 3φ instantaneous system voltages

How to generate 3-phase sinusoids?


131/454

acba eeeee23

21

21

=−−=α

cb eee23

23

−=β

βα jeees +=

• Space vector representation of va, vb and vc

32

32 ππ j

c

j

bas evevvv−

++=


132/454

)3

2sin3

2)(cos240cos()3

2sin3

2)(cos120cos(cos ππωππωω jtjtt −−++−+=

)23

21)(sin

23cos

21()

23

21)(sin

23cos

21(cos jttjttt −−−−++−+−+= ωωωωω

βαωω jvvtjt +=+= sin23cos

23

• Projection of es on dr and qr

sv• ( is aligned along dr)


133/454

)cos( tee sd ωθ −=

tinstes ωθωθ sincoscos +=

)sin( tee sq ωθ −=

teteed ωω βα sincos +=

ttes ωθωθ sincoscossin −=

teteeq ωω αβ sincos −=


134/454

Objective• To make the phase and frequency of va, vb ,vc and

ea, eb ,ec same• vs and es are in phase

eq=0

yva = xyvb 23

21

+−= xyvc 23

21

−−=


135/454

Review

• In synchronous rotating frame (speed of the frame = ), supply frequency terms will become DC

• If input ‘v’ are unbalanced

+ve sequence terms DC

-ve sequence terms oscillate at 2

sω

→

sω→


136/454

• Other higher frequency terms in the synchronousreference frame can be filtered out

• They can also be filtered out in the input side

• Phase shift is introduced – not an issue

• Active filter control

Contd..


137/454

To change MI using harmonic elimination PWM technique

10.9091, 23.2907, 29.8505, 46.3408, 50.678110.7120, 23.2678, 29.5761, 46.3867, 50.4260 5, 7, 11, 13 are eliminated and10.5138, 23.2278, 29.2896, 46.4210, 50.1567

• Frequency information is required.• C. Schauder and H. Mehta, “Vector analysis and

control advanced static Var compensators” IEE proc, vol.140, pp. 299-306, 1993

Magnitude of fundamental is

different


138/454

• Digitize the sine wave and store in EPROM (1024 part)

• Address the EPROM using 10 bit counter( )

• Use a PLL as a multiplier 1024210 =

Through Hardware


139/454


140/454

⎥⎦

⎤⎢⎣

⎡⎥⎦

⎤⎢⎣

⎡=

⎥⎥

⎦

⎤

⎢⎢

⎣

⎡

yx

y

x0 -

0 .

.

ωω

Software approach

yt

xx nn ω=Δ−+1

tty ωcos)( =ttx ωsin)( =Harmonic oscillator

ωxt

yy nn −=Δ−+1

ω → Instantaneous frequency

• Input to harmonic oscillator is ω


141/454

• 3φ sinusoids which are in phase with supply fundamental component of the supply voltage are required

• Input voltage may have harmonics • ea, eb ,ec input system voltages may have

harmonics + may be unbalanced→

βα jeees +=


142/454

• Let va, vb ,vc are the 3φ pure sinusoids

• es should be in phase with vs ωSt vS

eS

yva = xyvb 23

21

+−= xyvc 23

21

−−=


143/454

• This voltage waveform can be used as reference current waveform in hystersis current control PWM technique

• Source current follows this reference ‘i’

• Source current is in phase with fundamental component of input voltage


144/454

• No zero crossing detection No reference wave• No PLL

Basic Analysis :• Switching frequency is much higher than supply

frequency• Let x(t) be an input to a switch operating at

variable ON and OFF times

One cycle control of 3φ Var compensator and Active filter

generation


145/454

• Switching frequency

• Produces switched output with average

= x(t) D(t)

==+ sOFFON TTT

11

dttxT

tyONT

s∫=0

)(1)(

D= duty cycle


146/454

• Duty ratio has to be generated as control input based on some reference signal Vref(t)

• If the duty ratio is controlled so that

• Average output

∫∫ =SON T

ref

T

dttVdttx00

)()(

dttVT

tysT

refs∫=0

)(1)(


147/454

• Assume that over one cycle Vref(t) is roughly constant

y(t)=Vref(t)• Works for constant switching frequency

• Vref could be a variable feedback signal

• Can be implemented using a simple integrator with reset


148/454

• Generate reset pulse at required frequency

• At the start of every cycle switch is turned ONby the reset pulse

• Integrate the input

• When the output of the integrator just exceeds Vref turn OFF the switch

• Start the cycle again after Ts when integratorresets


149/454

• A term in the control equation which is being multiplied with duty cycle of the switch has to be passed through a reset integrator and compared with the appropriate reference

Rule to be followed


150/454

Assumption:• In one switching cycle input is constant• Vdc is constant and ripple free

1φ AC-DC Active filter + Var generator


151/454

S4, S3 ON for DTS:

DCs VVdtdiL +=

S1, S2 ON for (1-D)TS:

DCs VVdtdiL −=


152/454

• Assume i(t) is continuous and i(0) = i(Ts)

• Average ‘V’ across L = 0

sSDCSDCs TDVVDTVV )1)(()( −−=+

DVV s

DC 21−=


153/454

• is and Vs should be in phaseVs= isRe (Re = Emulated resistance) …..(a)(1-2D)Vdc = isRe

is = (1-2D)Vdc/Re ……(b)• In each switching cycle if the duty ratio D is

controlled in such a way that equation (b) is satisfied , equation (a) also gets satisfied

• Control requirement is (1-2D)Vm = is

Where Vm= Vdc/Re

Aim


154/454

• One cycle control

• A term in the control equation which is being multiplied with duty cycle of the switch has to be passed through a reset integrator and compared with the appropriate reference

Review

No PLLNo ZCD

→→

Rule to be followed:


155/454

• Generate reset pulse at required frequency

• At the start of every cycle switch is turned ON by the reset pulse

• Integrate the input

• When the output of the integrator just exceeds Vref turn OFF the switch

Contd..


156/454

• Start the cycle again after Ts when integrator resets

• K. M. Smedley & C. Qiao, “Unified constant-frequency integration control of active power filters –steady –state and dynamics” IEEE Transaction on power electronics, vol. 16, No. 3, May 2001


157/454

1φ AC-DC

Control technique

sm iVD =− )21(

e

cm R

VV = → Emulated resistance


158/454

s

DT

mi

m idtVT

Vs

=− ∫0

1

ssi

mm iDT

TVV =−

Ti = Integrator time constant

Fs = 1/TS = Switching frequency

• Vm remains constant in one cycle

• If si TT21

= sm iVD =− )21(


159/454

TTDVDTVV cc

avgi)1()( −+−

=

Alternate Approach DC-DC Converter

)21( DVc −=


160/454

Buck Converter• ‘L’ is small

sc VLiV =+ ω

)21( DVVV csi −==

• ‘Vo’ to be maintained constant

• Compare with referenceand vary D or dependingupon Vs change ‘D’


161/454

• Information regarding Vs should be known

• Assume that Vs and is are in phase (required)

• Instead of varying ‘D’ as function of Vs

• Vary ‘D’ as a function of is

• If Vs and is are not in phase chosen values of ‘D’ may not give the desired Vo

• If ‘Vo’ is regulated, our assumption that Vsand is are in phase is valid


162/454


163/454


164/454

• DC link voltage has to be regulated

• Generate fixed frequency clock

• At the rising edge reset the integrator and turn ON the switches S4 and S3

• is ↑

• As t ↑ X ↓ When is = X ; R = 1

• Turn OFF the S4, S3 and Turn ON S1, S2


165/454

• For high power applications

• Conventional 3φ Inverter with ‘V’ control

• Switching ‘F’ is low

• ‘F’ of predominant harmonic is low•

•

Inverter topology for high power application


166/454

• 2 converters→

→ Var Compensator

Low power inverter for active filtering

• There are only two levels Instead


167/454

• Number of pulse should be high for superior harmonic spectrum

• Instead modify the Inverter structure

• More than two levels

• Multi-level inverter


168/454

• Consider onlyone leg

• Any time two switches are ON = (n-1)

Diode clamp multilevel inverters

3 Level Inverter:


169/454

Switches ON VAX

S1, S2 Vdc

S2, S3

S3, S4

2Vdc

0

• Number of capacitors required = 2 =(n-1)

• Number of switches required = 4/phase = 2(n-1)


170/454


171/454


172/454

• Voltage across each capacitor = Vdc/2 = Vdc/(n-1)

• Number of diodes = 2 ?

4 level Inverter• Number of switches ON = 3 = (n-1)• Number of switches/leg = 6 = 2(n-1)• Number of capacitors = 3 = (n-1)• Voltage across each capacitor = Vdc/3 = Vdc/(n-1)


173/454

Review

• In one cycle control ‘iS’ is compared with(1-2D)Vm

• Vm is passed through reset integrator & compared with Vm - RSiS

⇒ RS is sensing resistor

• No reference current waveform generation


174/454

• For high power ⇒ Use multi-level inverter

• For 3-level ⇒ VAX = VdC, ½ VdC, 0

Contd..


175/454

• At any time 2-devices (n-1) devices are ON• No. of Switches = 2(n-1)• ‘V’ across each ‘C’ = VdC / 2 = VdC /(n-1)

• ‘V’ rating of switch = VdC /2 = VdC /(n-1)

• ‘V’ rating of diode = VdC /2

• No. of diodes = 2 = (m-1)*(m-2)

Contd..


176/454

• Bum-Seok Suh and Dong-Seok Hyun “A New N-Level High Voltage Inversion System,” IEEE Trans. Ind. Electron., vol. 44, No. 1,pp 107-115, Feb 1997.

• Nam S. Choi, Jung G. Cho and Gyu H. Cho “A General Circuit Topology of Multilevel Inverter,” in Proc. IEEE Power electron specialist conf. Rec., pp 96-103, 1991.

References


177/454

4-level inverter

• Number of switches ON = 3 = (n-1)• Number of switches/leg = 6 = 2(n-1)


178/454

S1, S2, S3 ON: ⇒ VAX = Vdc

• ‘V’ rating of each device = Vdc /3

• Number of capacitors = 3 = (n-1)

• Voltage across each capacitor = Vdc /3 =Vdc /(n-1)


179/454

S2, S3, S4 ON :

⇒ VAX = 2Vdc /3

S3, S4, S5 ON :

⇒ VAX = Vdc /3


180/454

Observations:

• Duty cycle of switch is not the same• Lower switches are ON for longer time• Switch utilization is poor

S4, S5, S6 ON:

⇒ VAX = 0


181/454

• ‘V’ rating of DB = 2Vdc/3

• ‘V’ rating of DA = Vdc/3


182/454

• ‘V’ rating of diodes is not the same• Number of diodes = (n-1) (n-2) = 6


183/454

Voltage space vectors for 3 level inverter

NNP→ NPP → NPN → PPN → PNN → PNP → NNP

• Similar to conventional 2-level inverter

• 6 active vectors and 2 zero vectors

CBA

Large voltage vectors


184/454

⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

−−−−−−

=⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

co

bo

ao

cn

bn

an

VVV

VVV

211121112

31

⎥⎥⎥

⎦

⎤

⎢⎢⎢

⎣

⎡

⎥⎦

⎤⎢⎣

⎡−−−

=⎥⎦

⎤⎢⎣

⎡

cn

bn

an

qs

ds

VVV

VV

2323021211


185/454

( NNP ) ⇒ ( 001 ) ⇒

( PPN ) ⇒ ( 110 ) ⇒

( NPN ) ⇒ ( 010 ) ⇒

( PNP ) ⇒ ( 100 ) ⇒

( NPP ) ⇒ ( 011 ) ⇒

( PNN ) ⇒ ( 100 ) ⇒

0∠dCV

π∠dCV

3/2π∠dCV

3/π−∠dCV

3/π∠dCV

3/2π−∠dCV


186/454

C B AO P PP O PP P O

C B AO O PO P OP O O

Small voltage vectors


187/454

C B AO O NO N ON O O

C B AO N NN O NN N O


188/454

C B A ⇒ O P P

⇒ VAO = VBO = VdC/2, VCO = 0

⇒ Van = VdC /6, Vbn = VdC /6, Vcn = - VdC /3

4321

621

6dCdCdCdC

dVVVVV =−−=


189/454

3/2

π∠=∴ dCS

VV

3/42

π∠=⇒∴ dCS

VVPOO

dCdCdC

q VVVV43

3623

=⎥⎦⎤

⎢⎣⎡ +=

OPP

POO


190/454

NOO :

VAO = VBO = 0, VCO = -VdC/2

Van = VdC/6, Vbn = VdC/6, Vcn = -VdC/3

,462

3 dCdCds

VVV == dCdCdC

qs VVVV43

3623

=⎥⎦⎤

⎢⎣⎡ +=

3/2

π∠=∴ dCS

VV 3/42

π∠=⇒⇒ dCS

VVONN


191/454

OOP :

VAO = VdC /2, VBO = VCO = 0

Van = VdC /3, Vbn = Vcn = -VdC /6

,2dC

dsVV = 0=qsV

02

∠=∴ dCS

VV π∠=⇒⇒2dC

SVVPPO

PPOOON

OOPNNO


192/454

NNO :

VAO = 0, VBO = VCO = -VdC / 2

Van = 1/3[0 +Vdc /2 + Vdc /2] = VdC /3,

Vbn = Vcn = 1/3[-2VdC / 2 + VdC / 2] = - VdC/6

,2dC

dsVV = 0=qsV

02

∠=∴ dCS

VV π∠=⇒⇒2dC

SVVOON


193/454

OPO :

VAO = VCO = 0, VBO = VdC /2

Van = Vcn = -VdC /6, Vbn = VdC/3

,4dC

dsVV −= dC

dCdCqs VVVV

43

63.6

23

=⎥⎦⎤

⎢⎣⎡ +=

3/22

π∠=∴ dCS

VV 3/52

π∠=⇒⇒ dCS

VVPOP


194/454

NON :

VAO = VCO = -VdC /2, VBO = 0

Van = Vcn = -VdC /6, Vbn = VdC/3

,4dC

dsVV −=

dCqs VV43

=

3/22

π∠=∴ dCS

VV 3/52

π∠=⇒⇒ dCS

VVONO

OPONON

POPONO


195/454

ONP :

VAO = VdC /2, VBO = -VdC /2 , VCO = 0

Van = VdC /2, Vbn = -VdC /2 , Vcn = 0

,43

dCds VV = dCqs VV43

−=

6/23 π−∠=∴ dCS VV

Medium voltage vectors


196/454

NOP :

VAO = VdC /2, VBO = 0 , VCO = -VdC /2

Van = VdC /2, Vbn = 0 , Vcn = -1/2 VdC

,43

dCds VV = dCqs VV43

=

6/23 π∠=∴ dCS VV


197/454

NPO :

VAO = 0, VBO = VdC /2 , VCO = -VdC /2

Van = 0, Vbn = VdC /2 , Vcn = -VdC /2

,0=dsV dCqs VV23

=

2/23 π∠=∴ dCS VV


198/454

PNO :

VAO = 0, VBO = -VdC /2 , VCO = VdC /2

Van = 0, Vbn = -VdC /2 , Vcn = VdC /2

,0=dsV dCqs VV23

−=

2/323 π∠=∴ dCS VV


199/454


200/454

Review

3-Level Inverter• No. of large voltage vectors = 6

⇒ VS = VdC

• No. of small voltage vectors = 6

⇒ VS = 1/2VdC

⇒ 12 possible combinations

+ ve or –ve bus

mid point&


201/454

Contd..

• No. of medium voltage vectors = 6

⇒ + ve, - ve & mid-point bus

dCS VV 23=⇒


202/454


203/454

Voltage control

• Space vector PWMDepending upon the position of space vector, switch the corresponding switch

⇒

NPP

NOP

NNPPPPNNNOOO

OPPNOO

OOPNNO


204/454

Voltage unbalance between DC-Line capacitance

• Each leg ⇒ 3 possibilities

• There are 27 switching instances are possible


205/454

• Unbalances has no effect on load

• Load is connected across the DC bus

• Somewhat effective in reducing voltage unbalance


206/454

• C1 supplies the power• C2 does not supply the power• ‘V’ across C2 ↑• For remaining 2 configuration, V across C1 ↑


207/454

Load compensation

• Passive elements

• Inverter ⇒ Current control⇒ Voltage control⇒ Main compensator⇒ Aux. compensator

• Instantaneous reactive power theory

• One cycle controlled inverter

• Multi level inverter


208/454

Transmission line voltage support

• Provide mid-point compensation⇒ Shunt⇒ Series⇒ Combination of shunt & series

⇒ Combination of series & seriesP < SIL

P > SIL

P = SIL

VS VR


209/454

Shunt Compensation :

• Inject current in to the system

• If injected ‘I’ is in phase quadrature with the ‘V’

• Only reactive power transfer

• Else, it has to handle real ‘P’ as well

Series Compensation :• Inject voltage in series with the line


210/454

• If ‘V’ is in quadrature with line ‘I’, only reactivepower transfer

Combination of series & Shunt Compensation :

• Inject ‘I’ with the shunt part &

• Inject ‘V’ with the series part

• When combined there can be real powerexchange between the series & shunt controllers


211/454

Mid point voltage regulator

• Two machine model

δSinXVV RS=Ρ

XVP

2

max =

⇒ If Vs = Vr = V


212/454

• Connect a compensator at the mid point & Vm = Vs = Vr = V

• Whether active power transfer is require ?

• System is loss-less


213/454


214/454

• Let Vsm & Vmr are fictitious voltages in phasewith Ism & Imr respectively

( )4/. δCosVVV mrsm ==

( ) ( )4/42

4/.2 δδ SinXV

XSinVII mrsm ===

( ) ( )4/.4/4.2

δδ CosSinXVIVPP smsmr ===

( )2/2 2

δSinXV

=


215/454

( )4/8 22

δSinXV

=

ccm VIIV ==

( )4/..2 δSinIV sm=

( )( )2/14 2

δCosXV

−=

• Reactive power supplied by the compensator


216/454


217/454

• Shunt compensator can increase ‘P’

• ‘Q’ demand also ↑

• Can have multiple compensators located at the equal distances

• Theoretically ‘P’ would double for each doubling of the segments


218/454

• ↑ the no. of segments results in flat ‘V’ profile

• Expensive


219/454

Review

Mid-point shunt compensation

( )2/2 2

δSinXVP =

( )( )2/14 2

δCosXVQ −=

⇒ If Vs = Vr = V

⇒ ‘I’ is injected into the line (in quadrature with ‘v’)


220/454

Contd..

• For each doubling of the segments, transmittable ‘P’ also doubles

• ‘V’ profile is almost flat

• Large no. of shunt compensators ⇒ expensive


221/454

• Compensator must remain in synchronism with the ac system under all operating conditionsincluding major disturbances

Summary

• Must regulate the bus voltage

• For the inter connecting two systems, bestlocation is in middle

• For radial feed to a load, best location is at the load end


222/454

Methods of controlling Var generation

• Mechanically switched capacitor and/or inductor ⇒ course control

⇒ in-rush current

• Continuously variable Var generation or absorption ⇒ originally over excited syn. motor

• Modern Var generators → use power semiconductor devices/equipment + energystoring elements


223/454

Variable impedance type S.V.C

1. Thyristor controlled reactor (TCR):

• T1 & T2 is triggered in the + ve & - ve half cycles respectively

α⇒ Can be measured w. r. t zero crossing or peak of ‘V’


224/454

tSinVdtdiL m ω=

( ) ( )tCosCosL

Vti m ωαω

−=∴

απβ −=∴ 2

βα CosCos =

• ‘i’ flows from α to β

i(t) =0 at ωt = β

⇒ β = extinction angle


225/454

• ‘i’ is continuous when α = π/2

• ‘i’ is sinusoidal

• No control ⇒ ’L’ is fixed & it is minimum

• As α ↑, all odd harmonics are introduced


226/454

⎟⎠⎞

⎜⎝⎛ −−=∴ α

πα

πωα 2sin121)(

LVILF

• As α ↑, L ↑

• VL(MAX) ⇒ Voltage limit

• IL(MAX) ⇒ current limit

• BL(MAX) ⇒ Max. admittance of TCR

⎟⎠⎞

⎜⎝⎛ −−=⇒ α

πα

πωα 2sin1211)(

LBL


227/454

2. Thyristor switched capacitor (TSC):

• Small ‘L’ is required tolimit the surge current

• Thyristors are switched when vc = v

• ‘V’ rating of the switch ?


228/454


229/454

3. Fixed Capacitor, Thyristor controlled Reactor (FC-TCR):

• ‘iL’ is varied by varying ‘α’• iL = iL(max) when α = π/2

• In FC-TCR, for any value of iL, net effect of C ↓

• ‘C’ also provides a low impedance path for harmonics generated by TCR

In TCR


230/454

• ‘QC’ is constant

• Net Q = QC when QL = 0 (α = π)

• To ↓ net Q, ↓ α

• Net Q = 0, when QC = QL

• If α is ↓ further, net Q is inductive


231/454

• At α = π/2, QL = QL(max)

• Operating V-I region of FC-TCR


232/454

STATCOM

• VSI can supply ± Q

• Also known as static synchronous condenser

• Similar to syn. motor

XEVI −

= VX

EVQ .−=

Q ⇒ reactive power received by the source


233/454

Control

• ‘Q’ is controlled by M.I & δ⇒ accounts for losses

• Assumed that inverter is capable of injecting ‘Q’demand of the line


234/454

• If ‘Q’ demand >Var rating of inverter

• It may fail due to over load

• Have a inner ‘I’ loop


235/454

Operating V-I region


236/454

Review

T.C.R

• If α = π/2 ⇒ i = imax

• As α ↑ , Leff ↑

• Harmonics


237/454

Contd..

T.S.C

• Thyristors are triggeredwhen vc = v

F.C.T.C.R

• T.S.C – T.C.R schemeis also possible


238/454

Contd..

• Above schemes are variable impedance types

• Variable source type

STATCOM

XEVI −

=

VX

EVQ .−=


239/454

Advantages

• Since voltage profile is maintained (in radial system)

⇒ Voltage instability is prevented

⇒ Improves transient stability

⇒ Damping of power oscillations

⇒ Able to maintain ‘V’ profile


240/454

Series compensation

• Reciprocal of shunt compensation

• Shunt compensator : Controlled reactive ‘I’ source connected in parallel with the Tr. Line to control ‘V’

• Series compensator : Controlled reactive‘V’ source connected in series with the Tr. Line to control ‘I’


241/454

Series compensation

• Injects voltage in series with the line

• Could be variable ‘Z’ (such as ‘C’ or ‘L’)

• Voltage source

• Effective in controlling the power flow


242/454

Concept of series capacitive compensation

⇒ To decrease reactance of the line

δSinXVVP RS ..

=

( )CL XXX −=


243/454

LC XXK =

( )CLeff XXX −=

( ) LXK−= 1

⇒ Degree of series compensation

⇒ 0 < K < 1


244/454

( ) ( ) Lm XK

SinVVCosIVP−

==1

2.2.2 δδ

( ) ( ) LL XKSinV

XKSinVI

−=

−=

12.2

212. δδ

( ) LXKSinV

−=

1.2 δ

• If VS = VR =V

( ) CL

CC XXK

SinVXIQ .1

2.422

222

−==

δ ( )( ) LXK

KCosV.1

.1.22

2

−−

=δ


245/454

⎟⎠⎞

⎜⎝⎛=

2tan max2 δ

sh

se

QQ

δmax ⇒ maximum angular difference between the two ends of the line


246/454

• If δmax ⇒ 30 - 40o

• Qse = 7- 13% of QSL

• Cost of series capacitor ?

• Location of series capacitor is not very critical


247/454

Approaches to controllable series compensation

Objective : Vary VC

1. GTO controlled series capacitor (GCSC)

• GTO is closed when vc = 0

• Open when ‘i’ charges ‘C’

Variable Z type :

• Duality between TCR & GCSC


248/454

• GTO is turned ON when vc = 0 for α < ωt < α+γ

( ) ( ) ( )tdtiC

tvt

c ωω

ω

α

.1∫= ( ) tCosIti ω.=∴

( )αωω

SintSinCI

−=

• vc is maximum when ωt = π/2 & vc = 0 when ωt = π-α


249/454

• Amplitude of the fundamental

( ) ( )tdtSintvV cc ωωπ

π

..4 2

01 ∫=

⎥⎦⎤

⎢⎣⎡ −−=

πα

πα 221 SinIXc

( ) ( )tdtSinSintSinCI ωωαωωπ

π

..4 2

0

−= ∫


250/454

Controlling modes

(a). Voltage compensation mode:

• GCSC ⇒ Should maintain rated compensation voltage when Imin < I < Imax

⇒ Vcomp = Vrated = Imin Xc

⇒ As I↑, ↑ α So that Vcomp is maintained constant


251/454

(b). Impedance compensation mode:

cc XI

V=

max

(max)

Protection issues:

• Required to have higher short time rating

• During S.C, ‘I’ could be much higher than Irated

• Ifault > IGTO(rating)


252/454

• If it flows through ‘C’, Vc ↑

• ‘V’ across GTO ↑

• Use MOV

Limitations:

• Harmonics are generated


253/454

Review

GTO controlled series capacitor (GCSC)

• ‘α’ is measured w.r.t peak of ‘i’

( ) ⎟⎠⎞

⎜⎝⎛ −−= α

πα

πωα 21211 Sin

CX C

α⇒ extinction angle

• ‘VC’ has harmonics


254/454

Contd..TCR GCSC

• Switch is series with ‘L’ • Switch is parallel with ‘C’• Supplied from a ‘V’

source• Supplied from a ‘i’

source• ‘α’ (turn-ON delay) is

measured w.r.t peak of ‘v’• ‘α’ (turn-OFF delay) is

measured w.r.t peak of ‘i’


255/454

• Control ‘i’ in ‘L’ . Parallel with the source representing variable

admittance to the source

• Control ‘v’ across ‘C’developed by ‘i’ source representing variable

reactance to the source

Contd..

( ) ⎥⎦⎤

⎢⎣⎡ −−=

πα

πα

ωα 221 Sin

LVILF ( ) ⎥⎦

⎤⎢⎣⎡ −−=

πα

πα

ωα 221 Sin

CIVCF

⎟⎠⎞

⎜⎝⎛ −−=⇒ α

πα

πωα 2sin1211)(

LBL ( ) ⎥⎦

⎤⎢⎣⎡ −−=⇒

πα

πα

ωα 2211 Sin

CXC


256/454

Thyristor switched series capacitor (TSSC)

• Capacitors are disconnected by turning ONthe thyristors

• They turn OFF naturally (at Z.C of I )


257/454

Voltage compensating mode :

• By-pass ‘C’

• Reactance of ‘C’ bank is chosen so as toproduce average rated Vcomp = n XC Imin

(‘n’ is the no. of banks)

• As I ↑ above Imin , ↓ n


258/454

Impedance compensating mode :

• Maximum series compensation

max

(max)

IV

nX CC = at rated ‘I’

• TSSC should maintain maximum ratedcompensating reactance at any line current up to Rated current (Imax)


259/454

• In FCTCR continuously varying capacitivecompensation is achieved by varying ‘α’of TCR


260/454

Thyristor controlled series capacitor (TCSC)

• If ‘V’ is the applied voltage across the TCR

• Fundamental component of ‘I’ for ‘α’(measured w.r.t peak of voltage) is


261/454

( ) ∞<< αLL XX

( ) ⎟⎠⎞

⎜⎝⎛

−−=

ααππα

22 SinXX LL

( )( ) ⎟⎟

⎠

⎞⎜⎜⎝

⎛−

−=

CL

LCTCSC XX

XXXα

α.

⇒ Combined ‘Z’ of TCR & fixed ‘C’

( ) ⎟⎠⎞

⎜⎝⎛ −−= α

πα

πα 21211 Sin

XVI

L


262/454

& XTCSC = -XC

• When XL(α) = XC XTCSC ⇒ undefined

• When XL(α) < XC XTCSC ⇒ Inductive

At XL(α) = XL ⇒ ⎟⎟⎠

⎞⎜⎜⎝

⎛−

=CL

LCTCSC XX

XXX .

• When α = π/2, XL(α) = ∞


263/454


264/454

• Continuously varying series capacitor by ‘α’ control

( ) ∞<< αω LXL

( ) ,∞<αLX CXX CTCSC ω1==

• At XL(α) = XC ⇒ parallel resonance, ∞⇒TCSCX

• When

( )αωω >⇒ oLC1=∴ω As L(α) > L


265/454

• If XL(α) < XC , There are two operating zones

⇒ Capacitive, ‘i’ leads VC

0 ≤ α ≤ αL(lim) ⇒ XTCSC is inductive

• Not exactly similar to TCR connected in parallel With‘V’ source

• Input ‘V’ is sinusoidal

2(lim) παα ≤≤C


266/454

• In TCSC, the ‘V’ is voltage across ‘C’

• Switch is open ⇒ TCR is O.C, ‘i’ flows through ‘C’

• Turn-on TCR at ‘α’(w.r.t peak of ‘v’)

⇒ ‘i’ is +ve & ‘vc’ is -ve


267/454

• ‘VC’ gets distorted• In phasor form ‘i’ leads VC

in capacitor zone


268/454

• In inductive zone, ‘i’ lags VC

• TCR current is high

⎟⎟⎠

⎞⎜⎜⎝

⎛−

−=

)(.

CTCR

TCRCTCSC XXj

jXjXX

⎟⎟⎠

⎞⎜⎜⎝

⎛−−

=)1( TCRC

C

XXjX

( )CTCRCTCR

CTCR XX

IIXXj

jXi−

=−

−=

1.

)(


269/454

• If XTCR = 1.5XC ⇒ Capacitive

• If XTCR = 0.75XC ⇒ Inductive

35.111

1)1(

1=

−=⎟⎟

⎠

⎞⎜⎜⎝

⎛−

=TCRCC

TCSC

XXXX

25.11

1−=

−=

IITCR

CTCR XX 75.0=


270/454

375.011

1−=

−=

C

TCSC

XX

475.01

1=

−=

IITCR

• For same magnitude of XTCSC , ITCR in ‘C’zone = (1/2)ITCR in ‘L’ zone


271/454

Modes of operation

By pass mode :

• ‘iL’ is continuous & sinusoidal

• Each thyristor conducts for 180o

• XTCSC ⇒ inductive

• Most of the line ‘I’ flow through ‘L’ not ‘C’

• Used to protect ‘C’ against over voltage


272/454

Thyristor blocked mode :

• No ‘i’ through ‘L’

• Fixed ‘C’ ⇒ Avoided

Vernier control

• Thyristors are gated and they conductsfor part of cycle

• XTCSC ↑ as conduction angle ↑ from zeroto αC(lim)


273/454

Static Synchronous Series Compensation

• Function of series capacitor ⇒ produces anappropriate voltage of fundamental ‘F’ inquadrature with Tr. Line ‘I’

( ) δSinXX

VVPCL

RS

−=


274/454

• Instead: Use VSI to inject a voltage inquadrature with ‘i’

( )γqq VjV .±=


275/454

• Voltage across ‘L’ ⇒ ( ) qL VVSinV += 22 δ

( )X

VVSinI q+=

22 δ

( ) ( )( )qVVSinVCosP += 22.2 δδ

( )2.2

δδ CosXVV

SinX

V q+=

• If Vq > I.X, power flow will reverse


276/454

Review

• Used for vernier control of ‘C’.GCSC also provides this feature

• Cost of GTO > that of thyristor

• Effective capacitive compensation increases as α ↓ from π/2 to αC(lim)

T.C.S.C :


277/454

Contd..

• For both region XL < XC (inductive & capacitive)

• In inductive zone, ITCR > ILine and are in phase

• In capacitive zone, ILine is out of phase with ITCR

• ‘V’ across ‘C’ gets distorted


278/454

Static Synchronous Series Compensation:

Contd..

• Instead of passive elementsuse VSI

( )2.2

δδ CosXVV

SinX

VP q+=

• Reverse power flow is possible


279/454

Control range:

• Voltage compensation mode : SSSC canmaintain the rated capacitive or inductivecompensating ‘V’ for ‘I’ till Iq(max)

• Ideal condition (‘I’ line can not be zero)

• ΔP is required for SSSC


280/454

impedance compensation mode :

• Maintain rated XC or XL

up to rated I

Exchange of Active power by SSSC:• Can exchange active as well as reactive power• Some active source should be connected to

DC side


281/454

• With series compensation effective ( ) RXX CL − ratio ↓

• Compensation for both reactive and resistivecompensation of series line impedance to keepX/R ratio high (3-10 is desirable)


282/454

• X/R ratio in case1 > X/R ratio in case2

• Reactive component of

( )12. ϕδ +== CosIII a

↑

• Real component of

( )12. ϕδ += SinIIq

transmitted to the receiving end decreasescorresponding to R=0


283/454

• If VS = VR =V

Per phase power received by the receiving end

( )2.. δϕ −= SinIV

( )ϕδ −+= 290.. CosIVP

( )2.2/2. δϕδ−= Sin

ZVSinV

2/..2/2/.2 2

δϕϕδδ SinCosSinCosSinZV

−=


284/454

2/.2/.2/.2 22

δϕδδϕ SinCosCosSinSinZV

−=

( ) δϕδϕ CosCosSinSinZ

V−−= 1..

2

( ) δδ CosRSinXXR

V−−

+= 1..22

2

( )⎭⎬⎫

⎩⎨⎧ −−= δδ Cos

ZRSin

ZX

ZV 1..

2


285/454

( )ϕδ −+= 2/90.SinVIQ

( )ϕδδ−= 2/2/2 2

CosZ

SinV

( ) δδ CosXSinRXR

V−+

+= 1.22

2

⇒ Reactive VA associated with the receiving end


286/454

• Maximum transmittable active power ↓


287/454

Voltage & phase angle regulators

Voltage regulator:• Injection of appropriate in phase

component in series with ac system

• Similar to transformer tap changer


288/454

Phase angle controller :• Inject ‘V’ at an angle ±90o

relative to the system ‘V’

• Resultant angular change approx. proportionalto injected ‘V’. Magnitude of ‘V’ is constant


289/454

Power flow control :

• Optimal loading of transmission line inpractical system can not always be achievedat the prevailing angle

Occur when ?• Power between two buses is transmitted

over parallel lines of different length, usephase angle regulator (PAR)


290/454

PAR : A sinusoidal synchronous ac voltagesource with controllable amplitude and phase angle

rSSeff VVV += SeffS VV =and


291/454

• Basic idea is to keep the transmittablepower at the desirable levelindependent of prevailing ‘δ’

Vr

VS> 90o

⇒ angle to be controlledis (δ-σ )

( )σδ −= SinX

VP2

also


292/454

• Multi functional FACTS controller :based on back-back VSI with a commonDC-link

• One converter in series (SSSC) and otheris in shunt (SVC) ⇒ unified power flowcontroller (UPFC)

• Both converters are connected in series butin two different lines (Inter line Power FlowController-IPFC)


293/454

UPFC :• Able to control simultaneously or

selectively all the parameters affecting thepower flow in Tr. line


294/454

• Converter-1 supplies active powerrequired by converter-2


295/454

UPFC can fulfill

• Reactive power control

• Series compensation

• Phase angle regulator

• Independently control the reactive powerflow at the point of connection


296/454


297/454

Control capabilities

Case1 : Voltage regulator

,0=ρ VVpq Δ±=

• Similar to tap changing transformer withlarge no. of steps

Reactance compensator : Series reactive compensator

Vpq = Vq at 90o with I

⇒ Similar to SSSC


298/454

Phase angle regulator :

⇒ at any angular relationship w.r.t VSso that desired phase shift is achieved

σVVpq =

Multi functional feature :

σVVVV qpq ++Δ=


299/454

ReviewU.P.F.C :

• Two VSI connected back to back with common DC-link

• One connected in series with line and other isconnected across the line

• DC-link ‘V’ is maintained constant by converter-1


300/454

Contd..

• Active power required by the system is drawn by converter-1

Can function as

• Voltage regulator ⇒ V+ΔV• SSSC ⇒ injects ‘V’ in quadrature with ‘I’

• Phase angle regulator ⇒ injects ‘ΔV’ inquadrature with ‘V’


301/454

Using UPFC

• Active power flow and

• In SSSC : Quadrature injected ‘V’results in increase in power flow

• Reactive power flow can be set

⇒ Magnitude of injected ‘V’ determines ‘P’

⇒ Circuit conditions determines ‘Q’


302/454

• Main function : Control the flow of ‘P’ & ‘Q’by injecting a voltage in series with the Tr. line

• Both magnitude & phase angle are varied

• Control of ‘P’ & ‘Q’ allows power flow inprescribed routes

⇒ 2 port representation


303/454

⇒ A common DC-link voltage is regulated

( ) 0Re*22

*11 =−+ lossuu PIVIV

• In addition to maintain real power balance,shunt branch can independently exchange reactive power with the system


304/454

• Transmitted active power and reactive powersupplied by receiving end

2δjr VeV −=

*

. ⎟⎟⎠

⎞⎜⎜⎝

⎛ −+=−

jXVVV

VjQP rpqSrrr

( )ρδ += 2jpqpq eVV

2δjS VeV =


305/454

( ) ( )

⎭⎬⎫

⎩⎨⎧

−−

−−−= +−− ρδδ δδδδ 22 2222 jpqj e

jXV

jXjSinCosjSinCosVVe

( )

⎭⎬⎫

⎩⎨⎧

−= +−− ρδδ δ 22 22 jpqj ejX

VX

VSinVe

( ) ( )ρδδδδ +−−−= jpq ejXVV

jSinCosSinXV .

2222 2

( ) ( ) ( )( )ρδρδδδδ +−+−−= jSinCosjXVV

jSinCosSinXV pq.

22.22 22


306/454

( )ρδδ +−=− SinXVV

SinX

VjQP pqrr

.2

( )⎭⎬⎫

⎩⎨⎧

+−− ρδδ CosXVV

SinXVj pq.

22 22

( )ρδδ +−=∴ SinXVV

SinX

VP pqr

.2

( )ρδδ +−=∴ CosXVV

SinXVQ pq

r

.22 2

2


307/454

• ‘ρ’ can vary from 0 to 2π

• ‘P’ & ‘Q’ are controllable from

( )XVV

P pq.−δ ( )

XVV

P pq.+δto

⇒ Transmitted real power ( )

XVV

SinX

V pq max2 .

±= δ


308/454

Control strategy:

• There are 3 degrees of freedom

• Magnitude and angle of series V

• Shunt reactive current

⇒ Both are VSI

⇒ Series injected ‘V’ can be instantaneouslychanged


309/454

⇒ Shunt current is controlled indirectly byvarying output of shunt converter

Series injected ‘V’ control :

• Injected ‘V’ can be split into two components

1. In phase with line ‘I’

2. In quadrature with line ‘I’

• ‘P’ can be controlled by varying series reactanceof the line


310/454

• Reactive ‘V’ injection ⇒ similar to series connection of reactance except that injected ‘V’is independent of Tr. Line ‘I’

Shunt current control :• Shunt current can be split into real & reactive

components• Magnitude of real component ⇒ DC link ‘V’

• Magnitude of reactive component ⇒ Bus ‘V’magnitude regulator


311/454

FACTS installments in India

• TSC+TCR (400 kV) at Kanpur ⇒ ±240 MVar

• TCSC (400 kV ) at ⇒ Raipur - Rourkela

• TCR (400 kV) at Itarsi ⇒ ±50 MVar

⇒ Gorakhpur - Mazaffarpur

(Double ckt.)

⇒ Kanpur - Ballabhgarh


312/454

Kanpur – Ballabhgarh 400 kV line:

Fixed capacitor TCSC

Rated V L-L 420 kV 420 kV

Nominal Var 151.60 MVar 79.87 MVar

Rated continuous‘V’ across ‘C’

42.2 kV 16.6 kV

TCR/ph 4.4 mH-


313/454

• Long distance transmission ( Competing technology : AC with FACTS)

HVDC

• Cable transmission (> 40 Km) ⇒ HVDC

• Asynchronous link ⇒ HVDC

• HVDC lines are cheaper than AC lines

• Terminal equipment costs are higher


314/454

In India :• Long distance HVDC

• Rihand – Dadri : 1500 MW, ±500 kV

• Chandrapur – Padghe : 1500MW, ±500 kV

• Barsur– Lower Sileru : 200MW, 200 kV

• Talcher – Kolar : 2000MW, ±500 kV


315/454

Back to Back :

• Chandrapur – Ramagundam : 1000 MW(Asynchronous link)

• Vindhyachal : 500 MW

• Jeypore – Gajuwaka : 500 MW(Asynchronous link)

• Sasaram : 500 MW


316/454

• ‘P’ through DC link can be regulated.

• Power control through firing angle control


317/454

• ‘P’ through link can not be regulated


318/454

• P1 + P2 can be regulated

• If alternator-1 generates 1000 MW & load 1100 MW


319/454

• If alternator-2 generates 1000 MW & load 900 MW

• P1 +P2 has to be -100 MW(frequency of alternator-1 &2 are same)

• P1 + P2 can be set


320/454

Types of HVDC system

Two terminal : with DC transmission lineOne rectifier terminal + one inverter terminal

• Two terminals with no DC line ⇒ used forasynchronous link

Back to Back :

Multi terminal : with DC line and several rectifierand/or inverter terminals connected to more thantwo nodes of AC network


321/454


322/454

Types of links :• Mono-polar

• Bi-polar

Mono-polar HVDC link :


323/454

• One conductor (generally –ve)

• Return path ⇒ ground ⇒ Resistance shouldbe low

• Instead metallic return


324/454

Bi-polar HVDC link :

• Has two conductors+ve

-ve


325/454

• Each terminal has two converters of equalrating ‘V’ connected in series on the DC side

• Junction is grounded

• ‘I’ in two phases are equal

• No ground ‘I’

• Two poles can operate independently

• If one is faulty, then other can operate withground as the return


326/454

Review

HVDC

• Asynchronous link

• Back to back


327/454

Components of HVDC transmission

Bi-polar HVDC


328/454

Converter :

• Perform AC – DC conversionDC – AC conversion

• 12 pulse converter

Transformer with tap changer


329/454

Purpose :

• ↓ harmonic voltage & current in DC line

• Prevents ‘I’ from being discontinuous onlight load

• Limit the ‘I’ during S. C in the DC line

Smoothing Reactor : Large value of ‘L’ inSeries with each pole


330/454

Harmonic filter :

• Converter generates harmonic currents

• Because of source ‘L’, ‘V’ gets distorted

• Affects the other loads & interferencewith communication network


331/454

Reactive power support :

• Both converter & inverter absorbreactive power

• As α ↑ , ‘Q’ requirement ↑

• ‘Q’ source is a must

• If bus is strong, shunt capacitor can be used

• ‘C’ associated AC filter also supply ‘Q’


332/454

Basic module of converter :

• 3-ph full bridge

0∠=VVan

120−∠=VVbn

,63 π∠= VVab

240−∠=VVcn

,23 π−∠= VVbc 2103 −∠= VVca


333/454

• If α1 is trigger angle for bridge-1

• If α2 is trigger angle for bridge-2

⇒ Neglect idc rdc &Assuming ideal devices

12 απα −=


334/454

⇒α = 30o (w.r.t natural commutation)

⇒ corresponding to Z.C ofphase-A α = 60o

or


335/454

When T3 is triggered, ‘V’ across T1 = Vab

⇒T1 is turned off at ωt= 30+ (30+120) = 180o


336/454

,0180 == SinVa

2360 == SinVb

23−=∴ abV


337/454

21210 −== SinVa

190 == SinVb

3−=∴ abV

At ωt = 210o

At ωt = 240o

23,23 =−= ba VV

5.1−=abV


338/454

5.1−=∴ abV21,1 =−= ba VV

At ωt = 270o

At ωt = 300o -

0,23 =−= ba VV 23−=∴ abV

At ωt = 300o +, T5 is triggered, ‘V’ across T1 is Vac

23,23 =−= ca VV 3−=∴ acV


339/454

5.1−=∴ acV1,21 =−= ca VV

At ωt = 330o

At ωt = 360o

23,0 == ca VV 23−=∴ acV

At ωt = 30o

21,21 == ca VV 0=∴ acV


340/454

At ωt = 60o -

0,23 == ca VV 23=∴ acV

⇒ T1 is reverse biased for 210o

What happen when α = 150o

T1 is turned off at ωt = 30+150+120 = 300o

(w.r.t +ve Z.C of Ph- A)


341/454

At ωt = 300o

0,23 =−= ba VV 23−=∴ abV

At ωt = 330o

21,21 −=−= ba VV 0=∴ abV

At ωt = 360o

23,0 −== ba VV veVab +==∴ 23


342/454

⇒ T2 must attain forward voltage blockingcapability within 30o


343/454

αCosVV phdc .34.2=

αCosVLL .35.1=

For α = 30o


344/454

Review

HVDC

• Two six pulse convertersconnected in series

12 απα −=


345/454

• As α2 ↑, duration for which the devices is reverse biased↓

• When α = 150o, duration for which the devicesis reverse biased = 30o

• As α1 ↑ (AC-DC converter), ‘Q’ requirementalso ↑

Contd..


346/454

Harmonic component in converter i/p :

• No even harmonics, only odd harmonics

θθπ

π

π

dCosnIILn .223

30∫

−

=

⎟⎠⎞

⎜⎝⎛=

32.

22

0π

πnSinI

nILn

,.601 IIL π

= 03 =LI

,5

15

LL

II −= 71

7L

LII −=


347/454

Phase relationship between phase V & I1

Neglect losses

ϕCosIVIV Lm

dc 10 .2

3 ⎟⎠

⎞⎜⎝

⎛=

00 .336.2

.3 ICosVCosIVm

m απ

ϕπ

=⎟⎠⎞

⎜⎝⎛

αϕαϕ

=∴= CosCos


348/454

tdVV ab ωπ

α

α

.26 60

0 ∫+

=

( ) tdtSinV om ωω

π

α

α

.60326 60

+= ∫+

ααπ

CosVCosV dcom ==33

απ

CosVrms233=

αα CosVCosV LLrms 35.134.2 ==


349/454

As α ↑ :

• Vdc ↓

• Displacement angle ↑ & P.F ↓

• Q ↑

Effect of source L :

• T1, T2 when conductingT3 is triggered


350/454

031 Iii =+

dtdi

dtdi 31 −=

dtdiLV cba

32=

KtCosLVi

c

m +−=∴ ωω23

3

dtdiLtSinV cm

323 =ω


351/454

Boundary conditions :

At ωt = α, 0,, 30201 =−== iIiIi

03021 ,,0 IiIii =−==

( )tCosCosLVi

c

m ωαω

−=∴2

33

= α+μ,

At ωt = α+μ, 03 Ii =

( )( )μααω

+−=∴ CosCosLVI

c

m

23

0


352/454

22cnbnan

pnVVVV −=

+=∴

dtdiLVV

dtdiLVV

bnpn

anpn

3

1

−=

−=

⎟⎠⎞

⎜⎝⎛ +−+=

dtdi

dtdiLVVV bnanpn

312


353/454

mnpn VVV −=∴ 0

cncncn VVV 5.12

−=−−=

Reduction in V0 = (ΔV0) :

( ) tdVVV cnbc ωπ

μα

α

.5.126

0 ∫+

+=Δ

( ) ( ) tdtSinVtSinV mo

m ωπωωπ

μα

α

.25.160326

−++= ∫+


354/454

( )( )μααπ

+−= CosCosVm

233

m

cdco

VLIV

32

2 0ω

=

03 ILc

πω

=

0003 ILCosVV c

dc πωα −=∴


355/454

Representation of inverter mode of operation in presence of μ

dcdcod IRVV −=− αcos


356/454

dcdcod IRVV +−= αcos

dcdco IRV +−= )cos( απ

dcdco IRV += βcos

→α

β

delay angle

Angle of advance→


357/454

Converter Inverter

α⇒ delay angle

μ⇒ overlap angle

β = π-α⇒ advance angle

μ⇒ overlap angle

γ = β-μ⇒ extinction angle

γ = π-(α+μ)


358/454

)]cos([cos2

μαα +−=Δ dcoo

VV

odcod VVV Δ−=

)]cos([cos2

μαα ++= dcoV

)]cos([cos2

μαα ++= dcod

VVAlso

)]cos()[cos( γπβπ −+−=


359/454

)(]cos[cos2

AVdco −−−−−−+= γβ

)]cos([cos2

3 μααω

+−=c

md L

VI

)(]cos[cos2

3 BLV

c

m −−−−−−−−= βγω

)]cos()[cos(2

3 γπβπω

−−−=c

m

LV


360/454

m

cmdcod V

LVVV3

33cos ωπ

γ −=

dc

dco ILVπωγ 3cos −=

dcdco IRV −= γcos

m

cd

dco

d

VLI

VV

322cos2 ωγ +=∴

Eq. A+B ⇒


361/454

12-pulse converter• Series connection of two 6-pulse converters

3-Φ voltages supplied to onebridge is displaced by 30o

from those applied to 2nd bridge


362/454

• DC voltage is doubled

• Harmonic spectrum has improved

12n ± 1 on AC side

12n on DC side


363/454


364/454

Relation between Ac and DC quantity :With multi phase bridge

bridge

Ldo VTBV ...35.1=∴

Cd XIπ3

Cddod XBICosVVV ..3π

α −==

Corresponding voltage drop :

If ‘Β’ no. of bridges in series

Output

⇒ No load


365/454

⎟⎠⎞

⎜⎝⎛−= Cddod XBICosVVπ

α 3..

⎟⎠⎞

⎜⎝⎛−= Cddo XBICosVπ

γ 3..


366/454

• Nominal line voltage ⇒ 400 kV

• Maximum line voltage ⇒

Summary of technical data of Padghe

430 kV

• Minimum line voltage ⇒ 380 kV

Total ‘Q’ at both stations ⇒ 800 MVar

⇒ 4*200 MVar

12th harmonic filter ⇒ 2*120 MVar


367/454

Power :

• Nominal Power ⇒ 2*750 MW

• 2 hours overload ⇒

• Minimum (single pole) ⇒ 2*75 MW

2*825 MW

• 5 Sec. overload ⇒ 2*1000 MW

24/36 harmonic filter ⇒ 2*80 MVar


368/454

Direct voltage :

• Nominal line voltage ⇒ 500 kV

• Maximum line voltage ⇒ 512 kV

• Minimum line voltage ⇒ 488 kV


369/454

Direct current :

• Nominal I ⇒ 1500 A

• Maximum I at nominal load ⇒ 1542 A

• Max. I at 2 hour over load ⇒ 1695 A

• Max. I at 5 sec. over load ⇒ 2140 A

Nominal line resistance = 7.5 Ω


370/454

Rectifier firing angle :

• Minimum ‘γ’ ⇒ 16o

• Max. ‘γ’ during normal operation ⇒ 18o

• Minimum ‘α’ ⇒ 5o

• Mini. ‘α’ during normal operation ⇒ 12.5o

• Max. ‘α’ during normal operation ⇒ 17.5o

Inverter firing angle :


371/454

Basic control :

• DC voltage or I (or power) can be controlled by controlling the internal voltage (Vdcor Cosα)and Vdcoi Cosγ

⇒ Gate control or using tap changing ofconverter transformer

⇒ Gate control is fast


372/454

⇒ Tap changing : Slow ( 5-6 sec/step)

⇒ Gate control is used for initial rapidcontrol action

⇒ Followed by tap changing to restore theconverter quantities ( ‘α’ of rectifier & ‘γ’for inverter) to their normal ranges


373/454

Basis for selection of control :

Following considerations influences the selectionof control characteristics

• Prevention of large fluctuations of DCcurrent due to variation in AC system

• Maintaining DC voltage near rated value

• Maintaining power factor at the sending &receiving end that are as high as possible

• Prevention of commutation failure in inverter


374/454

• Rectifier control ⇒ To prevent largefluctuations in DC current

ciLcr

dcoidcord RRR

CosVCosVI−+

−=

γα


375/454

• Denominator is very small

• A small change in Vdcor or Vdcoi cause a largechange in Id

• 25% change either in Vdcor or Vdcoi changes‘id’ by 100%

• If ‘α’ & ‘γ’ are kept constant, Idc can varyover a wide range for small change in i/pAC voltage at either end


376/454

• Not acceptable

• Rapid converter control prevents fluctuation of Idc

• For a given power transmitted Vdc profilealong the line should be close to rated values

• It minimizes Id & therefore line loss


377/454

• P.F should be as high as possible

• Minimize losses and current rating of equipment in the AC system

• Reduce the voltage drop at the AC terminal as load ↑

• ↓ the cost of reactive power supply to line


378/454

• So keep the rated power of the converteras high as possible for a given ‘V’ & ‘I’ ratingof transformer

• P.F depends on ‘α’ & ‘γ’

αmin = 5o (a +ve ‘V’ should appear acrossthe device)

• Normally operate at 15 – 20o, so that Vdcor can be ↑ to control DC power flow


379/454

• γ⇒ necessary to maintain a certain minimumextinction angle to avoid commutation failure

• Device should attain forward voltage blocking capability

μ⇒ depends on Id & i/p ‘V’

μβγ −=

= 15o at 50 Hz


380/454

Control of HVDC system


381/454

ciLcr

dcoidcord RRR

CosVCosVI++

−=

γα

Power at rectifier terminal, Pdr = Vdc .Id

Power at inverter terminal = Vdi .Id

= Pdr-id2 RL


382/454

Control characteristics

Ideal characteristics :

• Voltage regulation &current regulation

Kept distinct & areassigned to separateterminals

• Under normal operation :

⇒ Rectifier maintains current control (CC) &

⇒ Inverter operates constant extinction angle(CEA)


383/454

• Maintains adequate commutation margin

• Vdc ⇒ measured at the rectifier terminals

• Inverter characteristics includes Id.RL drop

( ) dciLdcoid IRRCosVV −+= γ


384/454

• Rectifier characteristics can be shiftedhorizontally by adjusting reference currentor current command or current order

• If measured current < current command, controller ↓ α

• Inverter characteristics can be raised orlowered by means of transformer taps


385/454

• As taps are changed, CEA regulator quicklyrestores desired γ

• Id changes

• Current regulator of rectifier changes ‘α’and control ‘i’

• Tap changer of rectifier acts to bring ‘α’ inthe desired range (10-20o)


386/454

Rectifier firing angle :

• Minimum ‘γ’ ⇒ 16o

• Max. ‘γ’ during normal operation ⇒ 18o

• Minimum ‘α’ ⇒ 5o

• Mini. ‘α’ during normal operation ⇒ 12.5o

• Max. ‘α’ during normal operation ⇒ 17.5o

Inverter firing angle :

Review


387/454

Basic control :

• DC voltage or I (or power) can be controlled by controlling the internal voltage (VdcoCosα)and VdcoCosγ

⇒ Gate control or using tap changing ofconverter transformer

⇒ Gate control is fast


388/454

⇒ Tap changing : Slow ( 5-6 sec/step)

⇒ Gate control is used for initial rapidcontrol action

⇒ Followed by tap changing to restore theconverter quantities ( ‘α’ of rectifier & ‘γ’for inverter) to their normal ranges


389/454

Basis for selection of control :

Following considerations influences the selectionof control characteristics

(a). Prevention of large fluctuations of DCcurrent due to variation in AC system

R ≈ 10 Ω and L =250 mH ⇒ Back to backL =1H ⇒ for long line

τ =20 m.sec ⇒ roughly


390/454

(b). Maintaining DC voltage near rated value

(c). Maintaining power factor at the sending &receiving end that are as high as possible

(d). Prevention of commutation failure in inverter

• Simulation study taking line L, R & C inaddition Lfilter is required


391/454

• Rectifier control ⇒ To prevent largefluctuations in DC current

ciLcr

dcoidcord RRR

CosVCosVI−+

−=

γα


392/454

• γ⇒ necessary to maintain a certain minimumextinction angle to avoid commutation failure

• Device should attain forward voltage blocking capability

μ⇒ depends on Id & i/p ‘V’

μβγ −=

= 15o at 50 Hz


393/454

Control of HVDC system


394/454

Control characteristics

Ideal characteristics :

• Voltage regulation &current regulation

Kept distinct & areassigned to separateterminals

• Under normal operation :

⇒ Rectifier maintains current control (CC) &

⇒ Inverter operates constant extinction angle(CEA)


395/454

• Quantities forming the co-ordinates are measured at some common point in the DC line

• Converter terminal can be one such possibility

( ) dciLdcoid IRRCosVV −+= γ

• Has a small –ve slope


396/454

• Maintains adequate commutation margin

• Inverter characteristics includes Id.RL drop


397/454

• Rectifier characteristics can be shiftedhorizontally by adjusting reference currentor current command or current order

• If measured current < current command, controller ↓ α

• Inverter characteristics can be raised orlowered by means of transformer taps


398/454

• As taps are changed, CEA regulator quicklyrestores desired γ

• Id changes

• Current regulator of rectifier changes ‘α’and control ‘i’

• Tap changer of rectifier acts to bring ‘α’ inthe desired range (10-20o)


399/454

• Constant current characteristics could be aline parallel to y-axis

• If proportional controller ⇒ slope could be -ve

• Generally current control is given to both the converters

• Ref. current for rectifier > Ref. current forinverter


400/454

• Iref(conv) – Iref(inv) = Imargin = +ve

• Assume that power flows in the line to be ↑

• αconv ⇒ takes the value of αmin

• Incase Id approaches Iref(conv), then

⇒ rectifier is working under constant ignition control

⇒ Inverter is working under constant extinction control


401/454

• After some time, tap changer changes the tap

⇒ ‘α’ of the converter ↑ to attain its normaloperating value (12- 17o)


402/454

Actual characteristics :

• Rectifier maintains constant ‘I’ by changing ‘α’

• ‘α’ can not be < αmin

• Once αmin is reached, no further ↑‘V’ is possible

• Rectifier will operate constant ignition angle(CIA)


403/454

• Constant current characteristics may not betruly vertical

⇒ Depends on the current regulator

• Therefore rectifier characteristics has twosegments (AB & FA)

• With proportional control C.C characteristics has – ve slope


404/454

( ) dcrorderd IRKKIV +−=

[ ]dorderdco IIKCosV −=∴ α

dcrd IRV +=

( ) dcrd IRKV Δ+−=Δ

( )crd

d RKIV

+−=ΔΔ

∴ ⇒ (with PI it is vertical)

Iord ⇒ current order


405/454

• At normal voltage , characteristics is defined by FAB

• At reduced ‘V’, it shifts down ⇒ F1 A1 B1

• CEA characteristics of the inverter intersect at ‘E’ for normal ‘V’ condition


406/454

• At reduced ‘V’, it does not intersect F1A1B

• A big reduction in rectifier ‘V’ would cause Id & ‘P’ ↓

⇒ System could shut down


407/454

• Inverter Iord < rectifier Iord

Iord(R) – Iord(I) ≈ 0.1 Irated

• In order to avoid the problem, inverter isprovided with current control


408/454

• Under normal condition

• Rectifier ⇒ C. C

• Inverter ⇒ CEA

• When i/p ‘V’ ↓⇒ rectifier ‘V’↓

⇒ Operating point E1

• Changes from one mode to another is knownas mode shift


409/454

• When inverter is on current control

dcidLddoi

doidcidLd

IRIRVCosVCosVIRIRV

+−=+−=

γγ

( ) dcrdLddord IRIRVIIK +−=−−

With proportional controller


410/454

( ) ( ),drefdoi IIKCosV −Δ−=Δ γ

( )ciLdd RRIV −Δ−Δ=

( ) dciLd

d IKRRIV

+−=ΔΔ

( ) dciLd IKRRV +−Δ=Δ

K >1

⇒ Slope is +ve⇒ ↑ Vdor to ↑ id

⇒ ↓ Vdoi to ↑ id


411/454

When does change over take place ?

• Current order is given to both the converters

Iref(C) > Iref(I)

Iref(C) > Iref(I) - Imargin ⇒ +ve (assume)

Imargin = 0.1 – 0.15 Irated


412/454

• Assume that i/p AC has dipped due to fault,Idc ↓ ,

αconv ⇒ αmin

and with this new value of ‘α’, Idc is ↓

• If Idc < (Iref(C) - Imar), inverter takes over thecurrent control & converter is working underC.I.A, after some time tap changer changes the tap


413/454

Review

Rectifier characteristics

Constant current by ‘α’ control

Constant ignition angle control

C.CCan have a –ve slope

Can be parallel to Y-axis


414/454

• Current control is given to both converters

But Iref(R) > Iref(I)

Iref(R) - Iref(I) = Imargin ≈ 0.1Irated

• Current control loop of inverter is inactivewhen current ≈ Iref(R)

Contd..


415/454

⇒ ‘γ’ should be decreased

• ‘e’ is –ve, ‘K’ is +ve ⇒ Iact should be ↓Iact > (Iref – Imar)

⇒ o/p of PI is zero

⇒ selector switch selects γmin


416/454

⇒ ‘γ, should be ↑ , so that Iact ↑, ‘K’ is +ve,o/p of PI starts increasing

• ‘e’ is +ve, Iact < (Iref – Imar)

⇒ Selector switch selects maximum of two inputs


417/454

• Due to line fault or during low i/p AC voltagecondition Vdco(R) will drop

⇒ Assume Vdco(R)Cosαmin < Vdco(I)Cosγ

• If there is no current control by the inverter , id will ↓ and eventually becomes zero


418/454

• Operate at E' till tap changer changes the tap

What happen If Imar is –ve ?

⇒ Rectifier is trying to control Iref(R)

⇒ Inverter is trying to control Iref(R)+ Imar

• In order to avoid this situation inverter is alsoprovided with current control


419/454

Inverter side :

• Id can be ↑ by ↑ ‘γ’

• As γ↑ , Id↑, but rectifier controller tries to ↓ the current (Iref(R) < Iref(I) )

• Since Id is ↑ due to increase in γ ,rectifier controller ↑ α to reduce Id

α⇒ towards 90o

γ⇒ towards 90o


420/454

⇒ New operating point could be ‘D'’

⇒ Correct sign to Imar is very important

• Imar should not be too smallbecause there could be measurement error


421/454

Mode stabilization :

• Intersection of αmin characteristics of converterand inverter CEA may not be well defined

• There could be multiple crossings

• Instead change the slope of theinverter characteristics near the crossing


422/454

Alternative inverter γ control

• Instead of regulating ‘γ’ (CEA)

• Maintain a constant DC voltage at a desiredpoint

• Could be sending end

• Required inverter voltage to maintain the abovevoltage is estimated by computing I.R drop


423/454

• ‘V’ profile is flat

• Constant ‘γ’ characteristics has droopingcharacteristics

γ ≈ 18o in voltage control mode


424/454

Constant ‘β’ control :

γμβ +=

μ⇒ function of id & Vac

⇒ Choose ‘β’ for worst case

⇒ At low loads additional security againstcommutation failure

⇒ As id ↑, minimum ‘γ’ may be encountered


425/454

• Vdcoi Cosβ remains constant

• As id ↑, Vd = VdoiCosβ + (RL+Rci)Id also ↑


426/454

• Use either constant Vdc or constant β control


427/454

Max. short term current = (1.2 -1.3) Irated

Minimum current limit : if id ↓ below acertain limit due to finite ripple in I,current will become discontinuous

• 12-pulse converter

• 12 times in one cycle current become zero(current interruption)

Current limit

Maximum current limit :


428/454

• There could be lightly damped oscillations(smoothing L & line C)

• Over voltage across the device

• Simulation study is required

• Ensure Imin in DC link


429/454

Voltage depend current-order limit (VDCOL)

• Under L.V condition it may not be desirableor possible to maintain rated current

• Commutation failure

• At one converter end Vac has ↓

↓∴ αCosVdco


430/454

• To maintain the current, voltage at the otherend of the line is adjusted

• Either ‘α’ or γ ↑

• Vac has ↓, ‘Q’ supplied by ‘C’ or filter also ↓

• Above problems can be addressed usingvoltage dependent current order limit

• Reactive power demand ↑


431/454

• VDCOL characteristics could be a function ofAC voltage or DC voltage


432/454

Review

Rectifier characteristics

Constant current by ‘α’ control

Constant ignition angle control

• Inverter ⇒ Constant extinction angle control

• Current control is given to both converters


433/454

But Iref(R) > Iref(I)

Iref(R) - Iref(I) = Imargin ≈ 0.1Irated

• Current control loop of inverter is inactivewhen current ≈ Iref(R)

Contd..


434/454

Imar should +ve :

• If Imar is –ve, reversal of power takes place(only academic interest)

Contd..


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Mode stabilization :

Contd..

• Intersection is not well defined

⇒ Change the slope Constant Vdc

Constant ‘β’


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Contd..

Current limit :

⇒ Imax = (1.2 -1.3) Irated

⇒ Imin ⇒ Should not be allowed to go intodiscontinuous

• There could be lightly damped oscillations


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Voltage depend current-order limit (VDCOL)

• Under L.V condition it may not be desirableor possible to maintain rated current

• Commutation failure

• At one converter end Vac has ↓

↓∴ αCosVdco


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• To maintain the current, voltage at the otherend of the line is adjusted

• Either ‘α’ or γ ↑

• Vac has ↓, ‘Q’ supplied by ‘C’ or filter also ↓

• Above problems can be addressed usingvoltage dependent current order limit

• Reactive power demand ↑


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• VDCOL characteristics could be a function ofAC voltage or DC voltage


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Rectifier inverter V-I characteristics

• Power transfer over the line can be controlledby varying Imar

• Signals are transmitted throughtelecommunication lines

• Communication may fail or DC line fault ⇒ Reverse power flow may occur

⇒ Inverter is provided with min. α limit ≈ 95- 110o


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Summary of basic control principle :

• HVDC system is basically current control

⇒ To limit over current

⇒ To prevent the system from running down due to fluctuations in AC voltage


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Significant aspects of basic control :

Rectifier Current control

‘α’ limit

• In current control mode closed loop regulatorcontrols the firing angle to regulate Id at Iord

• Tap changer control of the converter brings ‘α’within 10-20o


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• Inverter is functioned with CEA control and acurrent control

• Inverter control could have constant ‘β’ control

• Under normal operation rectifier is in currentcontrol & inverter is on CEA control mode

• In CEA mode, γ is regulated at around 15o


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• If there is a ↓ in AC voltage, ‘α’ of rectifier ⇒ αmin (CIA mode)

• If current falls to a certain limit, inverterwill assume C.C

Valve blocking & by passing :

• If one bridge is to be taken out of service

⇒ Only blocking will not extinguish the currentthat was flowing through the thyristor pair


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⇒ Inject AC voltage in the link

⇒ There could be ‘V’ & ‘I’ oscillations due tolightly damped circuit

⇒ Transformer feeding the bridge is also subjectedto DC magnetization

⇒ By pass the bridge when the devices (valves)are blocked


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⇒ Achieved using by pass valve and by pass switch

⇒ Assume T2 & T3 are conducting & blockingcommand is given


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⇒ Commutation for T2 to T4 is in usual manner

⇒ But incoming device T5 is prevented by nottriggering T5. When T1 get F.B (VAB +ve )trigger T1

⇒ Current by pass pair is shunted by closing S1& open S


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⇒ Current is first diverted from S1 to bypass pair

⇒ S1 will generate arc voltage

⇒ Trigger bypass pair

• For energization of blocked bridge


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Modern techniques

• HVDC using line commutated converters

• Requires AC voltage for commutation

• DC link is equivalent to a current source

• Requires reactive power

• ‘V’ can reverse but ‘I’ can not reverse

• Devices should be able to block –ve voltage

• Not suitable for weak grid


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• Instead use VSI

• ‘I’ could be in phase with ‘Vi’

• Inverter devices are self commutated


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• No AC voltage is required for commutation

• Conversion at UPF is possible

• DC link is voltage source


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• ‘V’ can not reverse, but ‘I’ can reverse

• Devices should be able to carry ‘I’ inboth directions


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Thank you

Documents

Peps Lectures