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  • Planarization coating for polyimide substrates used in roll-to-roll

    fabrication of active matrix backplanes for flexible displays

    Marcia Almanza-Workman, Albert Jeans, Steve Braymen, Richard E. Elder, Robert A. Garcia,

    Alejandro de la Fuente Vornbrock, Jason Hauschildt, Edward Holland, Warren Jackson, Mehrban Jam,

    Frank Jeffrey, Kelly Junge, Han-Jun Kim, Ohseung Kwon, Dan Larson, John Maltabes, Ping Mei, Craig

    Perlov, Mark Smith, Dan Stieler, Carl P. Taussig, Steven Trovinger, Lihua Zhao

    HP Laboratories

    HPL-2012-23

    Keyword(s): Planarization coating; plastic substrate; self-align imprint lithography; flexible displays; active matrix

    backplane; roll-to-roll fabrication

    Abstract: Good surface quality of plastic substrates is essential to reduce pixel defects during roll-to-roll fabrication of flexible

    display active matrix backplanes. Standard polyimide substrates have a high density of bumps from fillers and

    belt marks and other defects from dust and surface scratching. Some of these defects could be the source of shunts in

    dielectrics. The gate dielectric must prevent shorts between the source/drain and the gate in the transistors, resist

    shorts in the hold capacitor and stop shorts in the data/gate line crossovers in active matrix backplanes fabricated by

    self-aligned imprint lithography (SAIL) roll-to-roll processes. Otherwise data and gate lines will become shorted

    creating line or pixel defects. In this paper, we discuss the development of a proprietary UV curable planarization

    material that can be coated by roll-to-roll processes. This material was engineered to have low shrinkage, excellent

    adhesion to polyimide, high dry etch resistance, and great chemical and thermal stability. Results from PECVD

    deposition of an amorphous silicon stack on the planarized polyimide and compatibility with roll-to-roll processes to

    fabricate active matrix backplanes are also discussed. The effect of the planarization on defects in the stack, shunts

    in the dielectric and curvature of finished arrays will also be described.

    External Posting Date: February 6, 2012 [Fulltext] Approved for External Publication

    Internal Posting Date: February 6, 2012 [Fulltext]

    Copyright 2012 Hewlett-Packard Development Company, L.P.

  • Planarization coating for polyimide substrates used in roll-to-roll fabrication of active matrix backplanes for flexible displays

    A. Marcia Almanza-Workman*a, Albert Jeansb, Steve Braymenc, Richard E. Elderb, Robert

    A. Garciab, Alejandro de la Fuente Vornbrockb, Jason Hauschildtc, Edward Hollandb, Warren Jacksonb, Mehrban Jamb, Frank Jeffreyc, Kelly Jungec, Han-Jun Kimb, Ohseung Kwona, Dan

    Larsonc, John Maltabesb, Ping Meib, Craig Perlovb Mark Smithb, Dan Stielerc, Carl P. Taussigb, Steven Trovingerb, Lihua Zhaob

    aPhicot Inc, 1501 Page Mill Rd, Palo Alto, CA 94304, USA;

    bHewlett-Packard Laboratories, 1501 Page Mill Rd, Palo Alto, CA 94304, USA; cPowerfilm Inc, 2337 230th St, Ames, IA 50014, USA.

    ABSTRACT

    Good surface quality of plastic substrates is essential to reduce pixel defects during roll-to-roll fabrication of flexible display active matrix backplanes. Standard polyimide substrates have a high density of bumps from fillers and belt marks and other defects from dust and surface scratching. Some of these defects could be the source of shunts in dielectrics. The gate dielectric must prevent shorts between the source/drain and the gate in the transistors, resist shorts in the hold capacitor and stop shorts in the data/gate line crossovers in active matrix backplanes fabricated by self-aligned imprint lithography (SAIL) roll-to-roll processes. Otherwise data and gate lines will become shorted creating line or pixel defects. In this paper, we discuss the development of a proprietary UV curable planarization material that can be coated by roll-to-roll processes. This material was engineered to have low shrinkage, excellent adhesion to polyimide, high dry etch resistance, and great chemical and thermal stability. Results from PECVD deposition of an amorphous silicon stack on the planarized polyimide and compatibility with roll-to-roll processes to fabricate active matrix backplanes are also discussed. The effect of the planarization on defects in the stack, shunts in the dielectric and curvature of finished arrays will also be described.

    Keywords: Planarization coating, plastic substrate, self-align imprint lithography, flexible displays, active matrix backplane, roll-to-roll fabrication

    1. INTRODUCTION Recently there has been increasing demand for lightweight, low-cost, and rugged displays. Fabricating devices on

    flexible webs is one way to meet these requirements, with the added advantage that a web can be roll-to-roll (R2R) processed. This could result in dramatically lower fabrication costs since R2R processing is steady-state and avoids many of the transients and handling complications associated with traditional batch processing of silicon wafers and flat panels, thus enabling higher throughput. In addition, a rolled up web is impervious to particle contamination so that clean room requirements are substantially reduced. The ideal substrate for R2R electronics fabrication has not yet emerged. Material choice is highly dependent on application and process compatibility. Stainless steel and flexible glass can support high process temperatures and are impermeable, but the former has a rough surface, is opaque, is prone to kinking on impact due to its lower yield strain relative to plastic films and requires a dielectric isolation layer, and the latter is notch sensitive. Polyethylene naphthalate (PEN), and polyethylene terephthalate (PET) have good transparency and relatively low cost but are limited to low process temperature ceilings and have high coefficients of thermal expansion (CTE) which are incompatible with typical inorganic thin film transistor materials. Processing PEN or PET at moderate temperature results in increased surface roughness due to migration of oligomers to the surface. This roughness degrades optical and electrical device performance. Planarization coatings act as a barrier to this cyclic oligomer migration.1,2 Polyimide can be processed at temperatures in excess of 300C and has excellent mechanical properties but has poor transparency. Table 1 summarizes some of the important properties of the common substrate options. In

  • general these substrates all have anisotropic properties due to the R2R processes used in their manufacture. From a product form-factor perspective, plastics have the best combination of mechanical toughness, light weight and low cost; however, their poor mechanical stability and high permeability make device fabrication challenging. Thin glass can be made flexible and it provides an excellent impermeable interface for device fabrication, but it is still notch-sensitive. Tiny imperfections or damage at the edge of the web can lead to catastrophic failure.

    Table 1. Substrate Options for R2R Manufacturing

    Polyimide PEN PET Stainless steel Flexible

    glass Max process Temp [C] 350 180 150 1000 600 Modulus [GPa @20C] 9 5 4 200 70 transparency Low Good Good Opaque Exc. Surface roughness Med. Med. Med. Poor Exc. CTE [ppm/C] 16 40 ~20 10 5 Moisture absorption Low Med. Med. None None cost Med. Med. Low Moderate High?? issues Yellow High CTE Low process temp Conductive Stiff Brittle

    The surface quality of the substrate is essential to reduce pixel defects to an acceptable level on active matrix backplanes fabricated by roll-to-roll processes using SAIL technology. Typical polyimide substrates have a high density of bumps from fillers and belt marks and other defects from dust and surface scratching (Figure 1). It is believed that some of these bumps could be the source of shunt defects in our dielectric. A composite substrate built up from a plastic film with a thin planarization coating is an attractive option. The polymer will make up the bulk of the material and will dominate the mechanical behavior. A thin, smooth coating will serve as a clean, impermeable interface on which to build high performance thin film electronics. Some of the main requirements of the planarization coating are listed in Table 2. In this paper, we report the development of a new proprietary UV curable material (4Mp) that can be coated using a 13 wide gravure coater. The right SEM image in Figure 1 shows that the surface of 4Mp is very smooth and does not replicate defects on the surface of the polyimide. The PECVD deposited thin film stack on the planarized polyimide is very smooth whereas the stack on the non-planarized polyimide conforms to defects on the surface.

    Figure 1. Polyimide planarization coating

    Planarizationcoating

    50umPolyimidesubstrate

    Particlecontamination(dust) Scratchordefect

    Fillersembeddedinsubstrate

    Beltmark

    35um

    UncoatedPolyimide CoatedPolyimide

    2um 2um

    2um

    Thinfilmstack(withplanarization)Thinfilmstack(withoutplanarization)

    2um

  • Table 2. Planarization coating requirements

    CH

    EMIC

    AL

    Fast UV curing (

  • 2. PLANARIZATION COATING REQUIRMENTS AND FORMULATION The effects of materials selection on some of the main properties of the planarization coating are described below: 2.1. Shrinkage

    It is important to have a low shrinkage formulation to prevent curling of the polyimide substrate that can introduce stresses and curvature to the finished active matrix backplanes. Therefore, the polyimide coated with a planarization layer of

  • Adhesion of 4Mp to