R7410504 Advanced Computer Architecture

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  • 8/3/2019 R7410504 Advanced Computer Architecture

    1/4

    Code: R7410504

    IV B.Tech I Semester (R07) Regular & Supplementary Examinations, November/December 2011

    ADVANCED COMPUTER ARCHITECTURE

    (Computer Science & Engineering)

    Time: 3 hours Max Marks: 80

    Answer any FIVE questions

    All questions carry equal marks

    *****

    1 (a) Explain the trends in parallel processing.(b) Explain about quantitative principles of computer design.

    2 Explain about different types of addressing modes with an example.

    3 (a) Explain about TPC bench mark.

    (b) Explain about cm* architecture.

    4 Explain about pipeline scheduling in detail.

    5 (a) Explain about memory hierarchy in detail.(b) Explain about any one cache optimization technique.

    6 (a) Explain about SIMD array processor.(b) Explain about cache coherence protocols.

    7 (a) Explain about different types of buses.(b) Explain about designing a cluster.

    8 (a) Explain about designing an I/O system.(b) Explain about inter cluster with eg.

    *****

    1

  • 8/3/2019 R7410504 Advanced Computer Architecture

    2/4

    Code: R7410504

    IV B.Tech I Semester (R07) Regular & Supplementary Examinations, November/December 2011

    ADVANCED COMPUTER ARCHITECTURE

    (Computer Science & Engineering)

    Time: 3 hours Max Marks: 80

    Answer any FIVE questions

    All questions carry equal marks

    *****

    1 (a) Explain parallelism in uni-processor systems.(b) Explain the architecture of uniprocessor system.

    2 Explain about pipelined floating print adder with four processing stages.

    3 (a) Explain about tightly coupled multiprocessor.

    (b) Explain about server bench mark.

    4 (a) Describe about local scheduling.(b) Explain about track scheduling.

    5 (a) Explain about how to reduce cache miss penality and miss mate.(b) Explain about cache memory.

    6 (a) What are the advantages of shared memory architecture?(b) Write short notes on distributed shared memory.

    7 (a) Explain different types of errors and failures.

    (b) Explain different types of storage devices.

    8 Write short note oni) Time of flight.ii) Transmission time.iii) Transport latency.iv) Overhead.

    *****

    2

  • 8/3/2019 R7410504 Advanced Computer Architecture

    3/4

    Code: R7410504

    IV B.Tech I Semester (R07) Regular & Supplementary Examinations, November/December 2011

    ADVANCED COMPUTER ARCHITECTURE

    (Computer Science & Engineering)

    Time: 3 hours Max Marks: 80

    Answer any FIVE questions

    All questions carry equal marks

    *****

    1 (a) Explain the balancing of subsystem with band width.(b) Explain about spaces of data, information, knowledge and intelligence.

    2 (a) Explain about Flynns architecture.(b) Explain about non linear pipeline and reservation tables.

    3 (a) Explain about addressing modes of signal processing.(b) Explain the communication between processes in multi process environment.

    4 (a) Explain about trace scheduling in detail.(b) Explain about memory hierarchy.

    5 (a) Explain the categories of cache organization based on block placement.(b) Explain about fully associative cache memory.

    6 (a) Describe about cache coherence protocols.(b) What are the factors contribute to 13 cache miss rate and how do they change as 13 caches

    grows?

    7 (a) Explain interconnection network media.(b) Explain about RAID.

    8 (a) What are the issues in interconnecting networks?(b) Define cluster inter & intra.

    *****

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  • 8/3/2019 R7410504 Advanced Computer Architecture

    4/4

    Code: R7410504

    IV B.Tech I Semester (R07) Regular & Supplementary Examinations, November/December 2011

    ADVANCED COMPUTER ARCHITECTURE

    (Computer Science & Engineering)

    Time: 3 hours Max Marks: 80

    Answer any FIVE questions

    All questions carry equal marks

    *****

    1 (a) Explain about memory hierarchy.(b) Explain balancing of subsystem bandwidth.

    2 (a) Explain the architecture of iliac IV system.(b) Describe about wall clock time.

    3 (a) Explain about VLIW approach.(b) Explain about operations in the instruction set.

    4 (a) Explain about static branch protection.(b) What is trace scheduling explain?

    5 (a) Explain the block when it is found in cache.(b) Explain about two cache optimization technique.

    6 (a) Explain about multiprocessor and thread level processor.(b) Explain about distributed shared memory.

    7 (a) Explain different types of storage system.(b) Describe how to design an I/O system.

    8 Explain about circuit switching and packet switching.

    *****

    4