Rework techniques process evaluation for chip scale packages

200 IEEE TRANSACTIONS ON ELECTRONICS PACKAGING MANUFACTURING, VOL. 23, NO. 3, JULY 2000

Rework Techniques Process Evaluation for ChipScale Packages

Tennyson A. Nguty, J. D. Philpott, N. N. Ekere, Member, IEEE, Samuel Teckle, B. Salam, and Durairaj Rajkumar

Abstract—The packaging formats, chip scale package (CSP)and ball grid array (BGA) have allowed significant reductions incomponent size compared to conventional surface mount devices(SMD) such as quad flat packs (QFP). However, the position ofthe solder joints formed (underneath the chip) after reflow meansthat visual inspection is impossible. For the defective chip, the onlyrealistic method of rework is to remove and replace it. Componentremoval can be easily achieved, however replacement may bemore complex. Difficulties in the procedure may arise from lossof terminations during the removal process, and high componentpopulation densities on printed circuit boards (PCB) may alsoinhibit access to the component pad site.

The typical rework process consists of a number of steps in-cluding; component removal, PCB pad clean-up, flux or solderpaste application, component placement and reflow. In this paper,we evaluate the pad clean up stage of the CSP rework process, in-cluding the design and analysis of a variety of solder paste or fluxdeposition techniques.

Two PCB pad-cleaning methods have been compared and con-clusions drawn from the resultant pad finish. In the first technique,a hot nitrogen de-soldering gun was used to reflow any residualsolder on the pad, which was then removed by a vacuum once liq-uefied. The second technique involved using braided solder wickand a soldering iron with a blade tip to remove residual solder fromthe PCB pad.

Four deposition techniques have be assessed; these in-cludes mini-stencil, dip transfer, on- and off-contact stamping.Mini-stencil is the traditional method used in the electronicsmanufacturing industry for the deposition of solder paste ontoreworked component sites. The remaining deposition techniqueshave been developed in order to overcome access restrictions thatmight exist on densely populated PCB’s.

Index Terms—CSP, dip transfer, mini-stencil, rework, solderpaste, soldering, surface mount technology.

I. INTRODUCTION

T HE TREND by the electronic industry toward theminiaturization of electronic assemblies resulted in

development of ball grid array (BGA) components. The BGA

Manuscript received March 1, 1999; revised June 23, 2000. This work wassupported by NEC Technologies, U.K., Ltd., Grant GR/L66113 from the Engi-neering and Physical Sciences Research Council (EPSRC), U.K., OK Interna-tional, and Multicore Solders, Ltd., U.K.

T. A. Nguty is with Bookham Technology, Abingdon OX14 4RY, U.K.J. D. Philpott is with Celestica, Manchester, U.K. (e-mail: dphilpot@ce-

lestica.com).N. N. Ekere, B. Salam, and D. Rajkumar are with the Electronics Manu-

facturing Engineering Research Group, School of Aeronautical, Mechanicaland Manufacturing Engineering, University of Salford, Manchester M5 4WT,U.K. (e-mail: [email protected]; [email protected];[email protected]).

S. Teckle is with Marconi, Manchester, U.K.Publisher Item Identifier S 1521-334X(00)07840-X.

differs from the traditional peripherally leaded components,such as the quad flat pack (QFP), since connection to theprinted circuit board (PCB) is achieved by a series of solderbumps on the underside of the component. These packagesare broadly termed area array packages. This approach allowsfor a relaxation in pitch size resulting in improved yields andsavings in PCB real estate. The handling of component is alsoeasier due to the robustness of the solder bumps compared tofine pitch leads [1].

Chip scale packages (CSP’s) are defined as packages thattakes no more than twenty percent additional area than the baresilicon [2], and are the next generation of component after BGA.Like ball grid array (BGA), CSP are area array packages andhave become a major force in the electronics industry’s trend to-ward miniaturization [3]. CSP were designed in order to bridgethe gap between BGA and flip chip, and is considered to be thebest package type to meet the needs of the electronics industryfor the years to come [4]. Implementation CSP and flip chiptechnology was earlier reported in [5].

Whilst the use of the underside of the component forterminations has led to many benefits, area array packageshave also introduced some difficulties not encountered withconventional surface mount devices (SMD). These difficultiesstem from the position of the solder joints on area arraycomponents, which means that visual inspection is impossible.The only means of inspection are x-ray, acoustic microscopyand functionality testing, while repair of defective solder jointscan only be achieved by complete removal, and replacement ofthe component.

As such, the rework of CSP packages illustrated in Fig. 1consists of the following five key stages:

1) component removal;2) pad cleanup (i.e., removal of residual solder);3) solder paste or flux deposition;4) component placement;5) reflow of component.

In this paper, we investigate different pad clean-up and solderpaste or flux deposition methods. Two different pad clean upmethods including, solder wicking and nitrogen de-soldering,have been assessed. The resultant pad finish has been character-ized in terms of pad height and shape. In addition to mini-stencildeposition, on- and off-contact stamping and dip transfer havealso been assessed for the deposition of solder paste/flux. Thevolume of solder paste and flux deposit have been determinedfor each of these techniques with mini-stencil deposition actingas the bench mark for what is a suitable deposit volume.

1521–334X/00$10.00 © 2000 IEEE

NGUTY et al.: REWORK TECHNIQUES PROCESS EVALUATION FOR CHIP SCALE PACKAGES 201

Fig. 1. Rework process route for CSP.

Fig. 2. Test PCB.

Fig. 3. Underside of the CSP showing 116 solder bumps.

II. EXPERIMENTATION AND PROCESSDESIGN

A. The PCB and CSP

Fig. 2 shows the PCB used for the rework trials. It is man-ufactured from FR-4, and has 36 “daisy chained” CSP compo-nent sites arranged in three groups of twelve components. ThePCB tracks and pads are copper with electroless nickel/immer-sion gold finish. Each component site consist of 116 pads with adiameter and pitch of 0.4 and 0.8 mm respectively. The PCB isalso coated with photo-imageable solder resist of thickness 20

m. The dimensions of the PCB were 191 mm93 mm 1.3mm. Nine fully populated PCB’s were used for the trials.

The CSP used for the trials had 116 solder balls with a balldiameter and pitch of 0.4 and 0.8 mm respectively. Solder bumpswere eutectic tin/lead and the unsoldered component stand-offwas 0.345 mm. The CSP had dimensions of 12 mm12 mm

1.06 mm and the underside shown in Fig. 3.

B. PCB Pad Clean Up Methods

After removal of a defective CSP component, some residualsolder is left on the PCB pads by the process. This residualsolder surface tends to be irregular, and solder bridging betweenpads may also occur. In order to successfully and reliably placeand solder the new component, this residual solder must be re-moved. This process is termed pad clean up, and its purpose isto return the component site to as close to its original state aspossible (i.e. new board).

Two commonly used techniques for PCB pad clean up wereperformed. The first of these involves using a nitrogen de-sol-dering, which uses hot nitrogen to reflow the residual solder,and a vacuum to remove it once molten. The system consistsof a nozzle constructed from two concentric tubes. The outertube supplied the hot nitrogen to the PCB, whilst the inner tubewas connected to a vacuum that removed the molten solder. Thisprocess is illustrated in Fig. 4.

In the second cleaning technique, heat is applied through acopper braid known as solder wick with a blade tip solderingiron (Fig. 5).

C. Deposition Techniques

As stated, four different deposition techniques have beendesigned and investigated. These includes; mini-stencil, diptransfer, on- and off-contact stamping. Dip transfer was thesubject of a previous investigation for BGA rework [8]. Thiswork concluded that dip transfer was a suitable depositiontechnique for plastic ball grid arrays (PBGA), but unsuitable


Fig. 4. Nitrogen desoldering process [6].

Fig. 5. Solder wicking process [7].

TABLE ISELECTION OF SOLDER PASTES AND

FLUXING MATERIALS INVESTIGATED

for ceramic ball grid array (CBGA). This is because theminimum volume of solder required is less than that whichcan be achieved by dip transfer. This work also identified lowviscosity as one of the important properties for solder pastesused for this deposition technique.

A 0.15 mm thick ministencil was used with aperture diameterand pitch of 0.35 and 0.8 mm, respectively.

On- and off-contact stamping involves aligning the CSPsolder bumps with a bath of solder paste or flux [Figs. 6(a) and7(a)]. The component is then lowered into the solder paste orflux bath as shown in Figs. 6(b) and 7(b). On removal, solderpaste/flux adheres to the solder bumps [Figs. 6(c) and 7(c)].The two techniques are identical apart from the methods ofsetting the immersion depth of the solder bumps. In on-contactstamping it is the depth of the bath itself that sets this immersiondepth, and the technique is named because the solder bumpsmakes contact with the bottom of the bath.

With off-contact stamping, the solder bumps do not makecontact with the bottom of the bath. The immersion depth of thebumps is set by the thickness of a separator plate. By varyingthe thickness of this plate, the immersion depth is also changed.

In the final deposition technique, dip transfer, it differs fromon- and off-contact stamping in that the solder bumps aredipped into an array of circular apertures, instead of an openbath [Fig. 8(a)]. As with on- and off-contact stamping, theapertures are filled with solder paste or flux using a squeegeeblade. A vision system is required to align the solder bumpsand the circular apertures in the dip transfer process.

D. Solder Pastes and Flux Materials Selection

Four types of no clean solder paste and one type of no cleanflux was used, as shown in Table I. From Table I, the solderpastes used had metal contents that ranged from 60–89% so thatthe effect of metal content on deposit volume can be evaluated.

III. RESULTS AND ANALYSIS

A. Pad Clean Up

The purpose of pad clean up is to remove residual solder leftby removal of the defective component and to return the pads onthe component site to as close as possible to their original state(i.e. new boards).

Pad heights were measured after cleaning by both methods,and compared with that of a new board as a reference. As such,the average pad height for twelve new component sites, 24 sitescleaned using nitrogen de-soldering and solder wicking weredetermined. The pad heights were measured using a HunterZ-check. In Table II, the measured pad heights are presentedand illustrated graphically in Fig. 9.

As can be seen from Table II, nitrogen de-soldering producedan average pad height closer to the original pad height averagethan solder wicking. Whilst both techniques removed a smallnumber of pads, this is not considered significant since thetotal number of pads cleaned by each technique was 1392. Theremoved pads occurred on the same component site for bothcleaning techniques. It does imply that, to minimize the amountof damage to the component site, great care must be taken.

In addition to height, the shapes of the cleaned pads werealso analyzed. The principal surface shapes identified included;flat, convex, concave and inclined. The percentages of pads dis-playing each of these surface shapes are given in Table III.

Of the identified pad surface shapes, flat and concave surfaceshapes are deemed most desirable, since most solder paste willtend to remain on the pad rather than slide off. From Table III,90% of the pads cleaned by solder wicking tended to have oneof these surface shapes in contrast to 55% by nitrogen de-sol-dering.

B. Solder Paste/Flux Deposition

Solder paste deposition is one of the most important stages ofthe rework process (Fig. 1). In this work, four solder paste/fluxdeposition techniques including; mini-stencil, dip transfer,on-contact and off-contact stamping have been investigated.Mini-stencil deposition is the technique traditionally used bythe electronics industry for applying paste or flux to a compo-nent site during rework. However, the other techniques listedhave been designed for use where access to the component siteis restricted due to a high population density.


Fig. 6. Illustration of the on-contact stamping process.

Fig. 7. Schematic of the off-contact stamping process.

Fig. 8. Dip transfer process.

TABLE IIPAD HEIGHTS AFTER CLEANING BY WICKING AND NITROGEN DE-SOLDERING

Mini-Stencil Deposition:Five prints were made for eachpaste or flux. From these, ten deposits were selected fromdifferent regions of the print and the heights and diametersmeasured for each print (Table IV), illustrated graphically inFig. 10.

The deposit shape for Paste A was observed to be a cylin-drical column, whereas for Paste B and Flux E, the shape wasan elliptical dome. The average deposit volume was calculatedbased on the deposit shape using the average height and diam-eter.

Solder pastes C and D were not tested for mini-stencil depo-sition since their low viscosity, as a result of low metal contentmade them not printable.

On- and Off-Contact Stamping:The effect of immersiondepth of the solder bumps in the solder paste or flux hasbeen investigated. On- and off-contact stamping depths cor-responding to immersion of 35, 40, and 45% of the solderbump volume were calculated using the standard equation fora truncated sphere shown in equation 1 [9]. This equates tostamping depths of 0.17, 0.18, and 0.19 mm. In equation (1),


Fig. 9. Resultant pad heights after cleaning.

TABLE IIIPERCENTAGE OFCLEANED PADS DISPLAYING SURFACE SHAPESIDENTIFIED

TABLE IVAVERAGE DEPOSITHEIGHTS, DIAMETERS AND VOLUMES WITH

MINI-STENCIL DEPOSITION

is the solder bump diameter andthe height of the sphericalcap (stand-off height of the chip).

(1)

It was decided that stamping depths equal to or greater than50% volume immersion, should be avoided due to increasedpossibility of bridging.

Dip Transfer: The immersion depth of the solder bump islimited by the aperture dimension, hence aperture diameters in-

cluding 0.39, 0.4, and 0.42 mm have been analyzed. These di-ameters represent the case for apertures smaller, equal to andlarger than the solder bump diameter.

For on- and off-contact stamping and dip transfer processes,the deposit on the bumps was observed to form a conical shapedcap over the solder bump (Fig. 11). The heights of ten depositswere measured for each sample, and used to calculate the av-erage deposit height. The average deposit heights obtained forboth stamping techniques are shown in Fig. 12.

The average volume of solder paste/flux deposit was calcu-lated by first determining the volume of the circular based coneformed by the deposit, and then subtracting the volume occu-pied by the solder bump. It was assumed that the base of thedeposit was situated at the point to which the solder bump wassubmerged in the solder paste/flux (i.e., stamping depth). It wasfurther assumed that the diameter of the cone base was the diam-eter of circular plane of the solder bump at that point, plus thediameter of one solder particle. Using the data in Fig. 12, theaverage volume for each deposition technique was determined(Fig. 13), for on- and off-contact stamping.


Fig. 10. Paste transfer with mini-stencil (Table IV).

Fig. 11. Approximation of paste/flux transfer onto solder bump.

From Fig. 13, the effect of stamping depth on deposit wasfound to be less significant than that of solder paste metalcontent. Paste C, having a metal content of 75% gave the largestdeposit height for both the 0.17 and 0.18 mm stamping depths.Paste D with a metal content of 60% gave the largest depositfor the 0.19 mm stamping depth. For “on-contact stamping,”the deposit volumes obtained were approximately one tenth ofthose obtained by mini-stencil deposition. As such on-contactstamping is suitable for flux deposition, where increasedstand-off is not a prerequisite from solder paste application andcomponent site access with a mini-stencil is restricted. With“off-contact stamping,” the effect of immersion depth seemedto have greater effect on deposit volume than observed foron-contact stamping (see Fig. 13), with the 0.18 mm depthgiving the greatest deposit. However, the greatest effect ondeposit volume was identified, with paste D giving the greatestvolumes for immersion depths of 0.17 and 0.18 mm. For animmersion depth of 0.19 mm the greatest volume was obtainedusing Flux E.

The deposits from the off-contact stamping technique werefound to contain less solder particles than those obtained

by the on-contact process. It could be due to the formationof a flux vehicle rich layer on top of the solder bath as aresult of the solder particles settling to the bottom. In theon-contact method, the solder bump penetrates this layerfully and makes greater contact with the rich solder particlelayer below. With off-contact stamping, less of the solderbump makes contact with the solder particle rich layer,resulting in reduced numbers in the solder particles in thesolder paste deposit. As before, the off-contact stampingtechnique is recommended for flux deposition where in-creased stand-off is not a requirement since the depositvolumes obtained are approximately one tenth of thoseobtained with a mini-stencil. Furthermore, the process is lesspractical than on-contact stamping, since the separator platemust be removed and replaced to allow the solder bath tobe refilled.

With the “dip transfer” technique, deposits could not be ob-tained for any of the solder pastes used. This was unexpected,as previous work on BGA rework [8], demonstrated that thedip transfer technique could be implemented for larger solderbumps. This may be due to the surface energy of the aperturesin the dip transfer being greater than that of the smaller solderbumps found on CSP.

The average deposit height obtained for flux was found forten deposits with aperture diameters of 0.39, 0.40, and 0.42 mm.From these, the average volumes were estimated using the samecalculation used for the on- and off-contact stamping process(Fig. 14). As can be seen from Fig. 14, the difference in depositheight for the three apertures is insignificant.

Dip transfer produced larger deposit volumes for flux thanon- and off-contact stamping techniques, but not mini-stencil.However, the fact that a vision system must be used to align thecomponent solder bumps with the dip transfer apertures makesit less practicable for shop floor use than on-contact stamping.


Fig. 12. Average deposit heights from on- and off-contact stamping.

Fig. 13. Average volume of paste/flux transfer during on- and off-contact stamping.

IV. SUMMARY AND CONCLUSIONS

In this paper, we have demonstrated the rework techniquesavailable for CSP. Pad clean-up and deposition methods havebeen evaluated. The pad clean-up methods included, solderwicking and nitrogen de-soldering, while the deposition tech-niques included mini-stencil, dip transfer, on- and off-contactstamping.

Solder wicking produced the best results for pad clean upin terms of surface shape, however, nitrogen de-solderinggave an average pad height closer to that of the averagenew pad height. Mini-stencil deposition produced the largest

deposits for both solder paste and flux. This result is ex-pected since the process relies on mechanical action of thesqueegee blade for deposition to take place, but also sincethe solder pastes used are not designed for use with thealternative deposition methods. Dip transfer gave reasonabledeposit volumes for flux, but was still only one fifth of thoseobtained by mini- stencil. On- and off-contact stamping gavesignificantly less deposit volume (approximately one tenth)than mini-stencil deposition.

On- and off-contact stamping and dip transfer have beenshown to be suitable techniques for flux deposition during CSP


Fig. 14. Flux transfer from the dip transfer technique.

rework where stand-off height is not an issue, but access to thecomponent site is restricted. Of the three techniques, on-contactstamping is the most practical and simplest for use in the shopfloor.

REFERENCES

[1] G. Dody and T. Burnette, “BGA assembly and rework,”Surface MountTechnol., vol. 10, no. 5, pp. 39–44, May 1996.

[2] R. P. Prasad, “Component packaging issues: BGA and CSP,”SurfaceMount Technol., pp. 30–32, Dec. 1997.

[3] S. Rao and J. Hunter, “CSP assembly—manufacturability vehicle designand reliability assessment,” inProc. Tech. Progr. NEPCON W., 1998,Technical Session 11.

[4] P. Chang, K. Nakajiima, and N. Brathwaite, “CSP board level assemblyprocess qualification,” inProc. Tech. Progr. NEPCON W., 1998, Tech-nical Session 31.

[5] T. A. Nguty and N. N. Ekere, “Chip scale package versus flip chip: Issuesto consider,”Circuits Assembly, pp. 26–32, Nov. 1999.

[6] OK International,Metcal Product Catalogue, 1998, p. 10.[7] Edsyn, Inc.,Soldering, SMT, and De-Soldering Product Catalogue,

1998, p. 44.[8] M. A. Riedlin and N. N. Ekere, “Solder paste deposition for BGA re-

work,” Circuits Assembly, pp. 48–54, Nov. 1997.[9] T. A. Nguty and N. N. Ekere, “Modeling a low cost wafer bumping tech-

nique for flip chip application,”Int. J. Microcirc. Electron. Packag., vol.22, no. 4, 1999.

Tennyson A. Ngutyreceived the B.Sci. degree (with honors) in maths–physicsfrom the University of Leicester, Leicester, U.K., in 1991, and the M.S. andPh.D. degrees in applied optics from the University of Salford, Salford, U.K.,in 1993 and 1997, respectively.

He worked as a Post Doctoral Research Assistant at the University of Salford,from 1997 to 2000. He is currently with Bookham Technology, Ltd, as a SeniorDesign Engineer.

Dr. Nguty is a member of the Institute of Physics (IOP) and the British Societyof Rheology.

J. D. Philpott received the B.Eng. degree (with honors) in aeronautical engi-neering and the M.Sc. degree in advanced manufacturing from the Universityof Salford, Manchester, U.K., in 1995 and 1996, respectively, and the Ph.D. de-gree in electronics manufacture.

Since receiving his doctorate he joined the Research and Development De-partment, Celestica, U.K., where his main research activities involve the devel-opment of conductive adhesive flip chip joining processes.

N. N. Ekere (M’84) received the M. S degree in manufacturing engineeringfrom the Loughborough University of Technology, Loughborough, U.K., in1984 and the Ph.D. degree from The University of Manchester Institute ofScience and Technology, Manchester, U.K., in 1987.

He currently holds a Chair in electronics manufacturing in the Department ofAeronautical, Mechanical and Manufacturing Engineering, University of Sal-ford, Salford, U.K. He is engaged mainly in research into soldering and elec-tronics packaging technology.

Dr. Ekere is a Chartered Engineer and a member of the IEE.

Samuel Tecklereceived the B.Eng. degree in manufacturing engineering andthe M.Sc. degree in advanced manufacturing from the University of Salford,Manchester, U.K., in 1997 and 1999, respectively.

He is now with Marconi as a Process Engineer, specializing in area arrayassembly.

B. Salam received the B.Sc. degree in mechanical engineering from the Na-tional Institute of Science and Technology/ISTN, Jakarta, Indonesia, in 1996and is currently pursuing the M.S. degree in advanced manufacturing at SalfordUniversity, Manchester, U.K.

He later was a Mechanical Engineer in a stainless steel company in Jakartauntil 1998. He is currently a Research Student at Salford University.

Durairaj Rajkumar received the B.Eng. degree (with honors) in manufacturingengineering from the University of Salford, Manchester, U.K., in 1999, where heis currently pursuing the M.S. degree in the development of low cost chip-scalesoldering techniques.

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Rework techniques process evaluation for chip scale packages