Scalable Readout System (SRS)

Overview

Characteristics

Links instead of buses: more reliable, longer distance, more bandwidth, system immunity to single point failure.

Scalable: small system = few links directly from FEC to readout PC via GBE, medium sized system

up to 36 FEC cards require one SRU readout controller and DTC multiplexer, large system

require multiple SRUs

Standard: frontend card chassis, cables, fibers, network ( only FEC , SRU and adapters are

custom items) Eurocard format, CAT6 cable or 850 nm MM fiber, (10)Gigabit Ethernet

Scalable Readout Unit: a 1U x 19" box that serves DTC links of up to 36 EFC cards and

multiplexes event data via a single Gigabit Ethernet link to the readout computer. It

provides ample I/O options for user-defined trigger and clock systems, including a DCS card

option (ALICE ) and TTC fiber (LHC trigger and timing)

DTC link: for merging Data, Trigger, Control over a single CAT 6 cable between up to 36 FEC's and 1 SRU. The DTC protocol allows for up to 400 Mbps data transfers over a CAT 6 cable with readout clocks driven by the SRU. LHC systems may use the LHC clock from the TTC system. Encoded trigger signals of different types can be sent from the SRU as well as embedded slow controls commands. Triggers from the chip are sent upstrem to the SRU.

Frontend chip exchangeable: keep the common readout system and use your preferred chip on a hybrid connected via HDMI cables to an FEC Adapter card. Visit our Readout Chip knowledge base for planning of other SRS hybrids. The first hybrid uses the APV25 chip. In general, analogue chips may use a common Digitizer card for up to 8 chips per card. Digital chips may use common receiver buffer card. The hybrid is 50 mm wide and equipped with the RD51-standard socket (Panasonic AXK5SA3277YG). The central APV chip is bonded to two layers of 64 pads of the hybrid PCB. The hybrid also contains spark protection diode arrays (NUP4114UPXV6), 1 M anode resistors and optional coupling capacitors that can be replaced by 0-OHM resisters if not desired. 3.3V power is provided from the Digitizer card via the HDMI cable and regulated on the hybrid to the voltages needed by the chip. The PLL25 chip provides precise clock timing and clock refreshing, such that 2 d hybrids can be daisy chained via a Samtec FTSH-180 connector and corresponding FFSD-08 flat cable. The efficiency of the spark protection depends sensibly on a low impedance ground provided by Samtec MMCX-P-P-H-ST and MMCX-J-P-H-ST click in pairs

that have to be soldered to the chamber ground.

Cheap crate and powering system: SRS adapter and FEC cards is designed for cheap Eurocrate 6U x 220 with cards plugged in from opposite sides and interconnected via PCIe straddle mount connectors. Power is provided the the FEC card front panels via simple daisy chain cables powered by ATX power supplies.

Common readout system: for most RD51 users, the ALICE DATE system provides a robust and user-friendly readout environment including slow controls

Chip interfaces and Extensions based on 3 types of adapter cards o A cards for chips o B cards for extensions (LED pulsers, programble HV etc) o C cards for more complex adapters, digitizers etc

Extensions possible ( A or C cards)

1. GBT radhard fiber to new frontend ASICs 2. PCIe application chips (sound, image and video detectors) . 3. triggerless systems (bulk data frontend buffering)

Large systems: more than 36 FEC cards require multiple SRU's and multiple readout PC's Stack N x SRU's in 19" rack and connect N x Gigabit links to N x PC's

First SRU: 4 boards (2 already in use under the Name LCU as ALICE EMCal LED control unit) received from a Swiss mounting company on Feb.19, 2010