Sci Lecture

8/3/2019 Sci Lecture

1/32

SCI LECTURE

Dung Nguyen

Joseph GlasoferAlan Carr

ME 4447March 27, 2002


2/32

What is SCI ?

SCI is an acronym for Serial

Communication Interface


3/32

SCI Block Diagram

RxD Receive Data Line (PD0)

TxD Transmit Data Line (PD1)

Access through port D in our case


4/32

SCI Block Diagram Cont


5/32

Serial Data Communication

Type of data transmissions

Mode of data communications Data transmission rates


6/32

Type of Data Transmission

There are two types of data transmission

Parallel data transmission

Serial data transmission


7/32

Parallel Data Transmission

Parallel

Simultaneous 8-bit transmission

Requires 16 data lines

Transmitter uses 8 data lines

Receiver uses 8 data lines

Faster than serial transmission

Expensive


8/32

Serial Data Transmission

SerialTransfers 1 bit at a time

Requires two data lines

One line for the transmitter

One line for the receiver

Can be used to connect to a terminal or PC

Slower than the parallel

Low cost


9/32

Mode Of Data Communications

There are two modes of data communications

Synchronous Data Communications

Asynchronous Data Communications

They refer to the type of clocking used to

transfer the data.

h


10/32

Synchronous Data

Communications

Data words are locked into the systemclocking

Receiver and Transmitter must besynchronized because there is no two-waycommunication

Usually, one device will request some data

from other device, wait a fixed period, andthen read or transmit the data


11/32

Asynchronous Data

Communications

Data words are not locked into the system

clocking

Start and Stop bits are added into the

transmitter and receiver

If the receiver detects the stop bit (end of

data word), it will then wait for the next

data word.


12/32

Data Transmission Rate

There are two common terms used in serial datacommunication.

Those are Baud rate and the bit rate.

Do not confuse the Baud rate with the Bitrate, they are not the same.


13/32

Baud Rate Vs Bit Rate

The baud rate includes the all the data bits

The bit rate only includes the parity, and

information bits

See example


14/32

Baud Rate Vs Bit rate Example

Role of stop, start, and parity bits


15/32

Baud Rate Vs Bit rate Example Cont

parityincludingbits/sec80BTRrate-Bitbits/sec80terbit/charac8/seccharacters10110BR

10WRrate-Word

1.E09.911ms/bit9.09)worddatabits#(T

(TW)wordcharacteronetransmittoTime

)(110(BR)rate-Baud

secondcharacters

1.01

3

)(09.91

timebit1

s

ms

s

baud


16/32

Asynchronous Serial Transmission

Data is transmitted one bit at a time

Several types of bits are used to maintain

the integrity between words, including:

Start Bit

Data Bit

Stop Bit

Parity Bit


17/32

Start Bit

A bit that comes before every word

Signals the receiver that a data word is

about to be transmitted

In the HC11, this is a low logic bit (a zero)


18/32

Data Bit

The bits that make up a data word

Either a high or low logic bit (a one or a

zero)


19/32

Stop Bit

Bit that comes after every data word

Signals to the receiver that the data word is

finished

For the HC11, this is a high logic bit (a one)


20/32

Parity Bit

This is a bit before the stop bit

Maintains the integrity of the word

Counts the number of ones in the data word,

including the parity bit

Is either set to odd or even

Parity bit is used to prevent noise


21/32

Noise

Noise is interference in the line

Can cause the data word to be

misinterpreted The parity bit can prevent a single noise

signal in a data word, but would miss adouble noise signal.

HC11 combats this by taking three samplesnear the middles of each bit


22/32

SCI Registers

Port D ($1008)

Port D Data Direction Register (DDRD -

$1009)

BAUD Rate Control Register (BAUD -

$102B)


23/32

SCI Registers (cont.)

SCI Control Register 1 (SCCR1 - $102C)

SCI Control Register 2 (SCCR2 - $102D)

SCI Status Register (SCSR - $102E)

SCI Data Register (SCDR - $102F)


24/32

BAUD Rate Control Register

E-clock is scaled by the SCP0-1 and SCR0-

2 bits

Other bits are empty or for factory use only

TCLR RCKB0 SCP0SCP1 SCR2 SCR1 SCR0

0134 26 57

UU00 U0 00

$102B

RESET

BAUD


25/32

SCI Control Register

R8, T8 are ninth bit when the SCI is configured for

nine bits

M bit is to set SCI for 8 (0) or 9 (1) bits

WAKE bit is the Wake-up Method Select bit

R8 T8 0 M WAKE 0 0 0 $102CSCCR1


26/32

SCI Control Register (cont.)

TIE stands for Transmit Interrupt Enable

TCIE stands for Transmit Complete

Interrupt Enable

RIE stands for Receive Interrupt Enable

ILIE stands for Idle-Interrupt Enable

TIE TCIE RIE ILIE TE RE RWU SBK $102DSCCR2


27/32

SCI Control Register (cont.)

TE stands for Transmit Enable

RE stands for Receive Enable

RWU stands for Receiver Wake Up

SBK stands for Send Break


28/32

SCI Status Register

TDRE stands for Transmit Data Register

Empty

TC stands for Transmit Complete

RDRF stands for Receive Data Register

Full

TDRE TC RDRF IDLE OR NF FE 0SCSR $102E


29/32

SCI Status Register (cont.)

IDLE stands for Idle-Line Detect

OR stands for Overrun Error

NF is the Noise Flag

FE is the Framing Error

0 Bit is empty


30/32

SCI Data Register

Data Register used as two separate registers

Read only RDR is accessed for Receiver

mode

Write only TDR is accessed for Transmitter

Mode

R7

T7

R6

T6

R5

T5

R4

T4

R3

T3

R2

T2

R1

T1

R0

T0$102F

SCDR


31/32

Transmitting Steps

1. Set Baud rate to equal receiver

2. Set TE (SCCR2) high to enable

3. Set Wake Up mode (SCCR1)

4. TE sends idle character to wake receiver5. Receiver determines if message is intended for it

6. Load character into SCI Data Register (SCDR)

7. Character placed in shift register and shifted out

8. When TDRE (SCSR) sets back to 1, load another character (both

polling and interrupts can be used).

9. Transmission complete (TC in SCSR)

10. Idle line rests at logic 1, RWU goes to 0


32/32

Receiving Steps

1. Set Baud rate in Baud register ($102B)

2. Set bit 4 in SCCR1 ($102C) to select 8 or 9 bit characters; set bit 3 to

select wake up mode

3. Set bit 2 in SCCR2 ($102D) to enable receiver; set bit 4 to enableinterrupt on idle; set bit 5 to enable interrupt when character received

or overrun occurs.

4. Read status of receive from SCSR ($102E) Bit 5 will be set when

data is received; framing error sets bit 1; noise sets bit 2; overrun sets

bit 3; idle sets bit 45. Read data received from SCDR ($102F)

6. If 9 bit data format is used, the ninth bit of data will be located in bit

7 of SCCR1 ($102C)

Documents

Sci Lecture