Silicon Photonics: silicon nitride versus silicon-on … Silicon-on-Insulator versus silicon nitride Silicon nitride fabrication platforms Silicon nitride on-chip spectrometers Application

PHOTONICS RESEARCH GROUP 1

PHOTONICS RESEARCH GROUP

Silicon Photonics: silicon nitride versus silicon-on-insulator

Roel Baets, Ananth Z. Subramanian, Stéphane Clemmen, Bart Kuyken, Eva Ryckeboer, Peter Bienstman, Nicolas Le Thomas, Günther Roelkens, Dries Van Thourhout, Philippe Helin*, Simone Severi*, Xavier Rottenberg*

Ghent University – imec* imec


What is silicon photonics?

The implementation of high density photonic integrated circuits by means of CMOS process technology in a CMOS fab

Enabling complex optical functionality on a compact chipat low cost


CMOS technology economics

CMOS fab huge cost G$

Fabrication run (25 wafers) large cost 100K$ - M$

Fabrication run (MPW-mode) moderate cost 10-100K$/user

Chip (large volume) very low cost 1-100$

Chip (moderate volume) very low cost 1-100$

Chip (low volume) low cost 5-500$Assuming the process flow is based on the standard tool set of the CMOS fab.

And assuming the fab is fully loaded.


Outline

Silicon-on-Insulator versus silicon nitride

Silicon nitride fabrication platforms

Silicon nitride on-chip spectrometers

Application example


Why silicon-on-insulator photonics

High index contrast very compact PICs

CMOS technology nm-precision, high yield, existing fabs, low cost in volume

High performance passive devices

High bitrate Ge photodetectors

High bitrate modulators

Wafer-level automated testing

Hierarchical set of design tools

Light source integration (hybrid/monolithic?)

Integration with electronics (hybrid/monolithic?)

n1(=3.5)>n2(=1.45)


Limitations of silicon-on-insulator PICs

Spectral transparency: shortest

Spectral transparency: longest

Optical power limitation (1.3/1.5µm)

Distributed backscatter

Optical pathlength error

T-sensitivity of pathlength

Layer stack flexibility

Integration with CMOS electronics

1.1 µm

4 µm

10’s of mW

%’s per cm

0.1% - level

0.01%/K

Limited

Challenging

Silicon bandgap

SiO2 absorption

Two-photon absorption

nm-level sidewall roughness + HIC

nm-level width inaccuracy + HIC

Thermo-optic coeff. silicon

SOI-wafers made by bonding

Technical or economic mismatch


High index contrast of SOI: distributed scattering


Optical power limitation

Jalali et al, OPN 2009


Crosstalk in SOI based AWG’s

S. Pathak et al, IEEE Photonics Journal 2014

Typical crosstalk values in SOI-based AWG: 20-25 dB

This example: 27 dB (for 8-channel AWG)


Silicon photonics: dealing with the limitations

Si

SiO2

[2um box]

Si3N4

SiO2

without leaving the CMOS fab

Silicon: n=3.5Silicon oxide: n=1.45Very high index contrast

Silicon nitride: n=2Silicon oxide: n=1.45Moderately high index contrast


Limitations of silicon-on-insulator PICs

Spectral transparency: shortest

Spectral transparency: longest

Optical power limitation (1.3/1.5µm)

Distributed backscatter

Optical pathlength error

T-sensitivity of pathlength


Integration with CMOS electronics

1.1 µm

4 µm

10’s of mW

%’s per cm

0.1% - level

0.01%/K

Limited

Challenging

Silicon bandgap

SiO2 absorption

Two-photon absorption

nm-level sidewall roughness + HIC

nm-level width inaccuracy + HIC

Thermo-optic coeff. silicon

SOI-wafers made by bonding

Technical or economic mismatch

0.4 µm

x10

÷10

÷10

÷10

excellent

doable

SiN PICs



Metal or DBR reflector underneath silicon nitride

Quantum dot integration within silicon nitride layer

Photonic ICs with two photonic layers

13

Focusing Grating Coupler with AlCu/TiN bottom reflector

Unclad section to be filled with sensing solution

Light coupling section Distribution

Network

- Grating Coupler with metal back-reflector for in-coupling

- Waveguides with optimized evanescent field overlap

- Power splitters (MMI) for light distribution network

Si

SiO2

SiO2SiO2

SiN

14

Focusing Grating Coupler with AlCu/TiN bottom reflector

Two different versions:

- Taper Length = 50 µm free space section

- Taper Length = 100 µm Partial confinement

Interconnection

waveguide

Width = 0.7 µm

Ta

pe

r le

ng

th

Grating Width:

Design to match

the input

Gaussian beam

Reflector Width Taper

Length

Coupling

efficiency

Decay

length

Transversal

FWHM

Longitudinal FWHM

(optimal value)

Focusing GC AlCu/TiN 32 µm 100 µm 55.7 % 11.6 µm 13 µm 9.3 µm

Focusing GC AlCu/TiN 28 µm 100 µm 59.1 % 11.6 µm 11 µm 9.3 µm


SiN waveguides with embedded colloidal quantum dots

SiO2 BOX (a)

HT LF SiN

100nm PECVD SiN on 3μm SiO2

then spin coating 70nm

CdSe/CdS core-shell CQD

CQD

SiO2 BOX (b)

HT LF SiN

100nm PECVD SiN is deposited

on the top of CQD layer

CQDLT MF SiN

SiO2 BOX (c)

HT LF SiN

Waveguide pattern is defined by

lithography and RIE etching

CQD

LT MF SiN


0

2

4

6

0

3

6

600 620 640 660 680

0

1

2

102

1.80Pth

104

PL

in

ten

sity

(a.

u.)

1.16Pth

103

Wavelength (nm)

0.89Pth

10 20 30 40 50 60

0

1

2

3

4

Pth=26.8Jcm

-2

104

Inte

nsi

ty (

a.u.)

Pump fluence (Jcm-2)

Low lasing threshold ofPth26.8 μJ·cm-2

W. Xie et al, Ghent University – imec, Unpublished

gap -+ 0

offset

On-chip SiN-QD disk laser

CdSe/CdS core/shell QDs, ~3.6nm core and 9.1nm total size


Limitations of silicon nitride PICs

Limitation

Material properties process-dependent

No low power TO phase modulator

No high speed phase modulator

No integrated detector for 1.3/1.5µm

Solution/Mitigation

Tight process control required

Thermal isolation; overlay materials

EO overlay materials; co-integration with SOI

Co-integration with SOI


Outline




Application example


PECVD vs LPCVD nitride

PECVD (T<400 C)

Integration on CMOS or CMOS imagers possible

Low strain

Absorption feature in 1500nm band

LPCVD (T>800 C)

Stoechiometric Si3N4

Highly strained (hence limits on thickness < 400nm)

Good etching selectivity vs SiO2

1.8

1.85

1.9

1.95

2

2.05

2.1

2.15

2.2

400 600 800 1000 1200 1400 1600

n

Wavelength (nm)

PECVD LPCVD

3/24/2016PIX4life – H2020-ICT-2015 – contract 688519

4 pre-defined use casesdriven by end users

Complete eco-system withdual foundry access

More information: www.pix4life.eu

H2020 Pilot line project PIX4life

Open Access to SiN PIC platforms: TriPleX and BioPIX

http://www.pix4life.eu/

TriPleX platform

• Adjustable polarization properties (sensors telecom)

• Low optical attenuation

• Small bend radii (small footprint!)

• Design by geometry

• Silicon and glass compatible

• Spot size converters for low loss fiber chip coupling

21TriPleX: a versatile dielectric photonic platform, Adv. Opt. Techn. 2015; 4(2): 189–207

Easy access to waveguide technology

• Technology accessible via Multi Project Wafer runs

–Photonic Design Kit in PhoeniX software

–At fixed tape out deadline design submission

–PDK for 1550 nm. Expanding into visible PIX4Life H2020

22

Light coupling to a chip and manipulation on this chip

Light output to a sensor set (photodiodes) or to underlying CMOS sensor

Very good overall system compactness

Applications: Bio-sensing, spectroscopy, NDT, telecom, ....

BioPIX capabilities baseline as demonstrated at IMEC

Si or CMOS substrate (e.g., 0.18 CMOS TSMC)

SiOSiN

Mirror

Core

Cladding

Light coupling to a chip and manipulation on this chip

Light output to a sensor set (photodiodes) or to underlying CMOS sensor

Very good overall system compactness

Applications: Bio-sensing, spectroscopy, NDT, telecom, ....

BioPIX capabilities baseline as demonstrated at IMEC

Si or CMOS substrate (e.g., 0.18 CMOS TSMC)

SiOSiN

Mirror

Core

Cladding

BioPIX components demonstrated and used by imec in bio cases

Waveguides

Basic spectrometers

Fiber-WG

Power splitters

Ring Resonators Focusing

Multi-mode interferometer

IO-coupler

holographic

Low loss

High Q

Evanescent coupler

PLATFORMISATION

3/24/2016PIX4life – H2020-ICT-2015 – contract 688519

2016 2017 2018 2019


Outline




Arrayed waveguide gratings

Planar concave grating demultiplexers

Fourier transform spectrometers

Application example


Daoxin Dai,et al, Opt. Express (2011)https://www.osapublishing.org/oe/abstract.cfm?uri=oe-

19-15-14130

Arrayed Waveguide Grating

https://www.osapublishing.org/oe/abstract.cfm?uri=oe-19-15-14130


Ultra-low-loss SiN waveguides

Loss: 0.70±0.02 dB/m

Bend radius: 10 mm.

D. Dai et al, Light: Science and Applications 2012

3.18m spiral


Compact AWG

Si3N4 Arrayed Waveguide Grating (AWG)

• 20 channels, 1 nm channel spacing

• 2 dB insertion loss

• 0.34 mm2


Compact AWG

D. Martens et al, PTL 2015

Cumulative spectral crosstalk


50 μm

shallow-etch apertures 500 nm wide

photonic wires

deeply etched teeth

free propagation region

Planar concave grating (PCG)

Rowland circle


PCG design for insertion loss reduction

Shallow apertures DBR type grating facets

0

0.2

0.4

0.6

0.8

1

1.2

1.4 1.45 1.5 1.55 1.6 1.65 1.7 1.75 1.8 1.85

REF

LEC

TIO

N

WAVELENGTH [UM]

DBR RESPONSE


Side lobe level

Phase errors: dependency on PCG size


On-chip stationary Fourier transform spectrometers

Spatial heterodyne spectrometer (SHS):

Limitation: size increases rapidly with resolution

Stationary Wave Integrated FTS (SWIFTs)

Operational bandwidth is limited by subsampling

Period of the interferogram = 𝜆

2𝑛𝑒𝑓𝑓<< pixel pitch of

commercially available detector array

Number of MZI channels N =2∆𝜆

𝛿𝜆

(Florjanczyk et al. 2007)

(Coarer et al. 2007)


New stationary Fourier Transform Spectrometer

Co-propagative stationary integrated FTS

Different waveguide widths

Different phase velocity

Beating pattern in between both

waveguides with period 𝜆

Δ𝑛𝑒𝑓𝑓

Diffracted by grating onto detector array

Subsampling is avoided leading to broadband operation

Resolution is 𝟏.𝟐𝟎𝟕𝝀𝟐

𝜟𝒏𝒆𝒇𝒇𝑳


Implementation at 850nm over bandwidth of 100nm

Rib waveguide

150nm 300nm

W With W=300nm and 800nm, 𝑛𝑒𝑓𝑓 =1.644 and 1.700 resp.

∆𝑛𝑒𝑓𝑓=0.056

Period of interferogram (=800nm)=14.28𝜇𝑚

Required detector array with pixel pitch < 7.14𝜇𝑚

Assuming propagation length of 1cm, resolution= 1.36nm

Size of 0.1𝑚𝑚2 (width<10𝜇𝑚, length≈1 c𝑚)


Outline




Application example


Vibrational spectroscopy

Infrared absorption spectroscopyVery sensitive

“Poor” sources and detectorsLess compatible with biology

Raman spectroscopyVery insensitive (but there are tricks)Mainstream sources and detectors

More compatible with biology


Spectroscopy-on-chip: what

On-chip light source

On-chip detection

waveguide

Fluid or gas

Light in

Light out


Raman spectrum of IPA on silicon-nitride waveguide

Spectrum from literature

A. Dhakal et al, Opt. Lett. (2014)A. Dhakal et al, Optics Express (2015)

Efficiency of collection 10-100x better than in Raman microscope

waveguide

Fluid

Light in

Light out

IsoPropylAlcohol


Raman spectroscopy of Rhodamine monolayers

Si3N4 waveguides were silanized, reacted with amine-reactive NHS-Rhodamine and rinsed to get a monolayer of Rhodamine on the waveguide surface.

A. Dhakal, et al., to be published

>104 more collection efficiency than with Raman microscope.

300 um

P=785 nmTop view of the functionalized chip

500um

Wg length = 1 cm

Rhodamine monolayer

800 nm

150 nm

cross-sectional view

Ppump5mWTint=10s


Conclusion

Silicon nitride PICs:

• a new member of the silicon photonics family manufacturable in CMOS fabs

• complementary assets to SOI PICs

• open access, standardization and MPW capability being built up

• broad application range over wide wavelength range

Documents

Silicon Photonics: silicon nitride versus silicon-on … Silicon-on-Insulator versus silicon nitride Silicon nitride fabrication platforms Silicon nitride on-chip spectrometers Application