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WISDOM WP6

• Manufacturability, Scalability and Functionality Study

• Start M0, End M35• WP leader is CIP• Objectives

– Assessment of manufactureability of the sub-systems used in the optical firewall

– Establishing the optimum balance between optical and electronic processing for the firewall function

– Platform scaleability & functionality

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WISDOM WP6• Manufacturability

– Self-correcting daughterboard design now implemented

– Discussions with flip chip bonding tool manufacturer about wafer scale bonding tool development

• Scalability– Higher speed SOA based devices

• Bandgap shifted

• Functionality

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Manufactureability• Self correcting daughterboard design

– Errors in size of mechanical front and side stops now self-correcting

– Submount alignment against inside edge of aperture in motherboard

– Higher level of process tolerance

SOA array SOA array SOA array

SOA to DB alignment

DB to MB alignment Effect of over / undersize

of front / side stops on alignment

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Functionality

• ‘Substrate free’ thin film filter development– Strain compensated

filter design– Substrate removal– ‘substrate free’ design

inserted into slot in waveguides (30 micron or so thick)

– Filter wavelength optimisation required as spectral shift post filter removal

silicon

silica

silica

TFF

As deposited

silica

silica

Substrate removed

silicon

silica

silica

TFF

As deposited

silica

silica

Substrate removed

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Next 6 months

• Continue to gather data on existing electronic systems– Cost, power consumption, capacity

• Develop cost model for integrated pattern matching circuit – Indicative cost of control electronics?