Prepared By: Kind Kishor Tribhuvan University

Topics to be Included

1. Description of basic computer. 2. Common bus system. 3. Instruction formats and their execution. 4. Instruction cycle. 5. Hardwired control unit. 6. IO configuration and IO handling.

Basic Concepts

Computer Architecture: It is those attributes of a system that have a direct impact on the

logical execution of a program. It is concerned with the structure and behavior of the computer as

seen by the user. It includes: The instruction set. The number of bits used to represent various data types. I/O mechanisms. Memory addressing techniques.

Basic Concepts

Computer Organization: It refers to the operational units and their interconnections that

realize the architectural specifications. It is concerned with the way the hardware components operate

and the way they are connected together to form the computer system.

Examples are things that are transparent to the programmer: control signals. interfaces between computer and peripherals. the memory technology being used.

Description of Basic Computer

The central processing unit(CPU) for manipulating the data, registers for storing data and instructions, and control circuits for fetching and executing instructions. The memory of a computer contains storage for instructions and data. The input-output processor contains electronic circuits for communicating and controlling the transfer of information between the computer and user.

Description of Basic Computer

Memory Hierarchy

Instruction Codes

Program: A program is a set of instructions that specify the operations,

operands and the sequence by which processing has to occur.

Computer Instruction: A computer instruction is a binary code that specifies a

sequence of microoperations for the computer.

Instruction Code: An instruction code is a group of bits that instruct the

computer to perform a specific operation.

Instruction Codes Operation Code:

The operation code of an instruction is a group of bits that define such operations as add, subtract, multiply, shift, and complement.

Micro-operation: Micro-operation is the elementry operation performed with the data stored in the registers.

Types of Micro-Operation: a)Register transfer. b)Arithmetic transfer. c)Logic. d)Shift.

Instruction Format An instruction format or instruction code is a group of bits used to perform a particular operation on the data stored in computer. Processor fetches an instruction from memory and decodes the bits to execute the instruction. Instruction code is divided into two parts namely operation code and address of data. Operation code consisting group of bits to define an operation such as add, subtract, multiply etc.

Instruction Format In an instruction format:

First 12 bits (0-11) specify an address. Next 3 bits specify operation code (opcode), or type of operation. Left most bit specify the addressing mode I

I = 0 for direct address I = 1 for indirect address

Addressing Modes

Types of Instructions On the basis of opcode and addressing mode, the basic computer has three 16-bit instruction code formats:

1. Memory Reference Instructions. 2. Register Reference Instructions. 3. Input/Output Instructions.

Memory Reference Instructions

First 12 bits (0-11) specify an address. 3 bits of opcode are used to specify the types of instruction. Value of opcode ranges from 000 to 110. If I=0, it is direct addressing mode and if I=1, it is indirect addressing mode.

Register Reference Instructions

First 12 bits (0-11) specify the register operation. The next three bits equals to 111 specify opcode. The last mode bit of the instruction is 0 for register reference instruction. Therefore, left most 4 bits are always 0111 which is equal to hexadecimal 7.

Input/Output Instructions

First 12 bits (0-11) specify the I/O operation. The next three bits equals to 111 specify opcode. The last mode bit of the instruction is 1. Therefore, left most 4 bits are always 1111 which is equal to hexadecimal F.

Input/Output and Interrupt

Input/Output and Interrupt

The terminal sends and receives serial information. The serial info. from the keyboard is shifted into INPR. The serial info. for the printer is stored in the OUTR. INPR and OUTR communicate with the terminal serially and with

the AC in parallel. The flags are needed to synchronize the timing difference between

I/O device and the computer

Registers in Basic Computer

Common Bus System • A wire or a collection of wires that carry some multi-bit

information is known as bus. Main purpose of bus is to transfer information form one system to another.

• It is also known as communication path way which connects all the internal components of the computer to the CPU, main memory and I/O devices.

Common Bus System

• Three functional groups of communication lines:

A. Data lines (data bus) - move data between system modules. Width is a key factor in determining overall system performance.

B. Address lines - designate source or destination of data on the data bus. Width determines the maximum possible memory capacity of the system.

C. Control lines - control access to and use of the data and address lines.

C O M M O N

B U S

S Y S T E M

Control Unit CPU is divided into Arithmetic Logic Unit (ALU) and Control Unit (CU). The function of control unit is to generate relevant timing and control signals to all operations in the computer. It controls the flow of data between the processor and memory and peripherals. The control unit directs the entire computer system to carry out stored program instructions. The control unit co-ordinates the activities of the other two units(ALU and main memory) as well as all peripherals and auxiliary storage devices linked to the computer.

Control Unit Control units are implemented using one of the two organizations: i. Hardwired Control Unit: In this, the control logic is

implemented with gates, flip flops, decoders and other digital circuits.

ii. Micro-programmed Control Unit: A control memory on the processor contains microprograms that activate the necessary control signals.

Control Unit of Basic Computer (Hardwired)

Fig:-Control unit of basic computer

Hardwired Control Unit Control unit consist of: o Instruction Register o Number of Control Logic Gates, o Two Decoders o 4-bit Sequence Counter

An instruction read from memory is placed in the instruction register (IR). The instruction register is divided into three parts: the I bit, operation code, and address part. First 12-bits (0-11) to specify an address, next 3-bits specify the operation code (opcode) field of the instruction and last left most bit specify the addressing mode I.

I = 0 for direct address I = 1 for indirect address

Hardwired Control Unit First 12-bits (0-11) are applied to the control logic gates. The operation code bits (12 – 14) are decoded with a 3 x 8 decoder. The eight outputs ( D0 through D7) from a decoder goes to the control logic gates to perform specific operation. Last bit 15 is transferred to a I flip-flop designated by symbol I. The 4-bit sequence counter SC can count in binary from 0 through 15. The counter output is decoded into 16 timing pulses T0 through T15. The sequence counter can be incremented by INR input or clear by CLR input synchronously.

Instruction Cycle

Basic instruction cycle consists of the following phases: a. Fetch and instruction from memory. b. Decode the instruction. c. Read the effective address from the memory, if the instruction has an

indirect address. d. Execute the instruction.

Processing required for a single instruction is called an instruction cycle.

Instruction Cycle

The instruction cycle can be broken down into two major phases: Fetch - CPU reads an instruction from a location in memory

Program counter (PC) register keeps track of which instruction executes next.

Normally, CPU increments PC after each fetch. Fetched instruction is loaded into the instruction register (IR).

Execute - CPU executes the instruction The instruction is held in IR is decoded. Then, the instruction is executed. May utilize previously changed state of CPU and (indirectly) other devices.

Instruction Cycle

Fig:- register transfers for the fetch phase

Interrupt Cycle

Fig:- flowchart for interrupt cycle

Interrupt Cycle

The interrupt cycle is a HW implementation of a branch and save return address operation. At the beginning of the next instruction cycle, the instruction that is read from memory is in address 1. At memory address 1, the programmer must store a branch instruction that sends the control to an interrupt service routine. The instruction that returns the control to the original program is "indirect BUN 0“.

References 1. M. Morris Mano, “Computer System Architecture”, third

edition. 2. William Stallings, “Computer Organization and Architecture” 3. http://www.edunep.com, 4. http://www.eazynotes.com/notes/computer-system-

architecture/slides/registers-and-common-bus.pdf 5. http://www.eazynotes.com/notes/computer-system-

architecture/slides/timing-and-control-unit-handouts.pdf 6. http://www.dauniv.ac.in/downloads/CArch_PPTs/CompArchC

h05L13HardwiredControl.pdf 7. http://www.slideshare.net/anujmodi555/computer-instructions