/ Slide 1Version 1.0Maarten Hoeks

System integration of Electronics

Ernst Vrolijks

June 2010

/ Slide 2

Agenda

Introduction Semiconductor lithography The challenge for Electronic Development (EDEV)

EDEV technology What do we do

EDEV way of working How do we do it? Summary

/ Slide 3

Moore’s law

In 1965 Gordon Moore predicted that chip capacity would double every 18-24 months. G. Moore, ”Cramming more components onto integrated circuits”, Electronics, Vol. 38, Nb. 8 (1965)

Itanium 2 (9 MB core)

Itanium 2

Pentium 4

Pentium III

Pentium IIPentium

486

386286

8086

808080084004

1.E+02

1.E+03

1.E+04

1.E+05

1.E+06

1.E+07

1.E+08

1.E+09

1960 1970 1980 1990 2000 2010

year

tran

sist

ors

Over 40 years his prediction has been true.

/ Slide 4

Why Shrinkage

Shrinking minimum feature size offers simultaneous:

smaller chip size => cost reduction

faster transistors => performance enhancement

lower dissipation => performance enhancement

Simultaneous increasing of performance while decreasing of price has fuelled IC industry over last 30 years.

In 1978 a commercial flight between New York and Paris cost ~ 900$ and took seven hours. If Moore’s law would be applied to the aircraft industry this flight would now cost one cent and take less than one second.

/ Slide 5

Shrink drives cost per function and market growth

Source: Gartner Dataquest, iSuppli, ASML

2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010

NAND cost, $ / GB

NAND size, GB

0.01

0.10

1.00

10.0

100

1,000

10,000

Projected cross-over

HDD - NAND, GB

60-80 GB2-16 GB 80-150 GB1 GB 4 GB 8 GB 10-20 GB

/ Slide 6

ASML technology roadmap: photons forever.Required k1 as function of resolution, wavelength, and NA

65 45 32 22 16 11

year 2005 2007 2009 2011 2013 2015l [nm] NA

0.93 0.31

1.20 0.40 0.28

193 1.35 0.31 0.22 0.15

1.55 0.26 0.18

13.5 0.25 0.59 0.41

0.35 0.57 0.41

0.45 0.53 0.37

half pitch

Enable shrink by combination of• Wavelength reduction• NA increase• k1 reduction

/ Slide 7

State-of-art water based immersion l=193nm, NA=1.20

65 45 32 22 16 11

year 2005 2007 2009 2011 2013 2015l [nm] NA

0.93 0.31

1.20 0.40 0.28

193 1.35 0.31 0.22 0.15

1.55 0.26 0.18

13.5 0.25 0.59 0.41

0.35 0.57 0.41

0.45 0.53 0.37

half pitch

45 nm L&S

/ Slide 8

Three options for 32 nm half-pitch

65 45 32 22 16 11

year 2005 2007 2009 2011 2013 2015l [nm] NA

0.93 0.31

1.20 0.40 0.28

193 1.35 0.31 0.22 0.15

1.55 0.26 0.18

13.5 0.25 0.59 0.41

0.35 0.57 0.41

0.45 0.53 0.37

half pitch

Double patterning water immersion

EUV

sngl patterningNon-water

Implication: Complexity increases

/ Slide 9

The EDEV Challenge ...

EDEV's challenge =

Fast & Predictable integration

With increasing system complexity

Multiple parallel developments

/ Slide 10

What do we do?Technology

/ Slide 11

Basic Principle

Reticle

Reticle stage

WaferWafer stage

Projection Lens

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The ASML Product

Wafer Stage(Expose)

ProjectionOptics

Wafer Stage (Measure)

IlluminationOptics

ReticleHandler

WaferHandler

UserInterface

ReticleStage

MeasurementSystems

/ Slide 13

Deliverables of the Electronic Development (I)

Local electronics

Electronic functions in cabinets

Remote Electronics Cabinets

/ Slide 14

Business Drivers

Source: ICE

Business Drivers

Overlay

Productivity

Time To Market

Critical

Dimension

/ Slide 15

Business Drivers

Business Drivers

Overlay

Productivity

Time To Market

Organization

Process

Predictable&fast

integration

Critical

Dimension

and Electronics Integration

/ Slide 16

How do we do it ?Organization/Process

/ Slide 17

PGP:EDEV Participation

System :

Subsystem:

Module :

Specification Design Test & Int.

Specification Design Test & Int.

Specification Design Test

E-Architect :

E-Designer :

E-Integrator :

PRS, SPS SDS TPS, TAR, ITP

TPS, TAR, ITPEDS, HSIEPS

TPS, TAREDSEPS

V-Model

FeasibilitySystem

DefinitionSubsystem Definiton

Integration ValidationRealization

/ Slide 18

Subsystems Range: upto 50?

Machine

12 NC’s Range: 50.000 – 100.000

System Breakdown, coping with complexity

Issues:•Interfaces not properly defined•Long term ownership not well defined• Commonality not properly managed

/ Slide 19

AT:12X0 bodySplit the machine in building blocks

BB

BB

BB

BB

/ Slide 20

Arrange blocks in logical, functional clustersF

C W

afer

Han

dlin

g

FC

Illu

min

atio

n

/ Slide 21

Functional Cluster ownership

Functional Cluster Owner: Knows what is in FC now Controls what is currently

happening in FC Plans what will happen in

FC in the futureF

C I

llum

inat

ion

/ Slide 22

Subsystems Range: upto 50?Building blocks

Range: 100 - 1000

Machine

Functional Clusters Range: 20-40

12 NC’s Range: 50.000 – 100.000

System Breakdown based on FC’s

/ Slide 23

From platforms to products

Product I.A

Product I.B

Platform I

+

=

=

SelectableBuilding Blocks

Product II.A

Product II.B

Platform II Platform III

+

=

=

Over time building blocks evolve leading to ever increasing platform capabilities.

Products can be realized by changing only selected building blocks within a given platform

/ Slide 24

PGP:EDEV Participation

System :

Subsystem:

Module :

Specification Design Test & Int.

Specification Design Test & Int.

Specification Design Test

E-Architect :

E-Designer :

E-Integrator :

PRS, SPS SDS TPS, TAR, ITP

TPS, TAR, ITPEDS, HSIEPS

TPS, TAREDSEPS

FeasibilitySystem

DefinitionSubsystem Definiton

Integration ValidationRealization

classic V-approach squeezes component level

development

Early start of development at

all levels to meet time to

market Early delivery of 1st unit for

system integration,

parallel maturing for

volume deliveries

/ Slide 25

Summary

Semiconductor industry is characterized by Moore’s law. Lithography is key enabler. Electronic Development plays a key role in realizing ever

increasing system performance. Processes and organization of Electronic Development are

“designed” to support the development of complex (multidisciplinary) products.

It more complicated to have fast & predictable integration

Miscommunication =

# Problems during Integration

/ Slide 26

There is much Moore ...