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IBM’S DEEP BLUE CHESS GRANDMASTER CHIPS DESIGN PHILOSOPHY, GENERAL ARCHITECTURE, AND PERFORMANCE OF THE CHESS CHIPS

Ibm's deep blue chess grandmaster chips

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This includes the architecture, design philosophy and the internal structure of the IBM chess grandmaster chips, Intelligent chess machine which was capable of defeating the world chess champion Garry Kasparov in 1997

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Page 1: Ibm's deep blue chess grandmaster chips

IBM’S DEEP BLUE

CHESS

GRANDMASTER CHIPS

DESIGN PHILOSOPHY, GENERAL ARCHITECTURE,

AND PERFORMANCE OF THE CHESS CHIPS

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Ujitha Iroshan

Nadeeshaan Gunasinghe

Dulanga Sashika

Presenters

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Introduction

History

Origin of IBM’s Chess Grandmaster

Task and Design Philosophy

Journey

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General Architecture

Common chess machine Overview

System Configuration

Chip Overview

Move Generator

Evaluation Function

Smart Move stack

Search Control

Performance

Journey Cont..

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IBM Deep Blue World chess champion

Garry Kasparov in 1997

What is Deep Blue ?

Vs

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Creating the first world champion class chess

computer is one of the oldest challenge in

computer science.

Blitz chip won against grand master in

shortened time chess game in 1977

Cray Blitz computer is defeated by

International master David Levy in shortened

time chess game in 1984

History

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PC programmed in Blitz won against 2nd rank chess

player in 1988 under faster time controls.

Deep blue early version(Deep thought) was defeated

by the Champion Garry Kasparov in 1996 under

regular time control.

Finally in 1997 Deep Blue won against the World

Champion Garry Kasparov under regular time control

History Ctd...

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Winning a match against the human World

chess champion under regulation time control

The game had to play out no faster than three

minutes per move

Task description of Deep Blue

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Regular time control Standard chess tournament time control

Faster time control (Shortened time) Limited time for entire match and for the each

moves

Task Description Ctd...

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Integrate level

Integrate the maximally possible amount of

software-modifiable chess knowledge on to the

chess chip.

Computational Speed

Assign weights to positional features

Design Philosophy

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Common chess machine Overview

Follows the design outlined by Claud Shanon in

1949

Chess 4.5 is the earliest and the first

successful chess machine design

Today Chess Machines in one way or another

way, are the grandchildren of this Chess 4.5

General Architecture

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Choosing the next move

Shannon’s basic design uses a min-max tree

The evaluation function is designed from the

computer player’s viewpoint

Common chess machine Overview Ctd...

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Assign numerical values for evaluation

function ■ +1- Computer Player Wins

■ -1- Computer Player Loses

■ 0- Drawn position

Choosing the next move Ctd..

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Can regular Min-Max search be used in a

Chess Game?

Common chess machine Overview cont..

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New developments in Chess 4.5

A hardware move generator

Quiescence search (Capture Search) and

Alpha beta Pruning algorithm

Common chess machine Overview cont..

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1997 version of DB included 480 chess chips

each chess chip could search 2 to 2.5 million

chess positions/s

More software work could increase the speed.

But applied software work in chess knowledge

area

System Configuration

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Search goes parallelly in two levels

One over IBM RS/6000 SP switching network

The other over Micro Channel bus inside a

workstation node

Partitioning the search provided a great deal

of design flexibility and increased the search

speed

SW handled a 1% of the search, but the ⅔

search depth was reduced by SW

System Configuration

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Block diagram of the Chess Chip

Chip Overview

The chip’s cycle time

lies between 40 and

50 nanoseconds in a

0.6-micron, three-

metal

layer, 5-V CMOS

process. The

average number

of cycles per position

searched is about

10;

power dissipation is

about one watt

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Each chess Chip works as a chess machine

Why Chess chips rather than software

algorithm for the competing?

Provided design possibilities unacceptable by SW

Time-scaling factor dropped from instruction cycle

time to gate delay

Only thing required was reexamine of the time

complexity of the competing algorithm

Chip Overview

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Inside of a chess chip

Chess Chip

Smart Move stack

Evaluation Function

Search

Move generator

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What is move generator?

Used to decide the next best move of a

chess piece

An 8x8 array of combinational logic

Move generation is controlled by a

hardwired finite state machine

Move Generator

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Why Deep Blue’s move generator special?

Generate check and check evasion Moves

Generates attacking moves

Hardware pruning of irrelevant chess moves

Move Generator Ctd..

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A chip cell

The combinational logic array is a silicon chess

board

Each has four major components

Find victim transmitter

Find Attacker Transmitter

Receiver

Distributed arbiter

Four-bit piece register

Move Generator Ctd..

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Find Victim and Find Attacker

Move Generator Ctd..

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As described earlier, move generator computes

all the moves implicitly for a single move.

What if SW is used for this task?...

Move Generator Ctd..

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Generating moves from a partially

generated position

Need to mask the already searched moves

Belle design used 2-bit disable-stack for

masking

What is used in Deep Blue?

Move Generator Ctd..

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Other moves generated by Move generator

checking moves

check-evasion moves

Detect Hung Pieces

Measures the forcefulness of checks

Move Generator Ctd..

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Evaluation Function

What is Evaluation Function?

Evaluation function is a function used by game-

playing programs to estimate the value or

goodness of a position in the minimax and related

algorithms.

Evaluation Function of “Deep Blue”

Contain about 66,000 gates not including RAMs

and ROMs.

All sub blocks of the evaluation function divided

into two sections

• Lower sub blocks provide fast evaluation

• Upper sub blocks provide slow evaluation

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Fast Evaluation

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The piece placement table

computes a position’s incremental

evaluation.

Uses three RAMs.

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The Game Phase Control

Contains a piece count register

Maintain an XORed piece-location register

The piece-count register addresses game phase

control RAMs

The game phase control RAMs produce several

control values

simply a bonus or penalty to be added to the

evaluation based on the material left on the

board.

The most important game phase control value is

the king safety relevance

tells the chess chip how to adjust the penalty for

bad pawn structure and the bonus for passed

pawns

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The king-and-pawn array

mainly detects the “pawn can run” condition

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The Endgame logic and ROMs

Mainly recognizes unusual endgame conditions

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This is the single most complicated element

on the chip, occupying close to half of the

chip core.

Slow evaluation has a three-stage pipeline

8 X 1 systolic array

40-plus synchronous RAMs

adder tree

Computes values for chess concepts such as,

square control, pins, x-rays, king safety, pawn

structure, passed pawns, ray control, outposts,

pawn majority, rook on the 7th, blockade,

restraint and etc.

Slow evaluation

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This doesn’t exist in the chess chip’s older

release.

Repetition detector

Contains a 32-entry circular buffer of the last 32

plies of moves.

Use hardware content addressable memory

algorithm

Does this detects just simple repetition?

Time complexity is O(n)

Smart move stack

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implements a minimum-window alpha-beta search algorithm

This search can only tell us whether the position searched is better or worse than a single test value.

Efficiency- wise, minimum-window-based search

seems about the same as the regular alpha-beta search

Search Control

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In early 1997, used a single chip running at

70% clock speed

A hardware bug reduced the chip to 7% to

14% of its regular speed

Deep Blue Jr. against the commercial chess

programs played 40 games and chess chip

score 95% against PC program

Performance

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The 1997 version of Deep Blue only played six

games

Deep blue won the match by the score of 3.5 to

2.5

Kasparov is rated around 2815, which placed

Deep Blue’s performance at about 2875

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Thank You

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Questions?