1 Team M1 Enigma Machine 3rd May, 2006 Adithya Attawar (M11) Shilpi Chakrabarti (M12) Mike Sokolsky...

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Team M1Enigma Machine

3rd May, 2006

Team M1Enigma Machine

3rd May, 2006

Adithya Attawar (M11)Shilpi Chakrabarti (M12)

Mike Sokolsky (M14)

Design Manager: Prateek Goenka

Adithya Attawar (M11)Shilpi Chakrabarti (M12)

Mike Sokolsky (M14)

Design Manager: Prateek Goenka

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Agenda for Final Presentation

Agenda for Final Presentation

• Title Slide• Project Description • Marketing• Behavioral/Algorithmic Description• Design Process• Floorplan• Issues Encountered• Layout• Verification• Specifications• Conclusions

• Title Slide• Project Description • Marketing• Behavioral/Algorithmic Description• Design Process• Floorplan• Issues Encountered• Layout• Verification• Specifications• Conclusions

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Project DescriptionProject Description

• Implement on chip the functionality of a World War II Enigma cipher machine.

• A sophisticated variation on a simple substitution code, it involves a string of 9 letter pair substitutions, some of which change for each new character sent through it.

• Must re-create the effect of both the electrical and mechanical aspects of the device on chip.

• User must be able to change the configuration.

• Each character represented as a 5-bit number.

• Implement on chip the functionality of a World War II Enigma cipher machine.

• A sophisticated variation on a simple substitution code, it involves a string of 9 letter pair substitutions, some of which change for each new character sent through it.

• Must re-create the effect of both the electrical and mechanical aspects of the device on chip.

• User must be able to change the configuration.

• Each character represented as a 5-bit number.

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MarketingMarketing

1) Historical significance

- Complex electromechanical device used by Germans

- Was the most secure communication method during WWII

1) Historical significance

- Complex electromechanical device used by Germans

- Was the most secure communication method during WWII

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Marketing Cont.Marketing Cont.

2) Fun Toy!• Target Audience: 12-18 year olds• Innovative: Kids can send secret

messages to each other behind their parent’s back!

2) Fun Toy!• Target Audience: 12-18 year olds• Innovative: Kids can send secret

messages to each other behind their parent’s back!

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Functional DescriptionFunctional Description

1st step: Plug Board2nd step: Rotors3rd step: Reflector4th step: Rotors5th step: Plug Board

1st step: Plug Board2nd step: Rotors3rd step: Reflector4th step: Rotors5th step: Plug Board

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Enigma Operation: Plug boardEnigma Operation: Plug board• Manually wired and

changed daily• Daily settings specified in

codebooks given to operators

• Matched letter pairs (A-J, J-A)

• Increased number of possible machine configurations by 26*24*22*… = ~1013

• Manually wired and changed daily

• Daily settings specified in codebooks given to operators

• Matched letter pairs (A-J, J-A)

• Increased number of possible machine configurations by 26*24*22*… = ~1013

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Enigma Operation: Rotors & Reflector

Enigma Operation: Rotors & Reflector

• 26 spring-loaded contacts on each side

• Set to an arbitrary initial position for each message

• Each rotor has unique internal wiring to perform letter swaps

• Rightmost rotor steps one notch with each keystroke, the others every 26, 262, etc.

• Reflector does not move; hard-wired; swaps letters and ‘reflects’ signal back through rotors

• 26 spring-loaded contacts on each side

• Set to an arbitrary initial position for each message

• Each rotor has unique internal wiring to perform letter swaps

• Rightmost rotor steps one notch with each keystroke, the others every 26, 262, etc.

• Reflector does not move; hard-wired; swaps letters and ‘reflects’ signal back through rotors

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The Datapath

The Datapath

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Char RegData Reg

5-BitAdder% 26

Wheelshift ROM

PlugboardSRAM

ReflectorROM

Output Reg

CurrentWheel

Counter

WheelPositionCounters

Input

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Char RegData Reg

5-BitAdder% 26

Wheelshift ROM

PlugboardSRAM

ReflectorROM

Output Reg

CurrentWheel

Counter

WheelPositionCounters

InputStep 1: Input Entered

12

Char RegData Reg

5-BitAdder% 26

Wheelshift ROM

PlugboardSRAM

ReflectorROM

Output Reg

CurrentWheel

Counter

WheelPositionCounters

InputStep 2: Plug Board

13

Char RegData Reg

5-BitAdder% 26

Wheelshift ROM

PlugboardSRAM

ReflectorROM

Output Reg

CurrentWheel

Counter

WheelPositionCounters

InputStep 3: Rotor

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Char RegData Reg

5-BitAdder% 26

Wheelshift ROM

PlugboardSRAM

ReflectorROM

Output Reg

CurrentWheel

Counter

WheelPositionCounters

InputStep 4: Rotor maps new char

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Char RegData Reg

5-BitAdder% 26

Wheelshift ROM

PlugboardSRAM

ReflectorROM

Output Reg

CurrentWheel

Counter

WheelPositionCounters

InputStep 5: Reflector

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Char RegData Reg

5-BitAdder% 26

Wheelshift ROM

PlugboardSRAM

ReflectorROM

Output Reg

CurrentWheel

Counter

WheelPositionCounters

InputStep 6: Back through rotor

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Char RegData Reg

5-BitAdder% 26

Wheelshift ROM

PlugboardSRAM

ReflectorROM

Output Reg

CurrentWheel

Counter

WheelPositionCounters

InputStep 7: Rotor maps new char

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Char RegData Reg

5-BitAdder% 26

Wheelshift ROM

PlugboardSRAM

ReflectorROM

Output Reg

CurrentWheel

Counter

WheelPositionCounters

InputStep 8: Plug Board

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Design ProcessDesign Process• Initial Design:

• Problem:How to model the Mechanical behavior of the machine?

• Solution: Use a modular system architecture with memory used to implement the rotors, plugboard, and reflector

The Modular nature of the design allows for

flexibility in the number of wheels used and the initial position of the wheels.

• Initial Design:

• Problem:How to model the Mechanical behavior of the machine?

• Solution: Use a modular system architecture with memory used to implement the rotors, plugboard, and reflector

The Modular nature of the design allows for

flexibility in the number of wheels used and the initial position of the wheels.

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Design ProcessDesign Process

• Design Decisions:

Use a separate ROM for the wheel and reflector. This allows for 1-bit less in addressing and removes one clock cycle from the encryption

• Design Decisions:

Use a separate ROM for the wheel and reflector. This allows for 1-bit less in addressing and removes one clock cycle from the encryption

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FloorplanFloorplan

• Initial floorplan• Initial floorplan

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Wheelreg_serialinW

heelcounters

Fsm

Adder_mod26

Reg3bx8 serialin

rom208

RAM

rom26

RA

M

Final Floorplan

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Final Layout

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Reg3bx8 serialin

AddM

od26

rom208

FsmWheelreg_serialW

heel Counters RAM

ROM26

RAM

Final Layout

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Metal RulesMetal Rules• Low-level modules use rules of

directionality as guidelines.• Low-level modules use rules of

directionality as guidelines.

• Use metal 2 sparingly• Use metal 2 sparingly

• High-level modules use metal 2 as short interconnects, 3 & 4 follow top-level rules

• High-level modules use metal 2 as short interconnects, 3 & 4 follow top-level rules

• Top-level uses metal 2 in any direction, 3 & 4 directions are strictly enforced

• Top-level uses metal 2 in any direction, 3 & 4 directions are strictly enforced

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Layer Masks - PolyLayer Masks - Poly

Density: 8.25%

Transistor Density: 0.19 per µM2

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Layer Masks - Metal 1Layer Masks - Metal 1

Density: 31.36%

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Layer Masks - Metal 2Layer Masks - Metal 2

Density: 16.96%

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Layer Masks - Metal 3Layer Masks - Metal 3

Density: 12.25%

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Layer Masks - Metal 4Layer Masks - Metal 4

Density: 11.44%

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VerificationVerification

• C Code / Behavioral / Structural is easy!!!• C Code / Behavioral / Structural is easy!!!

• NC Verilog schematic verification also easy, same results.

• NC Verilog schematic verification also easy, same results.

• Analog simulations of the entire chip need to be broken down.

• Analog simulations of the entire chip need to be broken down.

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Module TestingModule Testing

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Estimated Critical PathEstimated Critical Path

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Char RegData Reg

5-BitAdder% 26

Wheelshift ROM

PlugboardSRAM

ReflectorROM

Output Reg

CurrentWheel

Counter

WheelPositionCounters

Input

ExtractedRCDelay: 3.03nS

Max estimated clock speed of 333 Mhz.

Estimated Critical Path

Estimated Critical Path

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What’s holding it back?What’s holding it back?

• Worst case adder delay is well over twice as long as most other cases

• Worst case adder delay is well over twice as long as most other cases

• Decoders -> contribute most of the delay to the SRAM and ROM.

• Decoders -> contribute most of the delay to the SRAM and ROM.

A + B > 25 - 26

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PinsPins

PINS # Purpose

Data Inputs 16setting inputs, character input

Control Inputs 4clk, set, reset, start

Data Outputs 5 character out

Power 2 vdd, ground

TOTAL 27

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UsageUsage• Set enters the initialization and

load mode. (26 clock cycles) • Set enters the initialization and

load mode. (26 clock cycles)

• Reset clears the current operation and state, returns to the initialized settings.

• Reset clears the current operation and state, returns to the initialized settings.

• Newchar starts the encryption cycle, completes and leaves the value at charout.

• Newchar starts the encryption cycle, completes and leaves the value at charout.

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SpecificationsSpecifications

• Maximum clock speed: 333 Mhz• Maximum clock speed: 333 Mhz

• Average power consumption: 2 mW • Average power consumption: 2 mW

• Throughput (3-wheel encryption): 20.8 million characters/second

• Throughput (3-wheel encryption): 20.8 million characters/second

• How does this compare to our base case???

• How does this compare to our base case???

• Total # of transistors: 9247• Total # of transistors: 9247• Final area: 200 x 253 µM ( 5x10-8 µM 2)• Final area: 200 x 253 µM ( 5x10-8 µM 2)

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Is it an improvement?Is it an improvement?• Some estimates from the original

machine:• Some estimates from the original

machine:

• Average power consumption: 130 Watts• Average power consumption: 130 Watts

• Throughput (any encryption): 2.5 characters/second

• Throughput (any encryption): 2.5 characters/second

• Size: 28 x 34 x 15 cm• Size: 28 x 34 x 15 cm

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In conclusionIn conclusion

• This new generation enigma encryption device:

• This new generation enigma encryption device:

• Uses 63,000 times less power than the original

• Uses 63,000 times less power than the original

• And runs 7 million times faster• And runs 7 million times faster

• Is 40,000 times smaller• Is 40,000 times smaller

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Citations-Citations-Rabaey, J. M. et al., Digital Integrated Circuits, Prentice Hall,

2003.

Stojanovic, V. et al., Comparative Analysis of Latches and Flip-Flops for High-Performance Systems, ICCD Conference Proceedings, 1998.

Blanton, S., 18-340 Digital Computation: Fast Adders, Lecture Notes, 2006.

Enigma Machine, photograph, www.nsa.gov/gallery/photo/photo00005.jpg

Engima Wheels and Plugboad, photographs, www.ilord.com/enigma.html

Rabaey, J. M. et al., Digital Integrated Circuits, Prentice Hall, 2003.

Stojanovic, V. et al., Comparative Analysis of Latches and Flip-Flops for High-Performance Systems, ICCD Conference Proceedings, 1998.

Blanton, S., 18-340 Digital Computation: Fast Adders, Lecture Notes, 2006.

Enigma Machine, photograph, www.nsa.gov/gallery/photo/photo00005.jpg

Engima Wheels and Plugboad, photographs, www.ilord.com/enigma.html