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Introduction A multiprocessor system is an interconnection
of two or more CPUs with memory and input-
output equipment. The term processor in multiprocessor can
mean either a central processing unit (CPU)or an input-output processor (IOP).
Multiprocessors are classified as multipleinstruction stream, multiple data stream(MIMD) systems
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Introduction(cont.) The similarity and distinction between
multiprocessor and multicomputer are
Similarity Both support concurrent operations
Distinction The network consists of several autonomous computers
that may or may not communicate with each other.
A multiprocessor system is controlled by one operatingsystem that provides interaction between processors andall the components of the system cooperate in thesolution of a problem.
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Introduction(cont.) Multiprocessing improves the reliability of the system.
The benefit derived from a multiprocessor organization is
an improved system performance. Multiple independent jobs can be made to operate in parallel.
A single job can be partitioned into multiple parallel tasks.
Multiprocessing can improve performance bydecomposing a program into parallel executable tasks.
The user can explicitly declare that certain tasks of the programbe executed in parallel.
This must be done prior to loading the program by specifying the parallel executablesegments.
The other is to provide a compiler with multiprocessor software
that can automatically detect parallelism in a users program.
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Introduction(cont.) Multiprocessor are classified by the way their
memory is organized.
A multiprocessor system with common sharedmemoryis classified as a shared-memoryortightly coupled multiprocessor. Tolerate a higher degreeof interaction between tasks.
Each processor element with its own private local
memoryis classified as a distributed-memoryorloosely coupled system. Are most efficient when the interaction between tasks is
minimal
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Introduction The components that form a multiprocessor system
are CPUs, IOPs connected to input-output devices,and a memory unit.
The interconnection between the components canhave different physical configurations, depending onthe number of transfer paths that are available Between the processors and memory in a shared memory system
Among the processing elements in a loosely coupled system
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Introduction(cont.)
There are several physical forms available forestablishing an interconnection network.
Time-shared common bus Multiport memory
Crossbar switch
Multistage switching network
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Time-shared common bus A common-bus multiprocessor system consists of a
number of processors connected through a commonpath to a memory unit.
Disadv.: Only one processor can communicate with the memory or another
processor at any given time.
As a consequence, the total overall transfer rate within the systemis limited by the speed of the single path
A more economical implementation of a dual busstructure is depicted in Fig. 13-2.
Part of the local memory may be designed as a cachememoryattached to the CPU.
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Time-shared common bus organization
Memory unit
CPU 1 CPU 2 CPU 3 IOP 1 IOP 2
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System bus structure for multiprocessors
CPU IOPLocal
memory
Commonshared
memory
Systembus
controllerCPU IOP
Localmemory
SystemBus
controllerCPU
Localmemory
Local bus Local bus
Local bus
System bus
Systembus
controller
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Multiport memory A multiport memory system employs separate buses
between each memory module and each CPU. The module must have internal control logic to
determine which port will have access to memory atany given time. Memory access conflicts are resolved by assigning
fixed priorities to each memory port. Adv.:
The high transfer rate can be achieved because of the multiplepaths.
Disadv.: It requires expensive memory control logic and a large number of
cables and connections
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Multiport Memory Since crossbar switches are expensive, and not suitable for systems with
many processors or memory modules, multiport memorymodules may
be used instead. A multiport memory module has multiple connections points for
processors (or I/O devices), and the memory controller in the modulehandles the arbitration and switching that might otherwise have beenaccomplished by a crosspoint switch.
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Multiport memory organization
CPU 1
CPU 2
CPU 3
CPU 4
MM 1
MM 2
MM 3
MM 4Memorymodules
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