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Using VDKs for IP and SoC Specific
Software Bring-Up
Accelerate Software Readiness
© 2015 Synopsys, Inc. 2
Agenda
• From reference software to production
• Shift left - Virtual Prototyping & Virtualizer Development Kits (VDKs)
• Software bring-up & test – From bootcode to Android
• How to start with Synopsys
• Summary
Using VDKs for IP and SoC specific software bring up
© 2015 Synopsys, Inc. 3
From Reference Software to Production
Open source
reference
Benchmark winning
production SW
Still some miles to go
© 2015 Synopsys, Inc. 4
Android System Architecture Layers, components and ownership
Sources: https://source.android.com/devices/index.html
SoC Firmware (boot/run-time)
Flash driver UART driver PSCI
Hardware manufactures
software responsibility
Google &
AOSP Contributors
Linux Kernel ARM Port Drivers
Contributed by
ARM/Linaro
ARM System IP drivers
ARM Trusted Firmware,
uBoot/UEFI
ARM Processor Support
Processor: ARM IP SoC: Customer’s IP, DesignWare IP
ARM Processor Support
Android ARM Port
ART/Dalvik
Android C/C++ Libraries
Bionic C Library
FFMPEG
OpenCORE
HAL
Reference board/VP
Display, touchscreen HAL
© 2015 Synopsys, Inc. 5
Android System Architecture Major application processor specific software development areas
SoC Firmware (boot/run-time)
Flash driver UART driver PSCI
Linux Kernel ARM Port Drivers
ARM System IP drivers
ARM Trusted Firmware,
uBoot/UEFI
ARM Processor Support
Processor: ARM IP SoC: Customer’s IP, DesignWare IP
ARM Processor Support
Android ARM Port
ART/Dalvik
Android C/C++ Libraries
Bionic C Library
FFMPEG
OpenCORE
HAL
Reference board/VP
Display, touchscreen HAL Android HAL development
Android HAL development
Linux IP driver bring up
Firmware/boot-code development
Linux kernel SoC bring up
Integration, optimization & test
Inte
gra
tion,
optim
ization &
test
© 2015 Synopsys, Inc. 6
Steps to Software Readiness
Optimization Custom hardware
specification
Android Custom
hardware specification
Linux Custom
hardware specification
Boot Custom
hardware specification
Reference Reference system
(Juno/ FVP)
ARM boot firmware, Linaro Linux, and
Google AOSP software references
Boot firmware
Basic single core Linux boot
SoC’s interface peripherals &
subsystem drivers
Android HAL development
HAL-Driver integration
Linux driver PM integration
Full leverage of HW capabilities
SoC clock-, voltage- and thermal IP
drivers
Runtime PM: suspend, resume,
hibernation
Overall power management
strategy
Runtime firmware (PSCI)
Multi-cluster, multi-core bring-up
CPU power & performance management (CPUFreq)
Overall (CPU/FGPU)
performance tuning
Silicon validation software
From open source reference to final software
Shift-Left !
© 2015 Synopsys, Inc. 7
Shift Left
Virtual Prototyping & Virtualizer Development Kits
© 2015 Synopsys, Inc. 8
Enable Market Entry
Source: Jose Corleto, Qualcomm, DAC 2009
Avoid delays by decoupling SW development from silicon availability
© 2015 Synopsys, Inc. 9
Broader Hardware & Software Scope Mobile Application Processor SoC
Main Device Software Stack
GPU firmware
PRCM Firmware
Cortex A
Cluster
Sensor
Hub
Hub Cortex M
Modem
Digital
Signal
Processing
Core
Controller
Core
RTOS
Modem Firmware
Sensor Firmware
GIC
Clock/Reset
Subsystem
GPU
Cortex M
Power Management IC
Controller
Core
On-SoC subsystem software Off-SoC chip software
UART
I2C
SCI
SPI
eMMC
USB
UFS
Ethernet PCIe
CSI DSI
HDMI
Cortex A
Cluster
MM
U 5
00
CC
I
TZ
C
Mem
Ctrl LPDDR
© 2015 Synopsys, Inc. 10
Incremental VDKs Immediate Impact Steps to software readiness
Validation & optimize software in context of the final RTL/hardware
Extend with custom models
Extend with readily available components
Start immediately with reference Virtualizer Development Kits (VDK)
Reference
Virtual Prototype
+ Flash memory controller IP
model(s)
+ SoC memory map
+ DesignWare & custom IP model(s)
Hybrid prototype (SoC virtual, selected
IP on FPGA)
+ Clock Management Units
Hybrid emulation
(CPU virtual)
+ Power Management IC & Thermal sensors
Silicon
+ System controller model(s)
+ CPU multi-cluster
Full SoC
Emulation
Physical Prototype Customized Virtual Prototype Out-of-the box start
© 2015 Synopsys, Inc. 11
Synopsys Virtualizer™ Prototyping Tools Quick recap from the introductory presentation
Virtualizer: Create VDKs VDK: Develop software
3rd party
debugger
support
Integrated into
ecosystems
Hybrid
emulation and
prototyping
Fast platform creation with
TLM Creator and Platform Creator
System tracing with
Virtual Prototype Explorer
Virtual prototype debug with
Virtual Prototype Explorer
Largest model library: ARM,
DesignWare, Automotive MCUs, …
Virtual- and
Real-world IO
© 2015 Synopsys, Inc. 12
From Reference to Full SoC Tailored SW Stack Reference platforms & models
System (SoC/Board) Software Bring-Up
ARM Cortex CPU software bring up
Driver Bring Up – DesignWare TLM
ARM FVPs
Synopsys VDK for ARM & DW
Synopsys Virtualizer – Full SoC virtual prototypes
Cortex®-A57 &Cortex-A53 MPCore
for ARMv8 big.LITTLE™
Base System Architecture SoC
eMMC USB UFS
PCIe Ethernet SATA
MIPI-CSI MIPI-DSI HDMI
Custom IP Clocks AudioSS
ImagingSS Power ModemSS
CCI
CCN
GIC
TZC
MMU
DP
Cortex-A
Cortex-M
Cortex-R
DMC
CoreLink TLM Library
© 2015 Synopsys, Inc. 13
Virtualizer Development Kits (VDKs)
Processors
ARM™ Cortex® processors & reference platform models
DesignWare IP
Synopsys DesignWare IP subsystem models
Reference software stacks
Trusted firmware, UEFI, Linux, Android
Tools
Build, configure, debug, trace and analyze
VDK Family for ARM & DesignWare
Immediate software development start
© 2015 Synopsys, Inc. 14
Software Developer’s View No change of habits required, interaction with a VDK is the same as HW
Virtual Prototype
3rd party Software Debugger(s) Virtual and Real IO
Debugger Server Virtual/Real IO
© 2015 Synopsys, Inc. 15
System-Level Software Debugging VP Explorer - Visibility beyond traditional software debugging
Explore
hardware
Filter information by persona
Break on signals,
registers
Script everything
Multi-core
debugging
Inspect
memory
map
Add your own widgets
Trace hardware
and software
© 2015 Synopsys, Inc. 16
Example Fujitsu S7X - ARM Techcon 2014
Source: Noriyuki Ikuma, Fujitsu, ARM TechCon 2014
© 2015 Synopsys, Inc. 17
Linux & Firmware
Driver Bring-Up
DesignWare IP Driver Bring Up
Synopsys IP VDKs
eMMC USB UFS
PCIe Ethernet SATA
MIPI-CSI MIPI-DSI HDMI
Cortex®-A57 &Cortex-A53 MPCore
for ARMv8 big.LITTLE™
Base System Architecture SoC
© 2015 Synopsys, Inc. 18
Linux Kernel Complexity
0
10
20
30
40
50
60
Linux 3.10 sources: Raw size: 573 MB, ~ 15,800,000 lines of code
Majority of the code
is drivers!
Moving target challenge:
“A stand-alone driver compiled
for a given version may no
longer compile or work on a
more recent one.”
© 2015 Synopsys, Inc. 19
DesignWare IP TLM – More than models
• USB
• USB 2 - OTG (On-the-Go) & Host Controller
• USB 3 & USB 3.1 – Device-, Host-, & Dual Role Controller
• Support for virtual and real world IO
• Flash controllers: Mobile Storage & UFS
– eMMC cards up to v5.0, SD cards up to v 4.0
– USF currently: v1.0, Under development: v2.0
• Ethernet
– XG-MAC, EQoS (e.g. Audio/Video bridging (AVB) for in-vehicle
infotainment (IVI)
– Virtual networks and connectivity to real network
• PCIe
– DesignWare PCIe v4.4 & Intel 82559 10GbE NIC
– SR-IOV with up to 64 VF
Ready to use VDK building-blocks (subsystems)
© 2015 Synopsys, Inc. 20
USB – Real World IO
• Support for up to
SuperSpeed “(USB3)
devices”
• Support for USB3
device on a remote
machine
• Linux and windows PC
support
IP VDK serves as the host, real physical device plugged into PC
ARM Linux
mount /dev/sda1 /pendrive
IP VDK
USB Host Server
USB
© 2015 Synopsys, Inc. 21
USB – Virtual IO
• The device represented
by the IP VDK appears
as a regular device on
the PC
• Linux and windows PC
support
IP VDK serves as the device which can be accessed from the PC
IP VDK
ARM Linux
start_device
© 2015 Synopsys, Inc. 22
FastTrack Debug with Synopsys TLM
– Activity and status reporting
– E.g.: Supplied frequency and voltage, operating mode, masked interrupt generating events,
internal FIFO full/empty, peripheral DMA events, reset status
– Programming error reporting
– E.g.: Control register has been reprogrammed while interrupt was enabled
– Efficiency warnings
– E.g.: Polling mode used instead of DMA mode
Understand what is going on under the hood
DesignWare MMC host controller debug messages while mounting an SD card.: 000070:2acc:i_DWC_MobileStorageHost:
000070:2acc:Card 0 Inserted, Card Detect = 0x3FFFFFFE
000070:2acc:Received ClkIn(240000000) signal
000070:2acc:Received Reset(0) signal
000076:2acc:i_DWC_MobileStorageHost:
000076:2acc:WrCMD(): Warning Card 0 Power Is Off
Save days of
debugging!
Expose key critical IP information to the software developer
© 2015 Synopsys, Inc. 23
Sensor Software Example
Multi-core software bring up and integration with host
device driver and sensor hub firmware
© 2015 Synopsys, Inc. 24
Cortex-M3 Sensor Control Subsystem Subsystem creation
Part Count Memory Interrupt
ARM® Cortex™ M3 1 -
PL055 UART 1 0x0e000000 1
PL190 Vectored IRQ 1 0x0e001000 -
PL061 GPIOs 3 0x0e002000
0x0e003000
0x0e004000
0x0e005000
2
3
4
5
PL320 Inter
processor
communication
module
1 0x1000f000 0
RAM 1 0x20000000 -
Subsystem
VDK
Integration
Subsystem Specification
© 2015 Synopsys, Inc. 25
Sensor HAL/driver bring-up & integration Across multiple processors
Sensor Driver
Sensor HAL
Android Runtime
read(“/sys/class/sensor/accel/x”)
Android Sensor HAL API
Sensor Firmware
Registers Interrupts
Sensor Driver API
sensors_open(&module, &device);
write(REG_CTRL, REQUEST_ACCEL_X)
Cortex-M
Cortex-A
Interrupts Registers
Mailbox Peripheral (IPCM)
Software component Hardware domain
© 2015 Synopsys, Inc. 26
Multi-Core Software Development
printk("-- Set IPCM PL320 Mailbox source register.\n"); IPCM_WRITE(IPCM0SOURCE,(1<<0)); printk("-- Set IPCM PL320 Mailbox interrupt mask register.\n"); IPCM_WRITE(IPCM0MSET, 0x3); printk("-- Set IPCM PL320 Mailbox destination register.\n"); IPCM_WRITE(IPCM0DSET ,(1<<2)); printk("-- Set IPCM PL320 Mailbox data 0 register to %.8x.\n",0); IPCM_WRITE(IPCM0DR0,0); printk("-- Set IPCM PL320 Mailbox data 1 register to %.8x.\n",sensor); IPCM_WRITE(IPCM0DR1,sensor); printk("-- Send IPCM PL320 Mailbox message.\n"); IPCM_WRITE(IPCM0SEND ,(1<<0)); printk("-- Waiting for acknowledge\n"); m4sensor_device_control.ack=false; interruptible_sleep_on_timeout(&m4sensor_queue, 1000 /* jiffies */); if(m4sensor_device_control.ack==0) { printk("-- Error: Timeout while waiting for acknowledge\n"); return 0; } printk("-- Acknowledge received. Command completed. Data ready.\n"); value= IPCM_READ(IPCM0DR2); printk("-- Reading sensor data from mailbox: %d\n",value);
Cortex-A Linux Device Driver – Code Excerpt
print(" Handle IPCM interrupt\n\r"); print(" Reading IPCM mailbox message\n\r"); task=IPCM_READ(IPCM0DR0); switch(task){ case 0: print(" Reading sensor from GPIO\n\r"); sensor=IPCM_READ(IPCM0DR1); value=hal_gpio_get_value_word8(sensor); print(" Writing to mailbox\n\r"); IPCM_WRITE(IPCM0DR2,value); break; …. } print(" Clearing ipcm interrupt, acknowledge\n\r"); IPCM_WRITE(IPCM0SEND ,(1<<1));
Cortex-M Firmware
Code Excerpt
Cortex-A Linux
Kernel debug
messages
Cortex-M
Firmware Debug
messages
© 2015 Synopsys, Inc. 27
Cortex-A Linux
Kernel debug
messages
Cortex-M Firmware
Debug messages
Linux UART Console
Sensor UART
Linux VGA Console
Unified and synchronized
logging of debug
messages from multiple
sources (UARTs, Android
Logcat etc.)
Central Virtual Prototype Tracing
Traces and logs from multiple sources in a single
database
Synchronized software
traces for Cortex-A and
Cortex-M
Peripheral access and
signal traces. Here:
shared IPCM
Sensor Driver
Sensor Firmware
HW & SW integration: HAL, Drivers & Firmware Trace based system level heterogeneous multi-core debugging
Multiple traces!
How to correlate?
© 2015 Synopsys, Inc. 28
Software testing
© 2015 Synopsys, Inc. 29
Scenario Recording and Replay Elastic user-level scenario scripts
iUART0 push ”./adb install AccelerometerPlay.apk\m”
wait iCLCD “AppInstalled.png”
iTSC press 10,100
wait iCLCD “AppLaunched.png”
trigger + 1000 ms SENSOR_SS/UART1 { push “a:0,0,9.81\n” }
# Roll device:
trigger + 1000 ms SENSOR_SS/UART1 { push “a:0,0,-9.81\n” }
Scenario test script, TCL code:
Wait for screen content
© 2015 Synopsys, Inc. 30
Software Testing Flow
Early test creation and debug
• Allow test developers to create tests without relying on scarce hardware resources
• Using interactive VDK seats
Continuous integration
• Allow software developers to test new developed code with a reduced set of tests before checking in the code
• Using interactive VDK seats to develop the code and regression VDK seats to run the tests
Regression testing
• Allow a QA department to run full system tests in hours instead of days
• Allow to test products that have been in the field for years for which physical labs (or prototypes) don’t exist anymore
• Using regression VDK seats for testing and interactive VDK seats for investigating failed tests
© 2015 Synopsys, Inc. 31
Integrate VDKs in Your Test Flows
IT infrastructure
- Able to run efficiently 100-1000 simulations in parallel
- Different execution platforms:
• Customer IT infrastructure
• Public cloud computing
• Synopsys provided HW
System Under Test (SUT)
- VDKs (+ some external connectivity)
APIs for SUT control
- Mechanism to control and exchange data
with the VDK
Test creation, management and reporting
- External 3rd party tool or infrastructure
- Adaptation required
Synopsys
provides 3rd party simulators
- Simulink, custom, …
© 2015 Synopsys, Inc. 32
Power Management SW Bring-Up
© 2015 Synopsys, Inc. 33
Reproduce/ simulate
fault scenarios due to
illegal clock & voltage
programming
Software Power Management Bring-Up Use-cases
Power manager software
Clock frequencies &
voltages (PMIC)
Power gating/ DVFS
Component utilization
Energy consumption
Temperature
Sensors
PSCI
DVFS
Runtime PM
PMIC &
Clock
Explore DVFS
strategies (governors)
Estimate & optimize
CPU run management
Identify un-necessary
power consumers
Inject temperature
stimuli for testing
Develop & test
thermal manager
© 2015 Synopsys, Inc. 34
Tiny Case Study: SoC Power Management USB subsystem with your specific PMIC and Clock Controller
USB
CORE Interrupt
Clock
Controller
Voltage
Controller
(PMIC)
Soc Bus
Soc Bus
I2C Bus
USB
PHY
Clk VDD
VDK for ARM &
DesignWare
(Base)
DesignWare
I2C host
© 2015 Synopsys, Inc. 35
Case Study: Normal OS & Driver Operation Booting and using USB for a file storage gadget
© 2015 Synopsys, Inc. 36
Case Study: Driver Faults from Power Bug
• Unpowered USB core • Unpowered USB PHY
Booting and using USB for a file storage gadget
Abort exception! No response!
USB
CORE Interrupt
Soc Bus
Power Domain: Core Power Domain: PHY
USB
PHY
© 2015 Synopsys, Inc. 37
Case Study: Root Cause Analysis with VDK
At that time:
Access to USB
CORE
USB CORE in
Power Down
State! Why?
USB PHY is powered on Ok
PMIC drives voltages:
V4 and V6
PMIC controlled by
SW: OK
VDD connectivity:
USB CORE connected to
V3 and not V4!
Need to correct USB driver to driver
V3 regulator!
Debug message:
Exception fault!
© 2015 Synopsys, Inc. 38
How to Get Started with Synopsys?
© 2015 Synopsys, Inc. 39
Complete Virtual Prototyping Solution
Platform assembly
Platform debugger &
performance profiler
Interactive & runtime
Integrated with leading 3rd
party debuggers
Scripting support
Distribute easily
Hybrid Prototyping and
Emulation support
Linux/Windows support
Tools
SystemC TLM-2.0
DesignWare models
ARC, ARM, Tensilica,
CEVA & other IP vendor
models
Customizable
Modeling tools to ease
creation of custom models
Software Models
Expert field support
Turn-key platform
development
Methodology consulting
World-wide support
Services
Shift-Left Your Software Development
© 2015 Synopsys, Inc. 40
Summary
• Fast growing software scope and complexity
• Software teams are pushed to the limit
• Incremental VDKs leveraging the reference VDKs, creation tools and
expertise from Synopsys enable the fastest time to quality software
• Phase software development alongside the hardware schedule
• Achieve better software and thus better products faster
Thank You
© 2015 Synopsys, Inc. 42
Appendix
Supplementary slides
© 2015 Synopsys, Inc. 43
Linaro Software Stack
For the VDK
© 2015 Synopsys, Inc. 44
Linaro Software Stack
Software component Firmware
boot stage
Description Version
ARM Trusted firmware BL-1
Secure world boot code
EL3/Secure
V0.4-Juno-0.5
ARM Trusted firmware
BL-2
Secure world boot code
EL1/Secure
V0.4-Juno-0.5
ARM Trusted firmware
BL3-1 Runtime firmware
EL3/Secure, SMC OS interface
V0.4-Juno-0.5
UEFI (EDK2/Tianocore) BL3-3
Normal world boot-loader
EL2/Non-secure
2014.09
Linux kernel Main operating system kernel and drivers
EL1/Non-secure
3.17.0-2014.10
Root file-system Linux distribution
EL0/Non-secure
Open embedded 2014.10
Pre-packaged with the reference VDK for ARMv8 Base
• IP VDK also provides:
• A one click scripted download and build environment for:
• All above mentioned software components
• Including host tools (such as gcc, acpi compiler, etc.)
• Saves the user from going through many Linaro README files
© 2015 Synopsys, Inc. 45
Power management SW bring up
© 2015 Synopsys, Inc. 46
Virtualizer
Platform Creator
Power Domain Modeling Subsystem assembly example with Platform Creator
USB Core
Power Domain
Clock & Voltage
Supplies
PMIC &
Clock Ctrl
Power Domain
Isolation
USB PHY
Power Domain
Memory and IRQ ports
© 2015 Synopsys, Inc. 47
Power consumption debugging
© 2015 Synopsys, Inc. 48
How to analyze power consumption bugs? Soldering skills required…
The hardware way… The Virtualizer way…
Source: How to measure SoC power, Andy Green, TI Landing Team lead, Linaro
Dynamic power analysis
Instrumentation overlay
© 2015 Synopsys, Inc. 49
Dynamic power analysis big.LITTLE processing – Task migration with DVFS
Frequencies
Voltages
Leakage Energy
Dynamic Energy
Power State
State Utilization
A15 active
A15 idle
A7 off
A15 off
A7 active
A7 idle
A15
1.1V/1.359Ghz A15 0.8V/755MHz A7 0.8V/140Mhz
© 2015 Synopsys, Inc. 50
Multi-core debugging
Bring up and integration with device driver and firmware
© 2015 Synopsys, Inc. 51
Vertical HW/SW integration: HAL & Drivers Interactive multi-layer, multi-core, multi-tool software debugging
Debug Sensor middleware – Cortex A
Debug Sensor driver – Cortex A
Kernel Symbols -
vmlinux Symbols libsensors.so Firmware symbols
Debug Sensor firmware– Cortex M
See article: Android hardware/software design using virtual prototypes http://www.embedded.com/design/prototyping-and-development/4399520
Virtual Prototype
Debugger Server
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