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30/05/2012 - 1 ATLCE - G2 - © 2011 DDC
Politecnico di Torino - ICT School
Analog and Telecommunication Electronics
G2 - Linear voltage regulators
» Shunt regulators» Series regulator» Integrated regulators» LDO
30/05/2012 - 2 ATLCE - G2 - © 2011 DDC
Lesson G2: Linear voltage regulators
• Shunt regulator– Zener diode– Voltage reference
• Series regulator– Transistor and Op Amp circuits– Current limit
• Integrated regulators– Low DropOut (LDO) regulators
• References: book1 (Sedra): Ch 3.5, 3.4
30/05/2012 - 3 ATLCE - G2 - © 2011 DDC
Unregulated output voltage
• With the transf.-diode-C scheme, the output voltage– Has ripple, related with output current– Changes when load current changes– Changes when the mains voltage changes
30/05/2012 - 4 ATLCE - G2 - © 2011 DDC
Output voltage regulation
• A voltage regulator can deliver constant VO
– When load current changes: load regulation SL = ΔVOΔIL» Equivalent output resistance Ro = SI
– When input voltage changes: in/out regulation Si = ΔVO/ΔVi– Reduce the ripple (is considered as a change of Vi)
ViVo
+
LVOLTAGE
REGULATOR
IL
30/05/2012 - 5 ATLCE - G2 - © 2011 DDC
Shunt and series regulation
• Goal of regulator constant Vo, for changes in Vi , L
• Two basic techniques
– Build a current divider, change the partition ratiousing the parallel branch Rp
shunt regulators
– Build a voltage divider, change the partition ratiousing the series branch Rs
series regulators
RPVi
Vo
+L
RS
Vi
Vo+
L
RS
30/05/2012 - 6 ATLCE - G2 - © 2011 DDC
Shunt regulator
• Basic shunt regulator: the zener diode– Very simple– Low efficiency, suitable for low power– Voltage reference circuits are shunt regulators
(low current capability)
• Current in the zener diode– Higher than Izmin (5 mA)– Less that Izmax
(to limit power dissipation)
• Constant input current– A benefit for some applications V
z
Vdc
Rpol
30/05/2012 - 7 ATLCE - G2 - © 2011 DDC
Example 1: zener regulator
• Design a shunt regulator from these specs:– Vi 10 20 V– Vo = 5 V (as close as possible); – Io = 0 100 mA
• Available zener diode:– Vzo = 5 V, Rz = 10 ohm, Izmin = 5 mA– Pdmax = 2 W
• Evaluate– Drop resistance R (min/max)– Vo min/max (any combination of Vi, Io, R)– Pdmax on R and Zener– Discuss selection Rmin/max
VoVi
R
30/05/2012 - 8 ATLCE - G2 - © 2011 DDC
Example 1: results
• Drop resistance R (min/max)– Rmin = Rmax =
• Vo min/max (any combination of Vi, Io, R)– Vomin = (Vi = Vimin, Io = Iomax, R = Rmax)– Vomax = (Vi = Vimax, Io = Iomin, R = Rmin)
• Pdmax on R and Zener– PdRmax = PdZmax =
• Discuss selection Rmin/max– Low values for R increase the current in the R-Dz, causing high
power dissipation– High values give lower dissipation, but could limit the max out
current capability
30/05/2012 - 9 ATLCE - G2 - © 2011 DDC
Series regulators
• Need a “controlled variable resistor”– Can use BJT or MOS– Current amplifier from a reference or shunt regulator– Feedback circuits (voltage reference and Op Amp)
• Always Vo < Vi– All regulators require a minimum drop voltage (Vdrop)
» losses on regulator; low efficiency– LDO (Low Drop Out) regulators for better efficiency
• Available as commodity ICs– Standard voltages (5, 6, 9, 12, …)– Variable voltage
30/05/2012 - 10 ATLCE - G2 - © 2011 DDC
• The series regulator operates as a controlled variable resistor
– The variable R is a BJT or MOS transistor– The controller CNT compares output Vo with a reference Vr
RLVi Vo
+
Series regulator – basic scheme
R
VoCNTRLVi
Vr
30/05/2012 - 11 ATLCE - G2 - © 2011 DDC
Example of series voltage regulator
• Basic R-Zener regulator– Regulation by current steering between Zener and load– Limited current capability (Izmax)
• Add Emitter follower (CC) as current amplifier
– Output voltageVo = Vz – Vbe same Sv
– Allows large load current change ΔIo = ΔIz β lower Ro
– Lower bound on Ro from gm (hie)
30/05/2012 - 12 ATLCE - G2 - © 2011 DDC
Feedback voltage regulator
• Control circuitry includes a reference and an amplifier
• Compare (a fraction β) the output voltage Vo with the reference Vr
• Drive the control element to keep
β Vo = Vr
• Needs a voltage reference
Vr
VS1
VO
IO
βVU
β
30/05/2012 - 13 ATLCE - G2 - © 2011 DDC
Voltage reference circuits
• Provide a known and stable voltage– Independent from Power Supply, temperature, aging, load, …– Required for voltage regulators and measurement circuits– Use Zener diode or Band-gap reference– The amplifier isolates the load from the reference
VREF
Vdc
Rpol
Vz
Vdc
Rpol
REF+ +
30/05/2012 - 14 ATLCE - G2 - © 2011 DDC
Example of band-gap voltage reference
• Zener diode– Zener voltage changes with temperature (inversion at about 6V)– Zener pair to compensate temperature changes– Need voltages higher than 9 V– Not the best choice for high precision and stability
• Band-gap reference– Uses combination of Vbe and VT + Op Amp– Can operate from low voltages – A 3-pin regulator with low current but precise and stable– Integrated within 3-pin regulators
30/05/2012 - 15 ATLCE - G2 - © 2011 DDC
Op Amp and BJT
• The BJT is connected as a CC power stage– The feedback loop makes β VO = Vref– Drop from Vi to Vo: Vao + Vbe
VI VO
R2
VREF
βVU
R1
30/05/2012 - 16 ATLCE - G2 - © 2011 DDC
Op Amp and BJT – Vo < Vref
• Voltage divider on Vref– The feedback loop makes VO = β Vref– Drop from Vi to Vo: Vao + Vbe
VI VO
R2βVREF
R1
VREF
30/05/2012 - 17 ATLCE - G2 - © 2011 DDC
Op Amp and Darlington pair
• A darlington pair has higher current gain– Drop from Vi to Vo: Vao + 2 Vbe
VIR2
R1
VREF
VO
30/05/2012 - 18 ATLCE - G2 - © 2011 DDC
Current limit
• Current sense resistor Rs– As Vs rises above 0,7V,
Q3 steers current away from Q1, Q2.
• External current sense – at least 4 pins
• Variable current limit– Current sense
differential amplifier– Variable threshold
• External V sense/divider– One additional pin (tot 5)
R2
R1
RS
RL
Vref
Vs
Vo
Vi Q1
Q2
Q3
30/05/2012 - 19 ATLCE - G2 - © 2011 DDC
Load current sense
• High side– Sense inside the regulator– Needs differential amplifier (matched components)
» Input common mode close to supply
• Low side– Referred to GND, no need for differential amplifier– Load not directly to GND– Additional pins on regulator
• High side with INA circuits– Differential amplifier for high side current sense– No need for matched components
30/05/2012 - 20 ATLCE - G2 - © 2011 DDC
INA differential amplifier
• Precise differential amplifiers need matched resistors
• INA circuit: used to sense low differential voltage close to supply
• No need for matched components
• Can handle common mode voltage near +Vi
VS(R2/R1)
RS R1
VI
VS
R2
30/05/2012 - 21 ATLCE - G2 - © 2011 DDC
Efficiency of series linear regulators
• Losses caused by voltage drop and leakage current.– Usually leakage current much less than output current
• To improve efficiency
– Reduce Voltage drop Low Drop-Out (LDO)
– Reduce leakage current IQ Low power Vr and control
– Move to switching regulators
IN
OUT
ININ
LEAKINOUT
IN
OUTV
VIV
IIVP
P
30/05/2012 - 22 ATLCE - G2 - © 2011 DDC
Drop-out voltage on regulator
• Transistors in a series regulator requires Vce margin to operate in active region
– Vi > Vo+VBE1+VBE2
– A power BJT has VBE = 1V, therefore Vi > Vo + 1,7V
• The Op Amp adds further internal drop VAO from positive supply to output (from 1V to a few mV):
– Vi > Vo + 1,7V +VAO = Vo + VHR, – the headroom voltage VHR represents the minimum drop-out
voltage on the series regulator– Usually VHR is about 2-3V
• The power dissipated on regulator depends on headroom voltage: Pd = VHR x Iomax
30/05/2012 - 23 ATLCE - G2 - © 2011 DDC
Standard regulator
• Drop-out is related with– Op Amp output voltage range:
rail-to-rail Op Amps provide Base drive Vb = Vs
– Power transistor VBE.A minimum about 1V.
• Using MOS does not reduce drop-out
– VGSON > VBE
– charge pump for gate driving (Ig = 0)
Vi
R2
R1
Vref
Vu
Vi
R2
R1
Vref
Vu
30/05/2012 - 24 ATLCE - G2 - © 2011 DDC
Low DrOpout (LDO) with pnp BJT
• Output stage becomes CE – No longer a voltage follower, amplifier with gain– Keep negative feedback (switch +/- Op Amp pins)– Gain depends on load, critical stability– Analyze the loop:
» Op Amp, CE stage, feedback network
• Using LDO– Manufacturers specify type and
value of output capacitor– Keep value and type of capacitor,
to get the required ESR!
Vi
R2
R1
Vref
ZLVu
30/05/2012 - 25 ATLCE - G2 - © 2011 DDC
Issues with LDO regulators
• PNP have lower current gain (β)– The Op-Amp must sink a high current, related with the load– High leakage, decreased regulator efficiency– Not best for variable output voltage regulators– Darlington to increase the current gain, no longer LDO
• Good design rules– Input capacitor C1
to compensate wire inductance
– Diode to protect fromfast switch of at input (may cause Vo > Vi)
VoVi C1 C2
30/05/2012 - 26 ATLCE - G2 - © 2011 DDC
Remote sense: four-wire
• Output current causes voltage drop on power wires– Use separate sense wires connected directly to the load– In sense wires no current, therefore no voltage drop
VO
VsVi
RL
ILVD1
VD2
30/05/2012 - 27 ATLCE - G2 - © 2011 DDC
EMI sensitivity
• Remote sense wires can pick EM interference and noise (e.g. from 50Hz mains).
• Use differential signals and twisted pair for remote sense
VoViRL
Vs
30/05/2012 - 28 ATLCE - G2 - © 2011 DDC
Variable Vo from 3-pin regulators
• The 3-pin regulator keeps a constant preset voltage Vpbetween OUT and COMMON pins.
– If voltage of common pin is Vc = βVo (rather than GND), we get Vo = Vp + Vc
– Vc comes from Vo through a voltage divider R1/R2– Vc = βVo = Vo R2/(R1 + R2)– Vo = Vp R1/(R1 + R2)
• The quiescent current IQadds a (small) drop on R2
– IR2 =IQ +Vreg /R1– Vo =Vp + R2·IR2
– Vo =Vp R1/(R1+R2) + IQ·R2
VoViIQ
R1
R2
Vp
Vc
IN
COMMON
OUT
30/05/2012 - 29 ATLCE - G2 - © 2011 DDC
Commercial voltage regulator
• Power supply regulators are available as standard ICs
• Linear regulators: the 78xx family (positive)– Xx = output voltage– High power package– Max current related with case
» 50 mA … 5 A
• Other devices– 79xx family: negative– 317 family: variable output– LM9076 LDO + shutdown + delayed reset
30/05/2012 - 30 ATLCE - G2 - © 2011 DDC
78xx data sheet
30/05/2012 - 31 ATLCE - G2 - © 2011 DDC
78xx data sheet
30/05/2012 - 32 ATLCE - G2 - © 2011 DDC
LDO regulator with commands
30/05/2012 - 33 ATLCE - G2 - © 2011 DDC
Numeric example
• Goal: 5V, 1A PSU with linear regulator– Draw complete block diagram without and with regulator– Define specs for unregulated voltage (e.g: 8Vdc, 1Vr)– Evaluate parameters for transformer, diodes, capacitor– Evaluate Sv and Ro
• Add zener regulator; – Define required zener parameters– Evaluate Sv and Ro
• Add power transistor (CC)– Evaluate Sv and Ro
• Select suitable 3-pin regulator– Compare Sv and Ro
30/05/2012 - 34 ATLCE - G2 - © 2011 DDC
Lesson G2 – final test
• Describe the difference between parallel and series regulators.
• Which are the benefits of feedback regulators?
• Explain how to get output voltage lower than reference voltage with a feedback regulator.
• Describe a current limiter circuit.
• Describe operation of foldback current limiters
• Motivate and describe the 4-wire technique for remote voltage sensing.
• Describe high-side current sensing with INA.
• Discuss benefits and problems of LDO regulators.
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