Appendix A: MIPS Assembly Language. Instruction Format R-type I-type J-type

Appendix A: MIPS Assembly

Language

Instruction Format

R-type I-type J-type

SPIM and MIPS Architecture

A MIPS processor consists of an integer processing unit (the CPU) and a collection of coprocessors.

SPIM simulates two coprocessors: coprocessor 0 handles exceptions, interrupts and

the virtual memory system coprocessor 1 is the floating-point unit

Addressing Modes

MIPS is a load-store architecture Only load and store instructions access

memory Computation instructions operates only on

values in registers. The bare machine provides only one

addressing mode: c(rx), c+rx Virtual machine provides other modes.

Data Alignment

Most load and store instructions operate only on aligned data.

A quantity is aligned if its memory address is a multiple of its size in bytes.

Example: a half-word object must be stored at a even address.

MIPS provides some instructions to manipulate unaligned data. (lwl, lwr, swl, swr)

Exceptions and Interrupts

Will be discussed in Chapter 5. Deal with exceptions caused by errors during

an instruction’s execution; or external interrupts caused by I/O devices.

SPIM only simulates part of MIPS’ exception facility.

BadVAddr, Status, Cause, EPC

Instruction Categories Arithmetic and Logical Instructions Constant-Manipulating Instructions Comparison Instructions Branch Instructions Jump Instructions Load Instructions Store Instructions Data Movement Instructions Floating-Point Instructions Exception and Interrupt Instructions

Assembler Syntax

.align n : align the next datum on a 2^n byte boundary.

.ascii str , asciiz str .byte b1,…,bn .data <addr> .double d1,..,dn More on Pages A-47 and A-48

System Calls

System services (Figure A.9.1): print_int, print_float, print_double, print_string, read_int, read_float, read_double, read_string, srbk, exit

Figure A.9.1

Example

.data

str:

.asciiz “the answer= “

.text

li $v0,4 # print_strla $a0,str # addr of string to print

syscall

Programming Assignment

A.6 (due on 10/5/2005) A.7 (due on 10/5/2005) A.8 (due on 10/12/2005) Submit a hardcopy including the source code

and the results of executing the program. Also send an electronic copy of the source code to your TA (g9304).