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CMPE 3 2 5 Computer Architecture II. Cem Erg ün Eastern Med iterranean University. Multiplication & Division Algorithms. Binary Multiplication. At each step we multiply the multiplicand by a single digit from the multiplier. - PowerPoint PPT Presentation
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CMPE 325 Computer Architecture II
Cem Ergün
Eastern Mediterranean University
Multiplication & Division Algorithms
Cem Ergun Multiplication & Division Algorithms2
Binary Multiplication
• At each step we multiply the multiplicand by a single digit from the multiplier.– In binary, we multiply by either 1 or 0 (much
simpler than decimal).
• Keep a running sum instead of storing and adding all the partial products at the end.
Cem Ergun Multiplication & Division Algorithms3
Multiplication
• Long-hand multiplication (12 × 9 = 108) 1 1 0 0 = 12ten (n bit Multiplicand)
× 1 0 0 1 = 9ten (m bit Multiplier)----------------------- 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0+ 1 1 0 0 0 0 0-----------------------
1 1 0 1 1 0 0 = 108ten (n + m bit Product)
• The result is a number that is n + m - 1 bits long
Cem Ergun Multiplication & Division Algorithms4
Implementing Multiplication
• Several different ways to implement• Things to note about previous method
– At each step we either copied or set the value to 0– LSBs of the product don’t change once computed
Can form product by shifting and adding
• Solution #1– Shift multiplicand left at each step (same as adding 0’s)– Shift multiplier right so we can always consider the 0’th bit
Cem Ergun Multiplication & Division Algorithms5
Solution #1
• Multiplication without sign (12 × 9 = 108) 1 1 0 0 = 12ten (n bit Multiplicand)
× 1 0 0 1 = 9ten (m bit Multiplier)----------------------- 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0+ 1 1 0 0 0 0 0-----------------------
1 1 0 1 1 0 0 = 108ten
Multiplicand 0 0 0 0 1 1 0 0
Multiplier 1 0 0 1
Product 0 0 0 0 0 0 0 0
0 0 0 0 1 1 0 0
1 0 0 1
0 0 0 0 1 1 0 0
0 0 0 1 1 0 0 0
1 0 0 1
0 0 0 0 1 1 0 0
0 0 1 1 0 0 0 0
1 0 0 1
0 0 0 0 1 1 0 0
0 1 1 0 0 0 0 0
1 0 0 1
0 1 1 0 1 1 0 0
Cem Ergun Multiplication & Division Algorithms6
Done
1. TestMultiplier0
1a. Add multiplicand to product andplace the result in Product register
2. Shift the Multiplicand register left 1 bit
3. Shift the Multiplier register right 1 bit
32nd repetition?
Start
Multiplier0 = 0Multiplier0 = 1
No: < 32 repetitions
Yes: 32 repetitions
Solution #1: Operations
Cem Ergun Multiplication & Division Algorithms7
Solution #1: Example
Iter Step Multiplier Multiplicand Product
0 Initial Values 1001 0000 1100 0000 0000
1 Multiplier[0]=1 Prod+Mcand 1001 0000 1100 0000 1100
Shift multiplicand left 1001 0001 1000 0000 1100
Shift multiplier right 0100 0001 1000 0000 1100
2 Multiplier[0]=0 Do nothing 0100 0001 1000 0000 1100
Shift multiplicand left 0100 0011 0000 0000 1100
Shift multiplier right 0010 0011 0000 0000 1100
3 Multiplier[0]=0 Do nothing 0010 0011 0000 0000 1100
Shift multiplicand left 0010 0110 0000 0000 1100
Shift multiplier right 0001 0110 0000 0000 1100
4 Multiplier[0]=1 Prod+Mcand 0001 0110 0000 0110 1100
Shift multiplicand left 0001 1100 0000 0110 1100
Shift multiplier right 0000 1100 0000 0110 1100
Cem Ergun Multiplication & Division Algorithms8
Solution #1: Hardware
Product
Multiplicand
64-bit ALU
Shift Left
Shift Right
WriteControl
32 bits
64 bits
64 bits
MultiplierAdd
Cem Ergun Multiplication & Division Algorithms9
Adjustments to Algorithm 1
• One big problem with the algorithm/implementation shown:– need a 64 bit ALU (adder).– Half of the multiplicand bits are always 0
• Either high or low bits are 0, even as shifted– LSB of product never changes once set– Half of the 64 bit adder is therefore wasted
• We can fix this by:– Leaving the multiplicand alone (don’t shift).– Instead of shifting multiplicand left, shift the
product right– Add multiplicand to left half of running sum.– Adder only needs to be 32 bits wide
Cem Ergun Multiplication & Division Algorithms10
Solution #2: Adjusted Algorithm
Done
1. TestMultiplier0
1a. Add multiplicand to the left half ofthe product and place the result inthe left half of the Product register
2. Shift the Product register right 1 bit
3. Shift the Multiplier register right 1 bit
32nd repetition?
Start
Multiplier0 = 0Multiplier0 = 1
No: < 32 repetitions
Yes: 32 repetitions
Revised Addition
Shift partial sum instead of multiplicand
Cem Ergun Multiplication & Division Algorithms11
Solution #2: Example
Iter Step Multiplier Multiplicand Product
0 Initial Values 1001 1100 0000 0000
1 Multiplier[0]=1 Prod+Mcand 1001 1100 00001100
Shift product right 1001 0110 00001100
Shift multiplier right 0100 0110 00001100
2 Multiplier[0]=0 Do nothing 0100 0110 00001100
Shift product right 0100 0011 00001100
Shift multiplier right 0010 0011 00001100
3 Multiplier[0]=0 Do nothing 0010 0011 00001100
Shift product right 0010 0001 10001100
Shift multiplier right 0001 0001 10001100
4 Multiplier[0]=1 Prod+Mcand 0001 1101 10001100
Shift product right 0001 0110 11001100
Shift multiplier right 0000 0110 11001100
Cem Ergun Multiplication & Division Algorithms12
Solution #2: Hardware
Product
Multiplicand
32-bit ALUShift Right
WriteControl
32 bits
32 bits
64 bits
Multiplier
Shift Right
Upper 32 bits
Add
Cem Ergun Multiplication & Division Algorithms13
Issues and Alternative
• In the implementation of the adjusted algorithm it is possible to save space by putting the multiplier in the rightmost 32 bits of the product register.– If you notice, half of the product register is useless at the
beginning– At the end, the multiplier register becomes useless
• Solution #3 The algorithm is the same, but steps 2 and 3 are done at the same time. – Remove the multiplier register– Place the multiplier value in the lower half of the product register
Cem Ergun Multiplication & Division Algorithms14
Solution #3: Operations
Cem Ergun Multiplication & Division Algorithms15
Solution #3: Example
Iter Step Multiplicand Product
0 Initial Values 1100 0000 1001
1 Product[0]=1 Prod+Mcand 1100 10011100
Shift product right 0110 01001100
2 Product[0]=0 Do nothing 0110 01001100
Shift product right 0011 00101100
3 Product[0]=0 Do nothing 0011 00101100
Shift product right 0001 10011100
4 Product[0]=1 Prod+Mcand 1101 10011100
Shift product right 0110 11001100
Cem Ergun Multiplication & Division Algorithms16
Solution #3: Hardware
Product
Multiplicand
32-bit ALU
Control
32 bits
64 bits
MultiplierUpper 32 bits
Add
Write
Shift Right
LSB
Cem Ergun Multiplication & Division Algorithms17
Signed Multiplication
• Previous algorithms work for unsigned.• We could:
– convert both multiplier and multiplicand to positive before starting, but remember the signs.
– adjust the product to have the right sign (might need to negate the product).
– Set the sign bit to make the number negative if the multiplicand and multiplier disagree in sign
• Positive × Positive = Positive• Negative × Negative = Positive • Positive × Negative = Negative• Negative × Positive = Negative
Cem Ergun Multiplication & Division Algorithms18
Supporting Signed Integers
• We can adjust the previous algorithm to work with signed integers
• make sure each shift is an arithmetic shift– right shift – extend the sign bit (keep the MS
bit the same instead of shifting in a 0).
• Since addition works for signed numbers, the multiply algorithm will now work for signed numbers.
Cem Ergun Multiplication & Division Algorithms19
1110 x 0011 (-2 x 3)
Step Multiplicand Product 1110 000000111a
2,3
1110 11100011
111100011a
2,3
1110 11010001
111010001
2,3
1110 11101000
111101001
2,3
1110 11110100
11111010
multiplier is rightmost 4 bits
1st partial productin left 4 bits
Shift Right
Result is 2s complement
Cem Ergun Multiplication & Division Algorithms20
Signed Third Multiplication Algorithm
Cem Ergun Multiplication & Division Algorithms21
Improving the speed with Combinational Array Multiplier
Cem Ergun Multiplication & Division Algorithms22
Combinational Array Multiplier
Cem Ergun Multiplication & Division Algorithms23
Combinational Array Multiplier3 bit Example
Cem Ergun Multiplication & Division Algorithms24
Booth’s Algorithm
• Requires that we can do an addition or a subtraction each iteration (not always an addition).
• Uses the following property– the value of any consecutive string of 1s in a
binary number can be computed with one subtraction.
Cem Ergun Multiplication & Division Algorithms25
A different way to compute integer values
0110 23-21 (8-2=6)
0011111000 28-23 (256-8 = 248)
28 23
2321
Cem Ergun Multiplication & Division Algorithms26
A little more complex example
010011010
22 21
25 23
28 27
28-27 + 25-23 + 22-21
256-128 + 32-8 + 4-2
Cem Ergun Multiplication & Division Algorithms27
An overview of Booth’s Algorithm
• When doing multiplication, strings of 0s in the multiplier require only shifting (no addition).
• When doing multiplication, strings of 1s in the multiplier require operation and shifting.
• We need to add or subtract only at positions in the multiplier where there is a transition from a 0 to a 1, or from a 1 to a 0.
Cem Ergun Multiplication & Division Algorithms28
Booth Explanation
• Booth also works for negative numbers• Booth Algorithm
– Add additional bit to the right of product– Use right two bits of product to determine action– Use arithmetic right shift
Current Bit Right Bit Explanation Action0 0 Middle of string of 0s Do nothing0 1 End of string of 1s Add multiplicand1 0 Beginning of string of 1s Subtract multiplicand1 1 Middle of string of 1s Do nothing
0 0 1 1 1 1 0 0( )End of
string
Beginning of
stringMiddle of string
Cem Ergun Multiplication & Division Algorithms29
Shifting• The second step of
the algorithm is the same as before: shift the product/multiplier right one bit.– Arithmetic shift
needed for signed arithmetic.
– The bit shifted off the right is saved and used by the next step 1 (which looks at 2 bits).
Booth’s Algorithm
Cem Ergun Multiplication & Division Algorithms30
Booth Example
Iter Step Multiplicand Product
0 Initial Values 1100 0000 1001 0
1 Product=10 Prod-Mcand 0100 1001 01100
Shift product right 0010 0100 11100
2 Product=01 Prod+Mcand 1110 0100 11100
Shift product right 1111 0010 01100
3 Product=00 Do nothing 1111 0010 01100
Shift product right 1111 1001 01100
4 Product=10 Prod-Mcand 0011 1001 01100
Shift product right 0001 1100 11100
• Consider the same example, but think of it as a signed multiplication (-4×-7=28)
Cem Ergun Multiplication & Division Algorithms31
Multiply in MIPS
• Product stored in two 32 bit registers called Hi and Lowmult $s0, $s1 # $s0 * $s1 high/lowmultu $s0, $s1 # $s0 * $s1 unsigned
• Results are moved from Hi/Lowmfhi $t0 # $t0 = Himflo $t0 # $t0 = Low
• Pseudoinstructionmul $t0, $s0, $s1 # $t0 = $s0 * $s1
Cem Ergun Multiplication & Division Algorithms32
Divide
• Long-hand division (108 ÷ 12 = 9) 1 0 0 1 (n bit Quotient)
+--------------- +-----------------
1 1 0 0 | 1 1 0 1 1 0 0 (Divisor) | (Dividend)
- 1 1 0 0
---------
0 0 1 1
- 0 0 0 0
---------
0 1 1 0
- 0 0 0 0
---------
1 1 0 0
- 1 1 0 0
---------
0 0 0 0 (Remainder) N + 1 Steps
Cem Ergun Multiplication & Division Algorithms33
Divide Solution #1• Solution #1
– Start with quotient = 0, remainder = dividend, and divisor’s top bits set
– On each iteration set remainder to be remainder – divisor
– If large enough (remainder 0), then shift quotient left and set rightmost to 1
– If not large enough (remainder < 0), then set remainder to remainder + divisor (restore)
– Shift divisor right– Continue for n+1 (33) iterations
rem = rem - div
if rem < 0 then
// divisor too big
rem = rem + div
quo <<= 1
LSB(quo) = 0
else
// can divide
quo <<= 1
LSB(quo) = 1
fi
div >>= 1
repeat unless done
Cem Ergun Multiplication & Division Algorithms34Done
Test Remainder
2a. Shift the Quotient register to the left,setting the new rightmost bit to 1
3. Shift the Divisor register right 1 bit
33rd repetition?
Start
Remainder < 0
No: < 33 repetitions
Yes: 33 repetitions
2b. Restore the original value by addingthe Divisor register to the Remainder
register and place the sum in theRemainder register. Also shift the
Quotient register to the left, setting thenew least significant bit to 0
1. Subtract the Divisor register from theRemainder register and place the result in the Remainder register
Remainder > 0–
Divide Solution #1
Cem Ergun Multiplication & Division Algorithms35
Solution #1: Hardware
Remainder
Divisor
64-bit ALU
Shift Right
Shift Left
WriteControl
32 bits
64 bits
64 bits
Quotient
MSB
Cem Ergun Multiplication & Division Algorithms36
Cem Ergun Multiplication & Division Algorithms37
00000111 / 0010Step Quotient Divisor Remainder 0000 00100000 0000011112b3
0000
00010000
1110011100000111
12b3
0000
00001000
1111011100000111
12a3
000000000100
1111111100000111
12a3
000100000010
00000011
12a3
001100000001
00000001
initial values
after subtraction
after restore
shift right
final remainder
final quotient
Cem Ergun Multiplication & Division Algorithms38
Division Example: 1001001/0101
Control
64-bit
Remainder64 bitWrite
Divisor64 bitShRight
Quotient
32 bit
ShLeft
Quotient Divisor Remainder
xxxx 01010000 01001001
xxxx 01010000 11111001-
xxx0 00101000 01001001
Initial Values (Divisor in LHS)•1a. Rem. <-- Rem-Divisor
xxx0 00101000 00100001
•2a. Rem. <-- Rem-Divisor
-
xx01 00010100 00100001
xx01 00010100 00001101
•3a. Rem. <-- Rem-Divisor
-
x011 00001010 00001101
x011 00001010 00000011
0111 00000101 00000011
•4a. Rem. <-- Rem-Divisor
0111 00000101 11111110
1110 00000010 00000011
•5a. Rem. <-- Rem-Divisor-
-
•1b. Rem.<0, Add Div., LSh Q, Q0=0; RSh Div.
•2b. Rem>=0, LSh Q, Q0=1; RSh Div.
•3b. Rem>=0, LSh Q, Q0=1; RSh Div.
•4b. Rem>=0, LSh Q, Q0=1; RSh Div.
•5b. Rem<0, Add Div., LSh Q, Q0=0; RSh Div.
1001001/0101 = 1110 rem 001173/5 = 14 rem 3
1
2
3
4
5
N+1 Steps, but first step cannot produce a 1.
Cem Ergun Multiplication & Division Algorithms39
Issues and Alternative
• Just as before– Half of the divisor bits are always 0
• Either high or low bits are 0, even as shifted
– Half of the 64 bit adder is therefore wasted
• Solution #2– Instead of shifting divisor right, shift the remainder left– Adder only needs to be 32 bits wide– Can also remove iteration by switching order to shift and then
subtract– Remainder is in left half of register
Cem Ergun Multiplication & Division Algorithms40
Solution #2: Hardware
Remainder
Divisor
32-bit ALUShift Left
Control
32 bits
32 bits
64 bits
Quotient
Write
Shift Left
MSB
Cem Ergun Multiplication & Division Algorithms41
xxxx 0101 0100001x
Improved Divider: 1001001/0101
Quotient Divisor Remainder
xxxx 0101 01001001
-
xxx1 0101 100001xx
Initial Values•0. LSh Rem
xxx1 0101 001101xx
•1a. Rem. <-- Rem-Divisor
-
xx11 0101 01101xxx
xx11 0101 00011xxx
•2a. Rem. <-- Rem-Divisor
-
x111 0101 0011xxxx
x111 0101 1110xxxx
1110 0101 0011xxxx
•3a. Rem. <-- Rem-Divisor
•4a. Rem. <-- Rem-Divisor
-
•1b. Rem>=0, LSh Q, Q0=1; LSh Rem.
•2b. Rem>=0, LSh Q, Q0=1; LSh Rem.
•3b. Rem>=0, LSh Q, Q0=1; LSh Rem.
•4b. Rem<0, Add Div., LSh Q, Q0=0
1001001/0101 = 1110 rem 001173/5 = 14 rem 3
1
2
3
4
xxxx 0101 1001001x
Control
32-bit
LH Rem.64 bit
Write
Divisor32 bit
Quotient
32 bit
ShLeft
ShLeftRH Rem.
Cem Ergun Multiplication & Division Algorithms42
Issues and Alternative
• Just as before, half of the remainder register is useless at the beginning
• At the end, the quotient register becomes useless
• Solution #3– Remove the quotient register
– Place the quotient in the lower half of the remainder register
– Need to unshift in the last step to account for off-by-one
Cem Ergun Multiplication & Division Algorithms43
Further Modifications
Solution#3 • Same space savings as with multiplication:
– use right ½ of remainder register to hold the quotient.
Write
32 bits
64 bits
Shift leftShift right
Remainder
32-bit ALU
Divisor
Controltest
quotient
Cem Ergun Multiplication & Division Algorithms44
Done. Shift left half of Remainder right 1 bit
Test Remainder
3a. Shift the Remainder register to the left, setting the new rightmost bit to 1
32nd repetition?
Start
Remainder < 0
No: < 32 repetitions
Yes: 32 repetitions
3b. Restore the original value by addingthe Divisor register to the left half of theRemainder register and place the sum
in the left half of the Remainder register.Also shift the Remainder register to theleft, setting the new rightmost bit to 0
2. Subtract the Divisor register from theleft half of the Remainder register andplace the result in the left half of the
Remainder register
Remainder 0
1. Shift the Remainder register left 1 bit
–>
Divide Solution #3rem <<= 1
rem -= (div >> 32)
if rem < 0 then
rem += (div >> 32)
rem <<= 1
LSB(rem) = 0
else
rem <<= 1
LSB(rem) = 1
fi
repeat unless done
Correct remainder
Cem Ergun Multiplication & Division Algorithms45
Solution #3: Example
Cem Ergun Multiplication & Division Algorithms46
0101 00110111
0101 01000010
0101 100001010101 001101010101 01101011
Improved Improved Divider: 1001001/0101
Divisor Remainder-Quotient
0101 01001001
-
Initial Values•0. LSh Rem-Quo.
•1a. Rem <-- Rem-Divisor
-
0101 00011011
•2a. Rem. <-- Rem-Divisor
-
0101 11100111
0101 01101110
•3a. Rem. <-- Rem-Divisor
•4a. Rem. <-- Rem-Divisor
-
•1b. Rem>=0, LSh Rem-Quo, Q0=1
•2b. Rem>=0, LSh Rem-Quo, Q0=1
•3b. Rem>=0, LSh Rem-Quo, Q0=1
•4b. Rem<0, Add Div., LSh Rem-Quo, Q0=0
1001001/0101 = 1110 rem 001173/5 = 14 rem 3
1
2
3
4
0101 10010010
Control
32-bit
LH Rem.64 bit
Write
Divisor32 bit
ShLeftRem-Quot.
0101 00111110•Final: RSh Rem 1
Cem Ergun Multiplication & Division Algorithms47
Signed Division
• Same process as naïve integer multiply– Make divisor and dividend positive– Negate quotient if signs of divisor and dividend disagree
• Set sign of remainder– Dividend = Quotient × Divisor + Remainder– Sign should match dividend
Cem Ergun Multiplication & Division Algorithms48
Divide in MIPS
• Quotient/Remainder stored in two 32 bit registers called Hi and Low
div $s0, $s1 # $s0 / $s1 high/low
divu $s0, $s1 # $s0 / $s1 unsigned
• Results are moved from Hi/Lowmfhi $t0 # $t0 = Hi
mflo $t0 # $t0 = Low
• Pseudoinstructionsdiv $t0, $s0, $s1 # $t0 = $s0 / $s1
rem $t0, $s0, $s1 # $t0 = $s0 % $s1
div $s0,$s1Lo = $s0/$s1 (integer)Hi = $s0 % $s1
div $s0,$s1Lo = $s0/$s1 (integer)Hi = $s0 % $s1
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