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COMSOL based simulation of optical response in Si microline array based
broadband photodetector fabricated on Silicon-On-Insulator (SOI) wafers
Vishal Kumar Aggarwal1, Shaili Sett1, Achintya Singha2 , Arup Kumar Raychaudhuri1
1S N Bose National Centre For Basic Sciences, Kolkata2Bose Institute, Kolkata
November 28-29,2019
• Motivation / Science issues
• Pros and cons of work
•Device fabrication process and Electron Microscope
Characterization
•Results and discussion
•COMSOL simulation
• Conclusion
Outline
Motivation / Science issues
Our proposal
➢ We propose to make array of Si microlines (~1 µm wide)fabricated by a top-down process that is compatible with waferlevel processing.
➢ Make Metal-semiconductor-metal (MSM) photodetectorsfrom the Si microlines.
➢ Achieve a large responsivity (R) larger than that available incommercial p-n detectors (0.6 A/W) although less than that ina single Si NW device (104 A/W).
Pros and cons of the work1. Fabrication of array of microlines of Silicon using SOI is a new
technology which is not only compatible with wafer scaleprocessing but also turns out to be an adoptable road map fortranslation.
2. Growth of such type of arrays of microlines (planar) on waferscan be readily coupled to established batch processing tools.
3. The Responsivity (R) is an order higher than the commerciallyavailable 1A/W detectors.
Price paidR will get limited to ~10-20 A/W although much larger than
currently available 0.6 A/W in commercial p-n diode detectors.
120 μm
Device fabrication process20 μm
E-BeamLithography
(EBL)
Au microlines (length ~ 20 μm, breadth ~ 1 μm)
Deposit Cr/Au
The Au lines are used as mask. Thickness (50 nm) is such that the process of etching removes the Si and reaches the bottom SiO2
Si
Au
PMMA coating
PMMA masks the gold electrodes and avoids from any
further etching
PMMA
Device fabrication process (contd..)
6
To make the structure partially suspended and to etch out the SiO2 underneath Si microlines,
we did a wet etching (acid etch) by dipping it in 20%
Hydrofluoric acid (HF) solution.
Remaining SiO2
Silicon
Si microlines on SiO2
Partially suspended Si microlines
Post plasmaEtchingCF4/Ar
SiO2
FESEM image of array of Si microlines
(a) FESEM image of array of Si microlines. (b) Schematic of the partially suspended device created by etching. The etching
progressively removes the oxide under-layer on both sides and left behind a narrow strand that supports the microline.
(c) Magnified view showing partially suspended Si microlines.
0 20 40 60 80 100 1205.0x10
-8
6.0x10-8
7.0x10-8
8.0x10-8
9.0x10-8
1.0x10-7
1.1x10-7
1.2x10-7
1.3x10-7
Cu
rre
nt
(A)
Time(sec)
7.01µW-mm-2
6.32µW-mm-2
4.57µW-mm-2
2.31µW-mm-2
Photo Current vs. Time curve when light is turned ON/OFF
300 400 500 600 700 800 900 1000 1100 1200
0
2
4
6
8
10
12
14
16
18
20
1V
500 mV
100 mV
50mV
Re
sp
on
siv
ity
(A
/W)
Wavelength (nm)
(a) (b)
0 200 400 600 800 10004
8
12
16
20
Re
sp
on
siv
ity
(A
/W)
Bias (mV)
(a) Responsivity curve at different bias over a wavelength range of 400-1100 nm. (b) Peak Responsivity (λ=800nm)
as function of bias.
Responsivity vs. Wavelength
0 2 4 6 8 10 12 14 16 18
0.00
0.02
0.04
0.06
0.08
0.10
0.12
0.14
Intensity (W-m-2)
Ph
oto
cu
rre
nt
(µA
)
Power law fit
α = 0.72 (<1)Trap states exists,
depends on generation of electron-hole pairs,
trapping and recombination of
charge carriers in the device.
Photocurrent vs. Intensity curve
As Power increases, Photocurrent increases because of enhancement of electron-hole
pair density..!
0 10 20 30 40 50
0
20
40
60
80
100
120
140
160
1.74x109 W-m
-2
7.38x108 W-m
-2
3.74x108 W-m
-2
Ph
oto
cu
rre
nt
(nA
)
Position (µm)
11
Iph generated at contact region
depends on width of
depletion region and lowering of barrier height
upon illumination.
On approaching the centre of the microline, Iph
decreases, implies characteristic of a
Schottky Photocurrent (SPC)
behavior
Photocurrent at different spots of device with varying intensity
Intensity
(W-m-2)
Iph at centre (nA) Average Iph at contact
(nA)
Fraction of photocurrent
1.74x109 76 125 0.61
7.38x108 33 83 0.40
3.74x108 19 67 0.28
0 10 20 30 40 50
0
20
40
60
80
100
120
140
160
1.74x109 W-m
-2
7.38x108 W-m
-2
3.74x108 W-m
-2
Ph
oto
cu
rre
nt
(nA
)
Position (µm)
COMSOL Simulation
Module Used Semiconductor module coupled with electromagnetic wave
module in frequency domain
Physics we would like to address using COMSOL …??
Partial suspension of Si microline reduces the recombination pathways and increases the carrier
lifetime which ultimately increases the responsivity of detector..!
COMSOL Simulation: Geometry used
Cross-sectional image of device geometry of partially suspended Si microline used for simulation. The width Wof the SiO2 under-layer is a variable parameter in the
simulation
Surface plot of the carrier Recombination rate per unit volume in partially suspended Si microline with
different width
COMSOL Simulation: Results
COMSOL Simulation: Results
Surface plot of the carrier Recombination rate per unit volume in partially suspended Si microline with W=350 nm in sharp anisotropic etch profile and
lateral etch profile
(a) Dependence of the enhancement of photocurrent (over dark current) and (b) carrier
recombination rate Rnon the width W of the underlying SiO2 layer that supports the microline
Conclusion
16
➢ We have developed a simple and useful technique for the fabrication of Silicon microlines from SOI wafer using a top-
down method.
➢ The Responsivity is at least an order higher than commercially available bulk Si detectors in the same spectral
range.
➢ The current in the device is controlled by trap states.
➢ Si microlines, which are partially suspended, prevent recombination of carriers during transit, thereby elongating
its lifetime and has been validated by using COMSOL simulation.
Thank You !!
Prof. Arup K. Raychaudhuri
Ms. Shaili Sett
Acknowledgement
Dr. Achintya Singha
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